Created attachment 259940 [details] [PATCH] cad/yosys: update 0.51 => 0.52 Yosys 0.51 .. Yosys 0.52 -------------------------- * New commands and options - Added "-pattern-limit" option to "share" pass to limit analysis effort. - Added "libcache" pass to control caching of technology library data parsed from liberty files. - Added "read_verilog_file_list" to parse verilog file list. * Various - Added $macc_v2 cell. - Improve lexer performance and zlib support for "read_liberty". - opt_expr: optimize pow of 2 cells.
Committed, thanks!
A commit in branch main references this bug: URL: https://cgit.FreeBSD.org/ports/commit/?id=d4b2c70756a1a303d7293fb99bec05406e69a56f commit d4b2c70756a1a303d7293fb99bec05406e69a56f Author: Älven <alster@vinterdalen.se> AuthorDate: 2025-04-28 09:19:21 +0000 Commit: Yuri Victorovich <yuri@FreeBSD.org> CommitDate: 2025-04-28 09:19:53 +0000 cad/yosys: update 0.51 → 0.52 PR: 286408 cad/yosys/Makefile | 37 ++++++++++++++-------------- cad/yosys/distinfo | 8 +++--- cad/yosys/files/patch-kernel_driver.cc (new) | 11 +++++++++ cad/yosys/pkg-plist | 2 ++ 4 files changed, 34 insertions(+), 24 deletions(-)