Attachment #119039 for bug #161498

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	ldr	r0, =ARM_RAS_START;					   \
	mov	r1, #0;							   \
	str	r1, [r0];						   \
	ldr	r0, =ARM_RAS_END;					   \
	mov	r1, #0xffffffff;					   \
	str	r1, [r0, #4];

/*
 * PULLFRAME - macro to pull a trap frame from the stack in the current mode

	stmia	sp, {r0-r12};		/* Push the user mode registers */ \
	add	r0, sp, #(4*13);	/* Adjust the stack pointer */	   \
	stmia	r0, {r13-r14}^;		/* Push the user mode registers */ \
	mov     r0, r0;                 /* NOP for previous instruction */ \
	ldr     r5, =ARM_RAS_START;     /* Retrieve global RAS_END and  */ \
	ldr     r4, [r5, #4];           /* reset it to point at the     */ \
	cmp     r4, #0xffffffff;        /* end of memory if necessary;  */ \
	movne   r1, #0xffffffff;        /* leave value in r4 for later  */ \
	strne   r1, [r5, #4];           /* comparision against PC.      */ \
	ldr     r3, [r5];               /* Retrieve global RAS_START    */ \
	cmp     r3, #0;                 /* and reset it if non-zero.    */ \
	movne   r1, #0;                 /* If non-zero RAS_START and    */ \
	strne   r1, [r5];               /* PC was lower than RAS_END,   */ \
	ldrne   r1, [r0, #16];          /* adjust the saved PC so that  */ \
	cmpne   r4, r1;                 /* execution later resumes at   */ \
	strhi   r3, [r0, #16];          /* the RAS_START location.      */ \
	mrs     r0, spsr_all;                                              \
	str     r0, [sp, #-4]!
            

/*
 * PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack
 * in SVC32 mode and restore the saved processor mode and PC.

Lines 42-50 Link Here

(-)sys/arm/include/sysarch.h (-1 / +5 lines)
42	* The ARM_TP_ADDRESS points to a special purpose page, which is used as local	42	* The ARM_TP_ADDRESS points to a special purpose page, which is used as local
43	* store for the ARM per-thread data and Restartable Atomic Sequences support.	43	* store for the ARM per-thread data and Restartable Atomic Sequences support.
44	* Put it just above the "high" vectors' page.	44	* Put it just above the "high" vectors' page.
45	* the cpu_switch() code assumes ARM_RAS_START is ARM_TP_ADDRESS + 4, and	45	* The cpu_switch() code assumes ARM_RAS_START is ARM_TP_ADDRESS + 4, and
46	* ARM_RAS_END is ARM_TP_ADDRESS + 8, so if that ever changes, be sure to	46	* ARM_RAS_END is ARM_TP_ADDRESS + 8, so if that ever changes, be sure to
47	* update the cpu_switch() (and cpu_throw()) code as well.	47	* update the cpu_switch() (and cpu_throw()) code as well.
		48	* In addition, code in arm/include/atomic.h and arm/include/asmacros.h
		49	* assumes that ARM_RAS_END is at ARM_RAS_START+4, so be sure to update those
		50	* if ARM_RAS_END moves in relation to ARM_RAS_START (look for occurrances
		51	* of ldr/str rm,[rn, #4]).
48	*/	52	*/
49	#define ARM_TP_ADDRESS (ARM_VECTORS_HIGH + 0x1000)	53	#define ARM_TP_ADDRESS (ARM_VECTORS_HIGH + 0x1000)
50	#define ARM_RAS_START (ARM_TP_ADDRESS + 4)	54	#define ARM_RAS_START (ARM_TP_ADDRESS + 4)

Return to bug 161498

Lines 71-79 Link Here

(-)sys/arm/include/asmacros.h (-19 / +17 lines)
71	ldr r0, =ARM_RAS_START; \	71	ldr r0, =ARM_RAS_START; \
72	mov r1, #0; \	72	mov r1, #0; \
73	str r1, [r0]; \	73	str r1, [r0]; \
74	ldr r0, =ARM_RAS_END; \
75	mov r1, #0xffffffff; \	74	mov r1, #0xffffffff; \
76	str r1, [r0];	75	str r1, [r0, #4];
77		76
78	/*	77	/*
79	* PULLFRAME - macro to pull a trap frame from the stack in the current mode	78	* PULLFRAME - macro to pull a trap frame from the stack in the current mode
Lines 118-140 Link Here
118	stmia sp, {r0-r12}; /* Push the user mode registers */ \	117	stmia sp, {r0-r12}; /* Push the user mode registers */ \
119	add r0, sp, #(413); / Adjust the stack pointer */ \	118	add r0, sp, #(413); / Adjust the stack pointer */ \
120	stmia r0, {r13-r14}^; /* Push the user mode registers */ \	119	stmia r0, {r13-r14}^; /* Push the user mode registers */ \
121	mov r0, r0; /* NOP for previous instruction */ \	120	mov r0, r0; /* NOP for previous instruction */ \
122	ldr r5, =ARM_RAS_START; /* Check if there's any RAS */ \	121	ldr r5, =ARM_RAS_START; /* Retrieve global RAS_END and */ \
123	ldr r3, [r5]; \	122	ldr r4, [r5, #4]; /* reset it to point at the */ \
124	cmp r3, #0; /* Is the update needed ? */ \	123	cmp r4, #0xffffffff; /* end of memory if necessary; */ \
125	ldrgt lr, [r0, #16]; \	124	movne r1, #0xffffffff; /* leave value in r4 for later */ \
126	ldrgt r1, =ARM_RAS_END; \	125	strne r1, [r5, #4]; /* comparision against PC. */ \
127	ldrgt r4, [r1]; /* Get the end of the RAS */ \	126	ldr r3, [r5]; /* Retrieve global RAS_START */ \
128	movgt r2, #0; /* Reset the magic addresses */ \	127	cmp r3, #0; /* and reset it if non-zero. */ \
129	strgt r2, [r5]; \	128	movne r1, #0; /* If non-zero RAS_START and */ \
130	movgt r2, #0xffffffff; \	129	strne r1, [r5]; /* PC was lower than RAS_END, */ \
131	strgt r2, [r1]; \	130	ldrne r1, [r0, #16]; /* adjust the saved PC so that */ \
132	cmpgt lr, r3; /* Were we in the RAS ? */ \	131	cmpne r4, r1; /* execution later resumes at */ \
133	cmpgt r4, lr; \	132	strhi r3, [r0, #16]; /* the RAS_START location. */ \
134	strgt r3, [r0, #16]; /* Yes, update the pc */ \	133	mrs r0, spsr_all; \
135	mrs r0, spsr_all; /* Put the SPSR on the stack */ \	134	str r0, [sp, #-4]!
136	str r0, [sp, #-4]!	135
137
138	/*	136	/*
139	* PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack	137	* PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack
140	* in SVC32 mode and restore the saved processor mode and PC.	138	* in SVC32 mode and restore the saved processor mode and PC.