Attachment #140597 for bug #187238

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Lines 177-183 Link Here

(-)sys/amd64/amd64/apic_vector.S (+3 lines)
177	jz 2f	177	jz 2f
178	swapgs	178	swapgs
179	2:	179	2:
		180	btl %eax,PM_ACTIVE(%rdx)
		181	jc 3f
180	LK btcl %eax,PM_SAVE(%rdx)	182	LK btcl %eax,PM_SAVE(%rdx)
		183	3:
181	SUPERALIGN_TEXT	184	SUPERALIGN_TEXT
182	invltlb_ret_rdx:	185	invltlb_ret_rdx:
183	popq %rdx	186	popq %rdx





static struct unrhdr pcid_unr;
static struct mtx pcid_mtx;
int pmap_pcid_enabled = 1;
SYSCTL_INT(_vm_pmap, OID_AUTO, pcid_enabled, CTLFLAG_RDTUN, &pmap_pcid_enabled,
    0, "Is TLB Context ID enabled ?");
int invpcid_works = 0;

	kernel_pmap->pm_pml4 = (pdp_entry_t *)PHYS_TO_DMAP(KPML4phys);
	kernel_pmap->pm_cr3 = KPML4phys;
	CPU_FILL(&kernel_pmap->pm_active);	/* don't allow deactivation */
	CPU_FILL(&kernel_pmap->pm_save);	/* always superset of pm_active */
	TAILQ_INIT(&kernel_pmap->pm_pvchunk);
	kernel_pmap->pm_flags = pmap_flags;


		} else {
			invltlb_globpcid();
		}
		if (!CPU_ISSET(cpuid, &pmap->pm_active))
			CPU_CLR_ATOMIC(cpuid, &pmap->pm_save);
		smp_invltlb(pmap);
	} else {
		other_cpus = all_cpus;

			}
		} else if (CPU_ISSET(cpuid, &pmap->pm_active))
			invltlb();
		if (!CPU_ISSET(cpuid, &pmap->pm_active))
			CPU_CLR_ATOMIC(cpuid, &pmap->pm_save);
		if (pmap_pcid_enabled)
			CPU_AND(&other_cpus, &pmap->pm_save);
		else

Return to bug 187238

Lines 367-373 Link Here

(-)sys/amd64/amd64/pmap.c (-4 / +6 lines)
367		367
368	static struct unrhdr pcid_unr;	368	static struct unrhdr pcid_unr;
369	static struct mtx pcid_mtx;	369	static struct mtx pcid_mtx;
370	int pmap_pcid_enabled = 0;	370	int pmap_pcid_enabled = 1;
371	SYSCTL_INT(_vm_pmap, OID_AUTO, pcid_enabled, CTLFLAG_RDTUN, &pmap_pcid_enabled,	371	SYSCTL_INT(_vm_pmap, OID_AUTO, pcid_enabled, CTLFLAG_RDTUN, &pmap_pcid_enabled,
372	0, "Is TLB Context ID enabled ?");	372	0, "Is TLB Context ID enabled ?");
373	int invpcid_works = 0;	373	int invpcid_works = 0;
Lines 838-844 Link Here
838	kernel_pmap->pm_pml4 = (pdp_entry_t *)PHYS_TO_DMAP(KPML4phys);	838	kernel_pmap->pm_pml4 = (pdp_entry_t *)PHYS_TO_DMAP(KPML4phys);
839	kernel_pmap->pm_cr3 = KPML4phys;	839	kernel_pmap->pm_cr3 = KPML4phys;
840	CPU_FILL(&kernel_pmap->pm_active); /* don't allow deactivation */	840	CPU_FILL(&kernel_pmap->pm_active); /* don't allow deactivation */
841	CPU_ZERO(&kernel_pmap->pm_save);	841	CPU_FILL(&kernel_pmap->pm_save); /* always superset of pm_active */
842	TAILQ_INIT(&kernel_pmap->pm_pvchunk);	842	TAILQ_INIT(&kernel_pmap->pm_pvchunk);
843	kernel_pmap->pm_flags = pmap_flags;	843	kernel_pmap->pm_flags = pmap_flags;
844		844
Lines 1492-1498 Link Here
1492	} else {	1492	} else {
1493	invltlb_globpcid();	1493	invltlb_globpcid();
1494	}	1494	}
1495	CPU_CLR_ATOMIC(cpuid, &pmap->pm_save);	1495	if (!CPU_ISSET(cpuid, &pmap->pm_active))
		1496	CPU_CLR_ATOMIC(cpuid, &pmap->pm_save);
1496	smp_invltlb(pmap);	1497	smp_invltlb(pmap);
1497	} else {	1498	} else {
1498	other_cpus = all_cpus;	1499	other_cpus = all_cpus;
Lines 1526-1532 Link Here
1526	}	1527	}
1527	} else if (CPU_ISSET(cpuid, &pmap->pm_active))	1528	} else if (CPU_ISSET(cpuid, &pmap->pm_active))
1528	invltlb();	1529	invltlb();
1529	CPU_CLR_ATOMIC(cpuid, &pmap->pm_save);	1530	if (!CPU_ISSET(cpuid, &pmap->pm_active))
		1531	CPU_CLR_ATOMIC(cpuid, &pmap->pm_save);
1530	if (pmap_pcid_enabled)	1532	if (pmap_pcid_enabled)
1531	CPU_AND(&other_cpus, &pmap->pm_save);	1533	CPU_AND(&other_cpus, &pmap->pm_save);
1532	else	1534	else