Attachment #150717 for bug #196093

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int
emulate_wrmsr(struct vmctx *ctx, int vcpu, uint32_t num, uint64_t val)
{

	if (cpu_vendor_intel) {
		switch (num) {
		case 0xd04:		/* Sandy Bridge uncore PMCs */

			return (0);
		case MSR_BIOS_SIGN:
			return (0);
		case MSR_IA32_MISC_ENABLE:
			return (0);
		default:
			break;
		}

			 * Ignore writes to hardware configuration MSR.
			 */
			return (0);
		case MSR_IA32_MISC_ENABLE:
			return (0);
		case MSR_NB_CFG1:
		case MSR_IC_CFG:
			return (0);	/* Ignore writes */

Return to bug 196093

Lines 48-54 Link Here

(-)usr.sbin/bhyve/xmsr.c (-2 / +4 lines)
48	int	48	int
49	emulate_wrmsr(struct vmctx *ctx, int vcpu, uint32_t num, uint64_t val)	49	emulate_wrmsr(struct vmctx *ctx, int vcpu, uint32_t num, uint64_t val)
50	{	50	{
51
52	if (cpu_vendor_intel) {	51	if (cpu_vendor_intel) {
53	switch (num) {	52	switch (num) {
54	case 0xd04: /* Sandy Bridge uncore PMCs */	53	case 0xd04: /* Sandy Bridge uncore PMCs */
Lines 58-63 Link Here
58	return (0);	57	return (0);
59	case MSR_BIOS_SIGN:	58	case MSR_BIOS_SIGN:
60	return (0);	59	return (0);
		60	case MSR_IA32_MISC_ENABLE:
		61	return (0);
61	default:	62	default:
62	break;	63	break;
63	}	64	}
Lines 68-74 Link Here
68	* Ignore writes to hardware configuration MSR.	69	* Ignore writes to hardware configuration MSR.
69	*/	70	*/
70	return (0);	71	return (0);
71		72	case MSR_IA32_MISC_ENABLE:
		73	return (0);
72	case MSR_NB_CFG1:	74	case MSR_NB_CFG1:
73	case MSR_IC_CFG:	75	case MSR_IC_CFG:
74	return (0); /* Ignore writes */	76	return (0); /* Ignore writes */