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(-)sys/dev/wpi/if_wpi.c (+69 lines)
Lines 184-189 Link Here
184
static void	wpi_cmd_done(struct wpi_softc *, struct wpi_rx_desc *);
184
static void	wpi_cmd_done(struct wpi_softc *, struct wpi_rx_desc *);
185
static void	wpi_notif_intr(struct wpi_softc *);
185
static void	wpi_notif_intr(struct wpi_softc *);
186
static void	wpi_wakeup_intr(struct wpi_softc *);
186
static void	wpi_wakeup_intr(struct wpi_softc *);
187
#ifdef WPI_DEBUG
188
static void	wpi_debug_registers(struct wpi_softc *);
189
#endif
187
static void	wpi_fatal_intr(struct wpi_softc *);
190
static void	wpi_fatal_intr(struct wpi_softc *);
188
static void	wpi_intr(void *);
191
static void	wpi_intr(void *);
189
static int	wpi_cmd2(struct wpi_softc *, struct wpi_buf *);
192
static int	wpi_cmd2(struct wpi_softc *, struct wpi_buf *);
Lines 2199-2204 Link Here
2199
}
2202
}
2200
2203
2201
/*
2204
/*
2205
 * This function prints firmware registers
2206
 */
2207
#ifdef WPI_DEBUG
2208
static void
2209
wpi_debug_registers(struct wpi_softc *sc)
2210
{
2211
#define COUNTOF(array) (sizeof(array) / sizeof(array[0]))
2212
	int i;
2213
	static const uint32_t csr_tbl[] = {
2214
		WPI_HW_IF_CONFIG,
2215
		WPI_INT,
2216
		WPI_INT_MASK,
2217
		WPI_FH_INT,
2218
		WPI_GPIO_IN,
2219
		WPI_RESET,
2220
		WPI_GP_CNTRL,
2221
		WPI_EEPROM,
2222
		WPI_EEPROM_GP,
2223
		WPI_GIO,
2224
		WPI_UCODE_GP1,
2225
		WPI_UCODE_GP2,
2226
		WPI_GIO_CHICKEN,
2227
		WPI_ANA_PLL,
2228
		WPI_DBG_HPET_MEM,
2229
	};
2230
	static const uint32_t prph_tbl[] = {
2231
		WPI_APMG_CLK_CTRL,
2232
		WPI_APMG_PS,
2233
		WPI_APMG_PCI_STT,
2234
		WPI_APMG_RFKILL,
2235
	};
2236
2237
	DPRINTF(sc, WPI_DEBUG_REGISTER,"%s","\n");
2238
2239
	for (i = 0; i <  COUNTOF(csr_tbl); i++) {
2240
		DPRINTF(sc, WPI_DEBUG_REGISTER, "  %-18s: 0x%08x ",
2241
		    wpi_get_csr_string(csr_tbl[i]), WPI_READ(sc, csr_tbl[i]));
2242
2243
		if ((i + 1) % 2 == 0)
2244
			DPRINTF(sc, WPI_DEBUG_REGISTER, "\n");
2245
	}
2246
	DPRINTF(sc, WPI_DEBUG_REGISTER, "\n\n");
2247
2248
	if (wpi_nic_lock(sc) == 0) {
2249
		for (i = 0; i < COUNTOF(prph_tbl); i++) {
2250
			DPRINTF(sc, WPI_DEBUG_REGISTER, "  %-18s: 0x%08x ",
2251
			    wpi_get_prph_string(prph_tbl[i]),
2252
			    wpi_prph_read(sc, prph_tbl[i]));
2253
2254
			if ((i + 1) % 2 == 0)
2255
				DPRINTF(sc, WPI_DEBUG_REGISTER, "\n");
2256
		}
2257
		DPRINTF(sc, WPI_DEBUG_REGISTER, "\n");
2258
		wpi_nic_unlock(sc);
2259
	} else {
2260
		DPRINTF(sc, WPI_DEBUG_REGISTER,
2261
		    "Cannot access internal registers.\n");
2262
	}
2263
#undef COUNTOF
2264
}
2265
#endif
2266
2267
/*
2202
 * Dump the error log of the firmware when a firmware panic occurs.  Although
2268
 * Dump the error log of the firmware when a firmware panic occurs.  Although
2203
 * we can't debug the firmware because it is neither open source nor free, it
2269
 * we can't debug the firmware because it is neither open source nor free, it
2204
 * can help us to identify certain classes of problems.
2270
 * can help us to identify certain classes of problems.
Lines 2298-2303 Link Here
2298
		struct ieee80211com *ic = ifp->if_l2com;
2364
		struct ieee80211com *ic = ifp->if_l2com;
2299
2365
2300
		device_printf(sc->sc_dev, "fatal firmware error\n");
2366
		device_printf(sc->sc_dev, "fatal firmware error\n");
2367
#ifdef WPI_DEBUG
2368
		wpi_debug_registers(sc);
2369
#endif
2301
		wpi_fatal_intr(sc);
2370
		wpi_fatal_intr(sc);
2302
		DPRINTF(sc, WPI_DEBUG_HW,
2371
		DPRINTF(sc, WPI_DEBUG_HW,
2303
		    "(%s)\n", (r1 & WPI_INT_SW_ERR) ? "(Software Error)" :
2372
		    "(%s)\n", (r1 & WPI_INT_SW_ERR) ? "(Software Error)" :
(-)sys/dev/wpi/if_wpi_debug.h (-26 / +69 lines)
Lines 41-46 Link Here
41
	WPI_DEBUG_EEPROM	= 0x00008000,	/* EEPROM info */
41
	WPI_DEBUG_EEPROM	= 0x00008000,	/* EEPROM info */
42
	WPI_DEBUG_KEY		= 0x00010000,	/* node key management */
42
	WPI_DEBUG_KEY		= 0x00010000,	/* node key management */
43
	WPI_DEBUG_EDCA		= 0x00020000,	/* WME info */
43
	WPI_DEBUG_EDCA		= 0x00020000,	/* WME info */
44
	WPI_DEBUG_REGISTER	= 0x00080000,	/* print chipset register */
44
	WPI_DEBUG_ANY		= 0xffffffff
45
	WPI_DEBUG_ANY		= 0xffffffff
45
};
46
};
46
47
Lines 54-89 Link Here
54
#define TRACE_STR_END		"->%s: end\n"
55
#define TRACE_STR_END		"->%s: end\n"
55
#define TRACE_STR_END_ERR	"->%s: end in error\n"
56
#define TRACE_STR_END_ERR	"->%s: end in error\n"
56
57
58
#define WPI_DESC(x) case x:	return #x
59
57
static const char *wpi_cmd_str(int cmd)
60
static const char *wpi_cmd_str(int cmd)
58
{
61
{
59
	switch (cmd) {
62
	switch (cmd) {
60
	/* Notifications */
63
		/* Notifications. */
61
	case WPI_UC_READY:		return "UC_READY";
64
		WPI_DESC(WPI_UC_READY);
62
	case WPI_RX_DONE:		return "RX_DONE";
65
		WPI_DESC(WPI_RX_DONE);
63
	case WPI_START_SCAN:		return "START_SCAN";
66
		WPI_DESC(WPI_START_SCAN);
64
	case WPI_SCAN_RESULTS:		return "SCAN_RESULTS";
67
		WPI_DESC(WPI_SCAN_RESULTS);
65
	case WPI_STOP_SCAN:		return "STOP_SCAN";
68
		WPI_DESC(WPI_STOP_SCAN);
66
	case WPI_BEACON_SENT:		return "BEACON_SENT";
69
		WPI_DESC(WPI_BEACON_SENT);
67
	case WPI_RX_STATISTICS:		return "RX_STATS";
70
		WPI_DESC(WPI_RX_STATISTICS);
68
	case WPI_BEACON_STATISTICS:	return "BEACON_STATS";
71
		WPI_DESC(WPI_BEACON_STATISTICS);
69
	case WPI_STATE_CHANGED:		return "STATE_CHANGED";
72
		WPI_DESC(WPI_STATE_CHANGED);
70
	case WPI_BEACON_MISSED:		return "BEACON_MISSED";
73
		WPI_DESC(WPI_BEACON_MISSED);
71
74
72
	/* Command notifications */
75
		/* Command notifications. */
73
	case WPI_CMD_RXON:		return "WPI_CMD_RXON";
76
		WPI_DESC(WPI_CMD_RXON);
74
	case WPI_CMD_RXON_ASSOC:	return "WPI_CMD_RXON_ASSOC";
77
		WPI_DESC(WPI_CMD_RXON_ASSOC);
75
	case WPI_CMD_EDCA_PARAMS:	return "WPI_CMD_EDCA_PARAMS";
78
		WPI_DESC(WPI_CMD_EDCA_PARAMS);
76
	case WPI_CMD_TIMING:		return "WPI_CMD_TIMING";
79
		WPI_DESC(WPI_CMD_TIMING);
77
	case WPI_CMD_ADD_NODE:		return "WPI_CMD_ADD_NODE";
80
		WPI_DESC(WPI_CMD_ADD_NODE);
78
	case WPI_CMD_DEL_NODE:		return "WPI_CMD_DEL_NODE";
81
		WPI_DESC(WPI_CMD_DEL_NODE);
79
	case WPI_CMD_TX_DATA:		return "WPI_CMD_TX_DATA";
82
		WPI_DESC(WPI_CMD_TX_DATA);
80
	case WPI_CMD_MRR_SETUP:		return "WPI_CMD_MRR_SETUP";
83
		WPI_DESC(WPI_CMD_MRR_SETUP);
81
	case WPI_CMD_SET_LED:		return "WPI_CMD_SET_LED";
84
		WPI_DESC(WPI_CMD_SET_LED);
82
	case WPI_CMD_SET_POWER_MODE:	return "WPI_CMD_SET_POWER_MODE";
85
		WPI_DESC(WPI_CMD_SET_POWER_MODE);
83
	case WPI_CMD_SCAN:		return "WPI_CMD_SCAN";
86
		WPI_DESC(WPI_CMD_SCAN);
84
	case WPI_CMD_SET_BEACON:	return "WPI_CMD_SET_BEACON";
87
		WPI_DESC(WPI_CMD_SET_BEACON);
85
	case WPI_CMD_TXPOWER:		return "WPI_CMD_TXPOWER";
88
		WPI_DESC(WPI_CMD_TXPOWER);
86
	case WPI_CMD_BT_COEX:		return "WPI_CMD_BT_COEX";
89
		WPI_DESC(WPI_CMD_BT_COEX);
87
90
88
	default:
91
	default:
89
		KASSERT(1, ("Unknown Command: %d\n", cmd));
92
		KASSERT(1, ("Unknown Command: %d\n", cmd));
Lines 91-96 Link Here
91
	}
94
	}
92
}
95
}
93
96
97
/*
98
 * Translate CSR code to string
99
 */
100
static const char *wpi_get_csr_string(int csr)
101
{
102
	switch (csr) {
103
		WPI_DESC(WPI_HW_IF_CONFIG);
104
		WPI_DESC(WPI_INT);
105
		WPI_DESC(WPI_INT_MASK);
106
		WPI_DESC(WPI_FH_INT);
107
		WPI_DESC(WPI_GPIO_IN);
108
		WPI_DESC(WPI_RESET);
109
		WPI_DESC(WPI_GP_CNTRL);
110
		WPI_DESC(WPI_EEPROM);
111
		WPI_DESC(WPI_EEPROM_GP);
112
		WPI_DESC(WPI_GIO);
113
		WPI_DESC(WPI_UCODE_GP1);
114
		WPI_DESC(WPI_UCODE_GP2);
115
		WPI_DESC(WPI_GIO_CHICKEN);
116
		WPI_DESC(WPI_ANA_PLL);
117
		WPI_DESC(WPI_DBG_HPET_MEM);
118
	default:
119
		KASSERT(1, ("Unknown CSR: %d\n", csr));
120
		return "UNKNOWN CSR";
121
	}
122
}
123
124
static const char *wpi_get_prph_string(int prph)
125
{
126
	switch (prph) {
127
		WPI_DESC(WPI_APMG_CLK_CTRL);
128
		WPI_DESC(WPI_APMG_PS);
129
		WPI_DESC(WPI_APMG_PCI_STT);
130
		WPI_DESC(WPI_APMG_RFKILL);
131
	default:
132
		KASSERT(1, ("Unknown register: %d\n", prph));
133
		return "UNKNOWN PRPH";
134
	}
135
}
136
94
#else
137
#else
95
#define DPRINTF(sc, m, ...)	do { (void) sc; } while (0)
138
#define DPRINTF(sc, m, ...)	do { (void) sc; } while (0)
96
#endif
139
#endif
(-)sys/dev/wpi/if_wpireg.h (+1 lines)
Lines 97-102 Link Here
97
#define WPI_ALM_SCHED_TXF5MF		0x2e20
97
#define WPI_ALM_SCHED_TXF5MF		0x2e20
98
#define WPI_ALM_SCHED_SBYPASS_MODE1	0x2e2c
98
#define WPI_ALM_SCHED_SBYPASS_MODE1	0x2e2c
99
#define WPI_ALM_SCHED_SBYPASS_MODE2	0x2e30
99
#define WPI_ALM_SCHED_SBYPASS_MODE2	0x2e30
100
#define WPI_APMG_CLK_CTRL		0x3000
100
#define WPI_APMG_CLK_EN			0x3004
101
#define WPI_APMG_CLK_EN			0x3004
101
#define WPI_APMG_CLK_DIS		0x3008
102
#define WPI_APMG_CLK_DIS		0x3008
102
#define WPI_APMG_PS			0x300c
103
#define WPI_APMG_PS			0x300c

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