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Lines 4881-4886
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| 4881 |
/* Set FH wait threshold to max (HW bug under stress workaround). */ |
4881 |
/* Set FH wait threshold to max (HW bug under stress workaround). */ |
| 4882 |
WPI_SETBITS(sc, WPI_DBG_HPET_MEM, 0xffff0000); |
4882 |
WPI_SETBITS(sc, WPI_DBG_HPET_MEM, 0xffff0000); |
| 4883 |
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4883 |
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4884 |
/* Cleanup. */ |
| 4885 |
wpi_prph_write(sc, WPI_APMG_CLK_DIS, 0x00000400); |
| 4886 |
wpi_prph_clrbits(sc, WPI_APMG_PS, 0x00000E00); |
| 4887 |
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| 4884 |
/* Retrieve PCIe Active State Power Management (ASPM). */ |
4888 |
/* Retrieve PCIe Active State Power Management (ASPM). */ |
| 4885 |
reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1); |
4889 |
reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1); |
| 4886 |
/* Workaround for HW instability in PCIe L0->L0s->L1 transition. */ |
4890 |
/* Workaround for HW instability in PCIe L0->L0s->L1 transition. */ |
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Lines 4903-4910
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| 4903 |
DELAY(20); |
4907 |
DELAY(20); |
| 4904 |
/* Disable L1-Active. */ |
4908 |
/* Disable L1-Active. */ |
| 4905 |
wpi_prph_setbits(sc, WPI_APMG_PCI_STT, WPI_APMG_PCI_STT_L1A_DIS); |
4909 |
wpi_prph_setbits(sc, WPI_APMG_PCI_STT, WPI_APMG_PCI_STT_L1A_DIS); |
| 4906 |
/* ??? */ |
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| 4907 |
wpi_prph_clrbits(sc, WPI_APMG_PS, 0x00000E00); |
| 4908 |
wpi_nic_unlock(sc); |
4910 |
wpi_nic_unlock(sc); |
| 4909 |
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4911 |
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| 4910 |
return 0; |
4912 |
return 0; |