Attachment #155083 for bug #199084

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#
# Custom kernel for PogoPlug V4 devices.
#
# $FreeBSD: $
#
#    http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
#
# The handbook is also available locally in /usr/share/doc/handbook
# if you've installed the doc distribution, otherwise always see the
# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
# latest information.
#
# An exhaustive list of options and more detailed explanations of the
# device lines is also present in the ../../conf/NOTES and NOTES files. 
# If you are in doubt as to the purpose or necessity of a line, check first 
# in NOTES.
#
# $FreeBSD: $
#

ident		POGOPLUGV4

include		"../mv/kirkwood/std.db88f6xxx"

makeoptions	FDT_DTS_FILE=pogoplugv4.dts

makeoptions	MODULES_OVERRIDE=""

options 	SOC_MV_KIRKWOOD
options		SOC_MV_88F6192		# To fix bad ID returned from 6192

options 	SCHED_4BSD		# 4BSD scheduler
options 	INET			# InterNETworking
options 	INET6			# IPv6 communications protocols
options 	SOFTUPDATES
options 	CD9660			# ISO 9660 filesystem
options 	FFS			# Berkeley Fast Filesystem
options 	TMPFS			# Efficient memory filesystem
options 	MSDOSFS			# MS DOS File System (FAT, FAT32)
options 	NULLFS			# NULL filesystem
options 	SYSVSHM			# SYSV-style shared memory
options 	SYSVMSG			# SYSV-style message queues
options 	SYSVSEM			# SYSV-style semaphores
options 	_KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions
options 	GEOM_PART_BSD		# BSD partition scheme
options 	GEOM_PART_MBR		# MBR partition scheme
options 	GEOM_ELI		# Disk encryption.
options 	GEOM_LABEL		# Providers labelization.
options 	GEOM_PART_GPT		# GPT partitioning

# Flattened Device Tree
device		fdt
options 	FDT
options 	FDT_DTB_STATIC

# Misc pseudo devices
device		bpf			# Required for DHCP
device  	faith			# IPv6-to-IPv4 relaying (translation)
device  	firmware		# firmware(9) required for USB wlan
device  	gif			# IPv6 and IPv4 tunneling
device		loop			# Network loopback
device  	md			# Memory/malloc disk
device		pty			# BSD-style compatibility pseudo ttys
device		random			# Entropy device
device  	tun			# Packet tunnel.
device		ether			# Required for all ethernet devices
device  	vlan			# 802.1Q VLAN support
device		wlan			# 802.11 WLAN support
device		wlan_wep		# 802.11 WEP support
device		wlan_ccmp		# 802.11 CCMP support
device		wlan_tkip		# 802.11 TKIP support


# cam support for umass and ahci
device		scbus
device		pass
device		da

# Serial ports
device		uart

# Networking
device		mge			# Marvell Gigabit Ethernet controller
device		mii
device		e1000phy

# PCI/PCIE
device		pci

# USB
options 	USB_HOST_ALIGN=32	# Align DMA to cacheline
#options	USB_DEBUG       	# Compile in USB debug support
device  	usb  			# Basic usb support			
device  	ehci 			# USB 2 host controller
device		xhci			# USB 3 host controller
device  	umass			# Mass storage
device  	uhid 			# Human-interface devices
device  	rum  			# Ralink Technology RT2501USB wireless NICs
device  	uath 			# Atheros AR5523 wireless NICs
device  	ural 			# Ralink Technology RT2500USB wireless NICs
device  	zyd  			# ZyDAS zb1211/zb1211b wireless NICs
#device  	urtw 			# Realtek RTL8187B/L USB
device          urtwn                   # Realtek RTL8192CU USB
device		urtwnfw			#   " firmware
device  	upgt 			# Conexant/Intersil PrismGT SoftMAC USB
device  	u3g  			# USB-based 3G modems (Option, Huawei, Sierra)

# I2C (TWSI)
device		iic
device		iicbus

# Sound
device 		sound
device 		snd_uaudio

#crypto
device  	cesa			# Marvell security engine
device  	crypto
device  	cryptodev

# IPSec
device  	enc
options  	IPSEC
options  	IPSEC_NAT_T
options  	TCP_SIGNATURE		# include support for RFC 2385

# IPFW
options  	IPFIREWALL
options  	IPFIREWALL_DEFAULT_TO_ACCEPT
options  	IPFIREWALL_VERBOSE
options  	IPFIREWALL_VERBOSE_LIMIT=100
options  	IPFIREWALL_NAT
options  	LIBALIAS
options  	DUMMYNET
options  	IPDIVERT

#PF 
device  	pf
device  	pflog
device  	pfsync

# ALTQ, required for PF
options  	ALTQ			# Basic ALTQ support
options  	ALTQ_CBQ		# Class Based Queueing
options  	ALTQ_RED		# Random Early Detection
options  	ALTQ_RIO		# RED In/Out
options  	ALTQ_HFSC		# Hierarchical Packet Scheduler
options  	ALTQ_CDNR		# Traffic conditioner
options  	ALTQ_PRIQ		# Priority Queueing
options  	ALTQ_NOPCC		# Required if the TSC is unusable
#options 	ALTQ_DEBUG

# Debugging
makeoptions 	DEBUG=-g		# Build kernel with gdb(1) debug symbols
options 	BREAK_TO_DEBUGGER
options 	ALT_BREAK_TO_DEBUGGER
options 	DDB
options 	KDB
#options 	DIAGNOSTIC
#options 	INVARIANTS		# Enable calls of extra sanity checking
#options 	INVARIANT_SUPPORT	# Extra sanity checks of internal structures, required by INVARIANTS
#options 	WITNESS			# Enable checks to detect deadlocks and cycles
#options 	WITNESS_SKIPSPIN	# Don't run witness on spinlocks for speed
#options 	WITNESS_KDB

# Enable these options for nfs root configured via BOOTP.
options 	NFSCL			# Network Filesystem Client
options 	NFSLOCKD		# Network Lock Manager
#options 	NFS_ROOT		# NFS usable as /, requires NFSCLIENT
#options 	BOOTP
#options 	BOOTP_NFSROOT
#options 	BOOTP_NFSV3
#options 	BOOTP_WIRED_TO=mge0

# If not using BOOTP, use something like one of these...
#options 	ROOTDEVNAME=\"ufs:/dev/da0a\"
#options 	ROOTDEVNAME=\"ufs:/dev/da0s1a\"
# Using this option requires the root file system to be labeled 'kirkwoodroot'
options		ROOTDEVNAME=\"ufs:/dev/ufs/kirkwoodroot\"
#options 	ROOTDEVNAME=\"ufs:/dev/da0p10\"
#options 	ROOTDEVNAME=\"nfs:192.168.0.254/pogoplugv4\"


Lines 158-163 mv_gpio_attach(device_t dev) Link Here

(-)b/sys/arm/mv/gpio.c (+4 lines)
158	sc->pin_num = 32;	158	sc->pin_num = 32;
159	sc->irq_num = 4;	159	sc->irq_num = 4;
160		160
		161	} else if (dev_id == MV_DEV_88F6192) {
		162	sc->pin_num = 36;
		163	sc->irq_num = 7; /* ???? */
		164
161	} else if (dev_id == MV_DEV_88F6281 \|\|	165	} else if (dev_id == MV_DEV_88F6281 \|\|
162	dev_id == MV_DEV_88F6282) {	166	dev_id == MV_DEV_88F6282) {
163	sc->pin_num = 50;	167	sc->pin_num = 50;

Lines 108-114 mv_ic_attach(device_t dev) Link Here

(-)b/sys/arm/mv/ic.c (-1 / +2 lines)
108	sc->ic_high_regs = 0;	108	sc->ic_high_regs = 0;
109	sc->ic_error_regs = 0;	109	sc->ic_error_regs = 0;
110		110
111	if (dev_id == MV_DEV_88F6281 \|\|	111	if (dev_id == MV_DEV_88F6192 \|\|
		112	dev_id == MV_DEV_88F6281 \|\|
112	dev_id == MV_DEV_88F6282 \|\|	113	dev_id == MV_DEV_88F6282 \|\|
113	dev_id == MV_DEV_MV78100 \|\|	114	dev_id == MV_DEV_MV78100 \|\|
114	dev_id == MV_DEV_MV78100_Z0)	115	dev_id == MV_DEV_MV78100_Z0)

Lines 315-320 cpu_extra_feat(void) Link Here

(-)b/sys/arm/mv/mv_common.c (+19 lines)
315	soc_id(&dev, &rev);	315	soc_id(&dev, &rev);
316		316
317	switch (dev) {	317	switch (dev) {
		318	case MV_DEV_88F6192:
318	case MV_DEV_88F6281:	319	case MV_DEV_88F6281:
319	case MV_DEV_88F6282:	320	case MV_DEV_88F6282:
320	case MV_DEV_88RC8180:	321	case MV_DEV_88RC8180:
Lines 378-383 soc_id(uint32_t dev, uint32_t rev) Link Here
378	*/	379	*/
379	*dev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 0) >> 16;	380	*dev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 0) >> 16;
380	*rev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 8) & 0xff;	381	*rev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 8) & 0xff;
		382
		383	#ifdef SOC_MV_88F6192
		384	/* 88F6192 appears to return 0x6281! */
		385	if (*dev == MV_DEV_88F6281)
		386	*dev = MV_DEV_88F6192;
		387	#endif
381	}	388	}
382		389
383	static void	390	static void
Lines 414-419 soc_identify(void) Link Here
414	else if (r == 6)	421	else if (r == 6)
415	rev = "D2";	422	rev = "D2";
416	break;	423	break;
		424	case MV_DEV_88F6192:
		425	dev = "Marvell 88F6192";
		426	if (r == 0)
		427	rev = "Z0";
		428	else if (r == 2)
		429	rev = "A0";
		430	else if (r == 3)
		431	rev = "A1";
		432	break;
417	case MV_DEV_88F6281:	433	case MV_DEV_88F6281:
418	dev = "Marvell 88F6281";	434	dev = "Marvell 88F6281";
419	if (r == 0)	435	if (r == 0)
Lines 475-480 soc_identify(void) Link Here
475	(mode & CPU_CONFIG_DC_PREF) ? "enabled" : "disabled");	491	(mode & CPU_CONFIG_DC_PREF) ? "enabled" : "disabled");
476		492
477	switch (d) {	493	switch (d) {
		494	case MV_DEV_88F6192:
478	case MV_DEV_88F6281:	495	case MV_DEV_88F6281:
479	case MV_DEV_88F6282:	496	case MV_DEV_88F6282:
480	mode = read_cpu_ctrl(CPU_L2_CONFIG) & CPU_L2_CONFIG_MODE;	497	mode = read_cpu_ctrl(CPU_L2_CONFIG) & CPU_L2_CONFIG_MODE;
Lines 719-724 win_cpu_can_remap(int i) Link Here
719	/* Depending on the SoC certain windows have remap capability */	736	/* Depending on the SoC certain windows have remap capability */
720	if ((dev == MV_DEV_88F5182 && i < 2) \|\|	737	if ((dev == MV_DEV_88F5182 && i < 2) \|\|
721	(dev == MV_DEV_88F5281 && i < 4) \|\|	738	(dev == MV_DEV_88F5281 && i < 4) \|\|
		739	(dev == MV_DEV_88F6192 && i < 4) \|\|
722	(dev == MV_DEV_88F6281 && i < 4) \|\|	740	(dev == MV_DEV_88F6281 && i < 4) \|\|
723	(dev == MV_DEV_88F6282 && i < 4) \|\|	741	(dev == MV_DEV_88F6282 && i < 4) \|\|
724	(dev == MV_DEV_88RC8180 && i < 2) \|\|	742	(dev == MV_DEV_88RC8180 && i < 2) \|\|
Lines 1628-1633 xor_max_eng(void) Link Here
1628		1646
1629	soc_id(&dev, &rev);	1647	soc_id(&dev, &rev);
1630	switch (dev) {	1648	switch (dev) {
		1649	case MV_DEV_88F6192:
1631	case MV_DEV_88F6281:	1650	case MV_DEV_88F6281:
1632	case MV_DEV_88F6282:	1651	case MV_DEV_88F6282:
1633	case MV_DEV_MV78130:	1652	case MV_DEV_MV78130:

Lines 412-417 Link Here

(-)b/sys/arm/mv/mvreg.h (+1 lines)
412	#define MV_DEV_88F5181 0x5181	412	#define MV_DEV_88F5181 0x5181
413	#define MV_DEV_88F5182 0x5182	413	#define MV_DEV_88F5182 0x5182
414	#define MV_DEV_88F5281 0x5281	414	#define MV_DEV_88F5281 0x5281
		415	#define MV_DEV_88F6192 0x6192
415	#define MV_DEV_88F6281 0x6281	416	#define MV_DEV_88F6281 0x6281
416	#define MV_DEV_88F6282 0x6282	417	#define MV_DEV_88F6282 0x6282
417	#define MV_DEV_88F6781 0x6781	418	#define MV_DEV_88F6781 0x6781




/*
 * Copyright (c) 2015 The FreeBSD Foundation
 * All rights reserved.
 *
 * This software was developed by Semihalf under sponsorship from
 * the FreeBSD Foundation.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * PogoPlug V4 (Marvell 88F6192) Device Tree Source.
 *
 * $FreeBSD: $
 */

/dts-v1/;

/ {
	model = "pogoplug,V4";
	compatible = "PogoPlugV4";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		mpp = &MPP;
		pci0 = &pci0;
		serial0 = &serial0;
		serial1 = &serial1;
		soc = &SOC;
		sram = &SRAM;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "ARM,88FR131";
			reg = <0x0>;
			d-cache-line-size = <32>;	// 32 bytes
			i-cache-line-size = <32>;	// 32 bytes
			d-cache-size = <0x4000>;	// L1, 16K
			i-cache-size = <0x4000>;	// L1, 16K
			timebase-frequency = <0>;
			bus-frequency = <0>;
			clock-frequency = <0>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x8000000>;		// 128M at 0x0
	};

	localbus@f1000000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "mrvl,lbc";

		/* This reflects CPU decode windows setup for NAND access. */
		ranges = <0x0 0x2f 0xf9300000 0x00100000>;

		nand@0,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "mrvl,nfc";
			reg = <0x0 0x0 0x00100000>;
			bank-width = <2>;
			device-width = <1>;
		};
	};

	SOC: soc88f6192@f1000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges = <0x0 0xf1000000 0x00100000>;
		bus-frequency = <0>;

		PIC: pic@20200 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <1>;
			reg = <0x20200 0x3c>;
			compatible = "mrvl,pic";
		};

		timer@20300 {
			compatible = "mrvl,timer";
			reg = <0x20300 0x30>;
			interrupts = <1>;
			interrupt-parent = <&PIC>;
			mrvl,has-wdt;
		};

		MPP: mpp@10000 {
			#pin-cells = <2>;
			compatible = "mrvl,mpp";
			reg = <0x10000 0x34>;
			pin-count = <36>;
			pin-map = <
				0  1		/* MPP[0]:  NF_IO[2] */
				1  1		/* MPP[1]:  NF_IO[3] */
				2  1		/* MPP[2]:  NF_IO[4] */
				3  1		/* MPP[3]:  NF_IO[5] */
				4  1		/* MPP[4]:  NF_IO[6] */
				5  1		/* MPP[5]:  NF_IO[7] */
				6  1		/* MPP[6]:  SYSRST_OUTn */
				8  2		/* MPP[8]:  UA0_RTS */
				9  2		/* MPP[9]:  UA0_CTS */
				10 3		/* MPP[10]: UA0_TXD */
				11 3		/* MPP[11]: UA0_RXD */
				12 1		/* MPP[12]: SD_CLK */
				13 1		/* MPP[13]: SD_CMD */
				14 1		/* MPP[14]: SD_D[0] */
				15 1		/* MPP[15]: SD_D[1] */
				16 1		/* MPP[16]: SD_D[2] */
				17 1		/* MPP[17]: SD_D[3] */
				18 1		/* MPP[18]: NF_IO[0] */
				19 1		/* MPP[19]: NF_IO[1] */
				20 5		/* MPP[20]: SATA1_AC */
				21 5		/* MPP[21]: SATA0_AC */
				29 1 >;		/* MPP[29]: TSMP[9] */
		};

		GPIO: gpio@10100 {
			#gpio-cells = <3>;
			compatible = "mrvl,gpio";
			reg = <0x10100 0x20>;
			gpio-controller;
			interrupts = <35 36 37 38 39 40 41>;
			interrupt-parent = <&PIC>;
		};

		rtc@10300 {
			compatible = "mrvl,rtc";
			reg = <0x10300 0x08>;
		};

		twsi@11000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "mrvl,twsi";
			reg = <0x11000 0x20>;
			interrupts = <43>;
			interrupt-parent = <&PIC>;
		};

		enet0: ethernet@72000 {
			#address-cells = <1>;
			#size-cells = <1>;
			model = "V2";
			compatible = "mrvl,ge";
			reg = <0x72000 0x2000>;
			ranges = <0x0 0x72000 0x2000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <12 13 14 11 46>;
			interrupt-parent = <&PIC>;
			phy-handle = <&phy0>;

			mdio@0 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "mrvl,mdio";

				phy0: ethernet-phy@0 {
					reg = <0x0>;
				};
			};
		};

		serial0: serial@12000 {
			compatible = "ns16550";
			reg = <0x12000 0x20>;
			reg-shift = <2>;
			clock-frequency = <0>;
			interrupts = <33>;
			interrupt-parent = <&PIC>;
		};

		serial1: serial@12100 {
			compatible = "ns16550";
			reg = <0x12100 0x20>;
			reg-shift = <2>;
			clock-frequency = <0>;
			interrupts = <34>;
			interrupt-parent = <&PIC>;
		};

		crypto@30000 {
			compatible = "mrvl,cesa";
			reg = <0x30000 0x10000>;
			interrupts = <22>;
			interrupt-parent = <&PIC>;

			sram-handle = <&SRAM>;
		};

		usb@50000 {
			compatible = "mrvl,usb-ehci", "usb-ehci";
			reg = <0x50000 0x1000>;
			interrupts = <48 19>;
			interrupt-parent = <&PIC>;
		};

		xor@60000 {
			compatible = "mrvl,xor";
			reg = <0x60000 0x1000>;
			interrupts = <5 6 7 8>;
			interrupt-parent = <&PIC>;
		};

		sata@80000 {
			compatible = "mrvl,sata";
			reg = <0x80000 0x6000>;
			interrupts = <21>;
			interrupt-parent = <&PIC>;
		};
	};

	SRAM: sram@fd000000 {
		compatible = "mrvl,cesa-sram";
		reg = <0xfd000000 0x00100000>;
	};

	pci0: pcie@f1040000 {
		compatible = "mrvl,pcie";
		device_type = "pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xf1040000 0x2000>;
		bus-range = <0 255>;
		ranges = <0x02000000 0x0 0xf1300000 0xf1300000 0x0 0x04000000
			  0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>;
		clock-frequency = <33333333>;
		interrupt-parent = <&PIC>;
		interrupts = <44>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
			/* IDSEL 0x1 */
			0x0800 0x0 0x0 0x1 &PIC 0x9
			0x0800 0x0 0x0 0x2 &PIC 0x9
			0x0800 0x0 0x0 0x3 &PIC 0x9
			0x0800 0x0 0x0 0x4 &PIC 0x9
			>;
		pcie@0 {
			reg = <0x0 0x0 0x0 0x0 0x0>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			ranges = <0x02000000 0x0 0xf1300000
				  0x02000000 0x0 0xf1300000
				  0x0 0x04000000

				  0x01000000 0x0 0x0
				  0x01000000 0x0 0x0
				  0x0 0x00100000>;
		};
	};

	chosen {
		stdin = "serial0";
		stdout = "serial0";
	};
};

Lines 42-47 SOC_MV_DISCOVERY opt_global.h Link Here

(-)b/sys/conf/options.arm (+1 lines)
42	SOC_MV_DOVE opt_global.h	42	SOC_MV_DOVE opt_global.h
43	SOC_MV_FREY opt_global.h	43	SOC_MV_FREY opt_global.h
44	SOC_MV_KIRKWOOD opt_global.h	44	SOC_MV_KIRKWOOD opt_global.h
		45	SOC_MV_88F6192 opt_global.h
45	SOC_MV_LOKIPLUS opt_global.h	46	SOC_MV_LOKIPLUS opt_global.h
46	SOC_MV_ORION opt_global.h	47	SOC_MV_ORION opt_global.h
47	SOC_OMAP3 opt_global.h	48	SOC_OMAP3 opt_global.h

Lines 1007-1012 cesa_attach(device_t dev) Link Here

(-)b/sys/dev/cesa/cesa.c (+1 lines)
1007	soc_id(&d, &r);	1007	soc_id(&d, &r);
1008		1008
1009	switch (d) {	1009	switch (d) {
		1010	case MV_DEV_88F6192:
1010	case MV_DEV_88F6281:	1011	case MV_DEV_88F6281:
1011	case MV_DEV_88F6282:	1012	case MV_DEV_88F6282:
1012	sc->sc_tperr = 0;	1013	sc->sc_tperr = 0;

Lines 260-267 mge_ver_params(struct mge_softc *sc) Link Here

(-)b/sys/dev/mge/if_mge.c (-1 / +3 lines)
260	uint32_t d, r;	260	uint32_t d, r;
261		261
262	soc_id(&d, &r);	262	soc_id(&d, &r);
263	if (d == MV_DEV_88F6281 \|\| d == MV_DEV_88F6781 \|\|	263	if (d == MV_DEV_88F6192 \|\|
		264	d == MV_DEV_88F6281 \|\|
264	d == MV_DEV_88F6282 \|\|	265	d == MV_DEV_88F6282 \|\|
		266	d == MV_DEV_88F6781 \|\|
265	d == MV_DEV_MV78100 \|\|	267	d == MV_DEV_MV78100 \|\|
266	d == MV_DEV_MV78100_Z0 \|\|	268	d == MV_DEV_MV78100_Z0 \|\|
267	(d & MV_DEV_FAMILY_MASK) == MV_DEV_DISCOVERY) {	269	(d & MV_DEV_FAMILY_MASK) == MV_DEV_DISCOVERY) {

Lines 62-67 static struct { Link Here

(-)b/sys/dev/mvs/mvs_soc.c (+1 lines)
62	int quirks;	62	int quirks;
63	} mvs_ids[] = {	63	} mvs_ids[] = {
64	{MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE\|MVS_Q_SOC},	64	{MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE\|MVS_Q_SOC},
		65	{MV_DEV_88F6192, 0x00, "Marvell 88F6192", 2, MVS_Q_GENIIE\|MVS_Q_SOC},
65	{MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE\|MVS_Q_SOC},	66	{MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE\|MVS_Q_SOC},
66	{MV_DEV_88F6282, 0x00, "Marvell 88F6282", 2, MVS_Q_GENIIE\|MVS_Q_SOC},	67	{MV_DEV_88F6282, 0x00, "Marvell 88F6282", 2, MVS_Q_GENIIE\|MVS_Q_SOC},
67	{MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE\|MVS_Q_SOC},	68	{MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE\|MVS_Q_SOC},

Return to bug 199084

Added Link Here

(-)b/sys/arm/conf/POGOPLUGV4 (+182 lines)
1	#
2	# Custom kernel for PogoPlug V4 devices.
3	#
4	# $FreeBSD: $
5	#
6	# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
7	#
8	# The handbook is also available locally in /usr/share/doc/handbook
9	# if you've installed the doc distribution, otherwise always see the
10	# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
11	# latest information.
12	#
13	# An exhaustive list of options and more detailed explanations of the
14	# device lines is also present in the ../../conf/NOTES and NOTES files.
15	# If you are in doubt as to the purpose or necessity of a line, check first
16	# in NOTES.
17	#
18	# $FreeBSD: $
19	#
20
21	ident POGOPLUGV4
22
23	include "../mv/kirkwood/std.db88f6xxx"
24
25	makeoptions FDT_DTS_FILE=pogoplugv4.dts
26
27	makeoptions MODULES_OVERRIDE=""
28
29	options SOC_MV_KIRKWOOD
30	options SOC_MV_88F6192 # To fix bad ID returned from 6192
31
32	options SCHED_4BSD # 4BSD scheduler
33	options INET # InterNETworking
34	options INET6 # IPv6 communications protocols
35	options SOFTUPDATES
36	options CD9660 # ISO 9660 filesystem
37	options FFS # Berkeley Fast Filesystem
38	options TMPFS # Efficient memory filesystem
39	options MSDOSFS # MS DOS File System (FAT, FAT32)
40	options NULLFS # NULL filesystem
41	options SYSVSHM # SYSV-style shared memory
42	options SYSVMSG # SYSV-style message queues
43	options SYSVSEM # SYSV-style semaphores
44	options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions
45	options GEOM_PART_BSD # BSD partition scheme
46	options GEOM_PART_MBR # MBR partition scheme
47	options GEOM_ELI # Disk encryption.
48	options GEOM_LABEL # Providers labelization.
49	options GEOM_PART_GPT # GPT partitioning
50
51	# Flattened Device Tree
52	device fdt
53	options FDT
54	options FDT_DTB_STATIC
55
56	# Misc pseudo devices
57	device bpf # Required for DHCP
58	device faith # IPv6-to-IPv4 relaying (translation)
59	device firmware # firmware(9) required for USB wlan
60	device gif # IPv6 and IPv4 tunneling
61	device loop # Network loopback
62	device md # Memory/malloc disk
63	device pty # BSD-style compatibility pseudo ttys
64	device random # Entropy device
65	device tun # Packet tunnel.
66	device ether # Required for all ethernet devices
67	device vlan # 802.1Q VLAN support
68	device wlan # 802.11 WLAN support
69	device wlan_wep # 802.11 WEP support
70	device wlan_ccmp # 802.11 CCMP support
71	device wlan_tkip # 802.11 TKIP support
72
73
74	# cam support for umass and ahci
75	device scbus
76	device pass
77	device da
78
79	# Serial ports
80	device uart
81
82	# Networking
83	device mge # Marvell Gigabit Ethernet controller
84	device mii
85	device e1000phy
86
87	# PCI/PCIE
88	device pci
89
90	# USB
91	options USB_HOST_ALIGN=32 # Align DMA to cacheline
92	#options USB_DEBUG # Compile in USB debug support
93	device usb # Basic usb support
94	device ehci # USB 2 host controller
95	device xhci # USB 3 host controller
96	device umass # Mass storage
97	device uhid # Human-interface devices
98	device rum # Ralink Technology RT2501USB wireless NICs
99	device uath # Atheros AR5523 wireless NICs
100	device ural # Ralink Technology RT2500USB wireless NICs
101	device zyd # ZyDAS zb1211/zb1211b wireless NICs
102	#device urtw # Realtek RTL8187B/L USB
103	device urtwn # Realtek RTL8192CU USB
104	device urtwnfw # " firmware
105	device upgt # Conexant/Intersil PrismGT SoftMAC USB
106	device u3g # USB-based 3G modems (Option, Huawei, Sierra)
107
108	# I2C (TWSI)
109	device iic
110	device iicbus
111
112	# Sound
113	device sound
114	device snd_uaudio
115
116	#crypto
117	device cesa # Marvell security engine
118	device crypto
119	device cryptodev
120
121	# IPSec
122	device enc
123	options IPSEC
124	options IPSEC_NAT_T
125	options TCP_SIGNATURE # include support for RFC 2385
126
127	# IPFW
128	options IPFIREWALL
129	options IPFIREWALL_DEFAULT_TO_ACCEPT
130	options IPFIREWALL_VERBOSE
131	options IPFIREWALL_VERBOSE_LIMIT=100
132	options IPFIREWALL_NAT
133	options LIBALIAS
134	options DUMMYNET
135	options IPDIVERT
136
137	#PF
138	device pf
139	device pflog
140	device pfsync
141
142	# ALTQ, required for PF
143	options ALTQ # Basic ALTQ support
144	options ALTQ_CBQ # Class Based Queueing
145	options ALTQ_RED # Random Early Detection
146	options ALTQ_RIO # RED In/Out
147	options ALTQ_HFSC # Hierarchical Packet Scheduler
148	options ALTQ_CDNR # Traffic conditioner
149	options ALTQ_PRIQ # Priority Queueing
150	options ALTQ_NOPCC # Required if the TSC is unusable
151	#options ALTQ_DEBUG
152
153	# Debugging
154	makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
155	options BREAK_TO_DEBUGGER
156	options ALT_BREAK_TO_DEBUGGER
157	options DDB
158	options KDB
159	#options DIAGNOSTIC
160	#options INVARIANTS # Enable calls of extra sanity checking
161	#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS
162	#options WITNESS # Enable checks to detect deadlocks and cycles
163	#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed
164	#options WITNESS_KDB
165
166	# Enable these options for nfs root configured via BOOTP.
167	options NFSCL # Network Filesystem Client
168	options NFSLOCKD # Network Lock Manager
169	#options NFS_ROOT # NFS usable as /, requires NFSCLIENT
170	#options BOOTP
171	#options BOOTP_NFSROOT
172	#options BOOTP_NFSV3
173	#options BOOTP_WIRED_TO=mge0
174
175	# If not using BOOTP, use something like one of these...
176	#options ROOTDEVNAME=\"ufs:/dev/da0a\"
177	#options ROOTDEVNAME=\"ufs:/dev/da0s1a\"
178	# Using this option requires the root file system to be labeled 'kirkwoodroot'
179	options ROOTDEVNAME=\"ufs:/dev/ufs/kirkwoodroot\"
180	#options ROOTDEVNAME=\"ufs:/dev/da0p10\"
181	#options ROOTDEVNAME=\"nfs:192.168.0.254/pogoplugv4\"
182

Added Link Here

(-)b/sys/boot/fdt/dts/arm/pogoplugv4.dts (+286 lines)
1	/*
2	* Copyright (c) 2015 The FreeBSD Foundation
3	* All rights reserved.
4	*
5	* This software was developed by Semihalf under sponsorship from
6	* the FreeBSD Foundation.
7	*
8	* Redistribution and use in source and binary forms, with or without
9	* modification, are permitted provided that the following conditions
10	* are met:
11	* 1. Redistributions of source code must retain the above copyright
12	* notice, this list of conditions and the following disclaimer.
13	* 2. Redistributions in binary form must reproduce the above copyright
14	* notice, this list of conditions and the following disclaimer in the
15	* documentation and/or other materials provided with the distribution.
16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27	* SUCH DAMAGE.
28	*
29	* PogoPlug V4 (Marvell 88F6192) Device Tree Source.
30	*
31	* $FreeBSD: $
32	*/
33
34	/dts-v1/;
35
36	/ {
37	model = "pogoplug,V4";
38	compatible = "PogoPlugV4";
39	#address-cells = <1>;
40	#size-cells = <1>;
41
42	aliases {
43	ethernet0 = &enet0;
44	mpp = &MPP;
45	pci0 = &pci0;
46	serial0 = &serial0;
47	serial1 = &serial1;
48	soc = &SOC;
49	sram = &SRAM;
50	};
51
52	cpus {
53	#address-cells = <1>;
54	#size-cells = <0>;
55
56	cpu@0 {
57	device_type = "cpu";
58	compatible = "ARM,88FR131";
59	reg = <0x0>;
60	d-cache-line-size = <32>; // 32 bytes
61	i-cache-line-size = <32>; // 32 bytes
62	d-cache-size = <0x4000>; // L1, 16K
63	i-cache-size = <0x4000>; // L1, 16K
64	timebase-frequency = <0>;
65	bus-frequency = <0>;
66	clock-frequency = <0>;
67	};
68	};
69
70	memory {
71	device_type = "memory";
72	reg = <0x0 0x8000000>; // 128M at 0x0
73	};
74
75	localbus@f1000000 {
76	#address-cells = <2>;
77	#size-cells = <1>;
78	compatible = "mrvl,lbc";
79
80	/* This reflects CPU decode windows setup for NAND access. */
81	ranges = <0x0 0x2f 0xf9300000 0x00100000>;
82
83	nand@0,0 {
84	#address-cells = <1>;
85	#size-cells = <1>;
86	compatible = "mrvl,nfc";
87	reg = <0x0 0x0 0x00100000>;
88	bank-width = <2>;
89	device-width = <1>;
90	};
91	};
92
93	SOC: soc88f6192@f1000000 {
94	#address-cells = <1>;
95	#size-cells = <1>;
96	compatible = "simple-bus";
97	ranges = <0x0 0xf1000000 0x00100000>;
98	bus-frequency = <0>;
99
100	PIC: pic@20200 {
101	interrupt-controller;
102	#address-cells = <0>;
103	#interrupt-cells = <1>;
104	reg = <0x20200 0x3c>;
105	compatible = "mrvl,pic";
106	};
107
108	timer@20300 {
109	compatible = "mrvl,timer";
110	reg = <0x20300 0x30>;
111	interrupts = <1>;
112	interrupt-parent = <&PIC>;
113	mrvl,has-wdt;
114	};
115
116	MPP: mpp@10000 {
117	#pin-cells = <2>;
118	compatible = "mrvl,mpp";
119	reg = <0x10000 0x34>;
120	pin-count = <36>;
121	pin-map = <
122	0 1 /* MPP[0]: NF_IO[2] */
123	1 1 /* MPP[1]: NF_IO[3] */
124	2 1 /* MPP[2]: NF_IO[4] */
125	3 1 /* MPP[3]: NF_IO[5] */
126	4 1 /* MPP[4]: NF_IO[6] */
127	5 1 /* MPP[5]: NF_IO[7] */
128	6 1 /* MPP[6]: SYSRST_OUTn */
129	8 2 /* MPP[8]: UA0_RTS */
130	9 2 /* MPP[9]: UA0_CTS */
131	10 3 /* MPP[10]: UA0_TXD */
132	11 3 /* MPP[11]: UA0_RXD */
133	12 1 /* MPP[12]: SD_CLK */
134	13 1 /* MPP[13]: SD_CMD */
135	14 1 /* MPP[14]: SD_D[0] */
136	15 1 /* MPP[15]: SD_D[1] */
137	16 1 /* MPP[16]: SD_D[2] */
138	17 1 /* MPP[17]: SD_D[3] */
139	18 1 /* MPP[18]: NF_IO[0] */
140	19 1 /* MPP[19]: NF_IO[1] */
141	20 5 /* MPP[20]: SATA1_AC */
142	21 5 /* MPP[21]: SATA0_AC */
143	29 1 >; /* MPP[29]: TSMP[9] */
144	};
145
146	GPIO: gpio@10100 {
147	#gpio-cells = <3>;
148	compatible = "mrvl,gpio";
149	reg = <0x10100 0x20>;
150	gpio-controller;
151	interrupts = <35 36 37 38 39 40 41>;
152	interrupt-parent = <&PIC>;
153	};
154
155	rtc@10300 {
156	compatible = "mrvl,rtc";
157	reg = <0x10300 0x08>;
158	};
159
160	twsi@11000 {
161	#address-cells = <1>;
162	#size-cells = <0>;
163	compatible = "mrvl,twsi";
164	reg = <0x11000 0x20>;
165	interrupts = <43>;
166	interrupt-parent = <&PIC>;
167	};
168
169	enet0: ethernet@72000 {
170	#address-cells = <1>;
171	#size-cells = <1>;
172	model = "V2";
173	compatible = "mrvl,ge";
174	reg = <0x72000 0x2000>;
175	ranges = <0x0 0x72000 0x2000>;
176	local-mac-address = [ 00 00 00 00 00 00 ];
177	interrupts = <12 13 14 11 46>;
178	interrupt-parent = <&PIC>;
179	phy-handle = <&phy0>;
180
181	mdio@0 {
182	#address-cells = <1>;
183	#size-cells = <0>;
184	compatible = "mrvl,mdio";
185
186	phy0: ethernet-phy@0 {
187	reg = <0x0>;
188	};
189	};
190	};
191
192	serial0: serial@12000 {
193	compatible = "ns16550";
194	reg = <0x12000 0x20>;
195	reg-shift = <2>;
196	clock-frequency = <0>;
197	interrupts = <33>;
198	interrupt-parent = <&PIC>;
199	};
200
201	serial1: serial@12100 {
202	compatible = "ns16550";
203	reg = <0x12100 0x20>;
204	reg-shift = <2>;
205	clock-frequency = <0>;
206	interrupts = <34>;
207	interrupt-parent = <&PIC>;
208	};
209
210	crypto@30000 {
211	compatible = "mrvl,cesa";
212	reg = <0x30000 0x10000>;
213	interrupts = <22>;
214	interrupt-parent = <&PIC>;
215
216	sram-handle = <&SRAM>;
217	};
218
219	usb@50000 {
220	compatible = "mrvl,usb-ehci", "usb-ehci";
221	reg = <0x50000 0x1000>;
222	interrupts = <48 19>;
223	interrupt-parent = <&PIC>;
224	};
225
226	xor@60000 {
227	compatible = "mrvl,xor";
228	reg = <0x60000 0x1000>;
229	interrupts = <5 6 7 8>;
230	interrupt-parent = <&PIC>;
231	};
232
233	sata@80000 {
234	compatible = "mrvl,sata";
235	reg = <0x80000 0x6000>;
236	interrupts = <21>;
237	interrupt-parent = <&PIC>;
238	};
239	};
240
241	SRAM: sram@fd000000 {
242	compatible = "mrvl,cesa-sram";
243	reg = <0xfd000000 0x00100000>;
244	};
245
246	pci0: pcie@f1040000 {
247	compatible = "mrvl,pcie";
248	device_type = "pci";
249	#interrupt-cells = <1>;
250	#size-cells = <2>;
251	#address-cells = <3>;
252	reg = <0xf1040000 0x2000>;
253	bus-range = <0 255>;
254	ranges = <0x02000000 0x0 0xf1300000 0xf1300000 0x0 0x04000000
255	0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>;
256	clock-frequency = <33333333>;
257	interrupt-parent = <&PIC>;
258	interrupts = <44>;
259	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
260	interrupt-map = <
261	/* IDSEL 0x1 */
262	0x0800 0x0 0x0 0x1 &PIC 0x9
263	0x0800 0x0 0x0 0x2 &PIC 0x9
264	0x0800 0x0 0x0 0x3 &PIC 0x9
265	0x0800 0x0 0x0 0x4 &PIC 0x9
266	>;
267	pcie@0 {
268	reg = <0x0 0x0 0x0 0x0 0x0>;
269	#size-cells = <2>;
270	#address-cells = <3>;
271	device_type = "pci";
272	ranges = <0x02000000 0x0 0xf1300000
273	0x02000000 0x0 0xf1300000
274	0x0 0x04000000
275
276	0x01000000 0x0 0x0
277	0x01000000 0x0 0x0
278	0x0 0x00100000>;
279	};
280	};
281
282	chosen {
283	stdin = "serial0";
284	stdout = "serial0";
285	};
286	};