Lines 152-162
Link Here
|
152 |
static void wpi_free_fwmem(struct wpi_softc *); |
152 |
static void wpi_free_fwmem(struct wpi_softc *); |
153 |
static int wpi_alloc_rx_ring(struct wpi_softc *); |
153 |
static int wpi_alloc_rx_ring(struct wpi_softc *); |
154 |
static void wpi_update_rx_ring(struct wpi_softc *); |
154 |
static void wpi_update_rx_ring(struct wpi_softc *); |
|
|
155 |
static void wpi_update_rx_ring_ps(struct wpi_softc *); |
155 |
static void wpi_reset_rx_ring(struct wpi_softc *); |
156 |
static void wpi_reset_rx_ring(struct wpi_softc *); |
156 |
static void wpi_free_rx_ring(struct wpi_softc *); |
157 |
static void wpi_free_rx_ring(struct wpi_softc *); |
157 |
static int wpi_alloc_tx_ring(struct wpi_softc *, struct wpi_tx_ring *, |
158 |
static int wpi_alloc_tx_ring(struct wpi_softc *, struct wpi_tx_ring *, |
158 |
int); |
159 |
int); |
159 |
static void wpi_update_tx_ring(struct wpi_softc *, struct wpi_tx_ring *); |
160 |
static void wpi_update_tx_ring(struct wpi_softc *, struct wpi_tx_ring *); |
|
|
161 |
static void wpi_update_tx_ring_ps(struct wpi_softc *, |
162 |
struct wpi_tx_ring *); |
160 |
static void wpi_reset_tx_ring(struct wpi_softc *, struct wpi_tx_ring *); |
163 |
static void wpi_reset_tx_ring(struct wpi_softc *, struct wpi_tx_ring *); |
161 |
static void wpi_free_tx_ring(struct wpi_softc *, struct wpi_tx_ring *); |
164 |
static void wpi_free_tx_ring(struct wpi_softc *, struct wpi_tx_ring *); |
162 |
static int wpi_read_eeprom(struct wpi_softc *, |
165 |
static int wpi_read_eeprom(struct wpi_softc *, |
Lines 521-526
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|
521 |
ic->ic_scan_mindwell = wpi_scan_mindwell; |
524 |
ic->ic_scan_mindwell = wpi_scan_mindwell; |
522 |
ic->ic_setregdomain = wpi_setregdomain; |
525 |
ic->ic_setregdomain = wpi_setregdomain; |
523 |
|
526 |
|
|
|
527 |
sc->sc_update_rx_ring = wpi_update_rx_ring; |
528 |
sc->sc_update_tx_ring = wpi_update_tx_ring; |
529 |
|
524 |
wpi_radiotap_attach(sc); |
530 |
wpi_radiotap_attach(sc); |
525 |
|
531 |
|
526 |
callout_init_mtx(&sc->calib_to, &sc->rxon_mtx, 0); |
532 |
callout_init_mtx(&sc->calib_to, &sc->rxon_mtx, 0); |
Lines 1089-1094
Link Here
|
1089 |
static void |
1095 |
static void |
1090 |
wpi_update_rx_ring(struct wpi_softc *sc) |
1096 |
wpi_update_rx_ring(struct wpi_softc *sc) |
1091 |
{ |
1097 |
{ |
|
|
1098 |
WPI_WRITE(sc, WPI_FH_RX_WPTR, sc->rxq.cur & ~7); |
1099 |
} |
1100 |
|
1101 |
static void |
1102 |
wpi_update_rx_ring_ps(struct wpi_softc *sc) |
1103 |
{ |
1092 |
struct wpi_rx_ring *ring = &sc->rxq; |
1104 |
struct wpi_rx_ring *ring = &sc->rxq; |
1093 |
|
1105 |
|
1094 |
if (ring->update != 0) { |
1106 |
if (ring->update != 0) { |
Lines 1096-1109
Link Here
|
1096 |
return; |
1108 |
return; |
1097 |
} |
1109 |
} |
1098 |
|
1110 |
|
1099 |
if (WPI_READ(sc, WPI_UCODE_GP1) & WPI_UCODE_GP1_MAC_SLEEP) { |
1111 |
WPI_SETBITS(sc, WPI_GP_CNTRL, WPI_GP_CNTRL_MAC_ACCESS_REQ); |
|
|
1112 |
if (WPI_READ(sc, WPI_GP_CNTRL) & WPI_GP_CNTRL_SLEEP) { |
1100 |
DPRINTF(sc, WPI_DEBUG_PWRSAVE, "%s: wakeup request\n", |
1113 |
DPRINTF(sc, WPI_DEBUG_PWRSAVE, "%s: wakeup request\n", |
1101 |
__func__); |
1114 |
__func__); |
1102 |
|
|
|
1103 |
WPI_SETBITS(sc, WPI_GP_CNTRL, WPI_GP_CNTRL_MAC_ACCESS_REQ); |
1104 |
ring->update = 1; |
1115 |
ring->update = 1; |
1105 |
} else |
1116 |
} else { |
1106 |
WPI_WRITE(sc, WPI_FH_RX_WPTR, ring->cur & ~7); |
1117 |
wpi_update_rx_ring(sc); |
|
|
1118 |
WPI_CLRBITS(sc, WPI_GP_CNTRL, WPI_GP_CNTRL_MAC_ACCESS_REQ); |
1119 |
} |
1107 |
} |
1120 |
} |
1108 |
|
1121 |
|
1109 |
static void |
1122 |
static void |
Lines 1247-1265
Link Here
|
1247 |
static void |
1260 |
static void |
1248 |
wpi_update_tx_ring(struct wpi_softc *sc, struct wpi_tx_ring *ring) |
1261 |
wpi_update_tx_ring(struct wpi_softc *sc, struct wpi_tx_ring *ring) |
1249 |
{ |
1262 |
{ |
|
|
1263 |
WPI_WRITE(sc, WPI_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); |
1264 |
} |
1265 |
|
1266 |
static void |
1267 |
wpi_update_tx_ring_ps(struct wpi_softc *sc, struct wpi_tx_ring *ring) |
1268 |
{ |
1269 |
|
1250 |
if (ring->update != 0) { |
1270 |
if (ring->update != 0) { |
1251 |
/* Wait for INT_WAKEUP event. */ |
1271 |
/* Wait for INT_WAKEUP event. */ |
1252 |
return; |
1272 |
return; |
1253 |
} |
1273 |
} |
1254 |
|
1274 |
|
1255 |
if (WPI_READ(sc, WPI_UCODE_GP1) & WPI_UCODE_GP1_MAC_SLEEP) { |
1275 |
WPI_SETBITS(sc, WPI_GP_CNTRL, WPI_GP_CNTRL_MAC_ACCESS_REQ); |
|
|
1276 |
if (WPI_READ(sc, WPI_GP_CNTRL) & WPI_GP_CNTRL_SLEEP) { |
1256 |
DPRINTF(sc, WPI_DEBUG_PWRSAVE, "%s (%d): requesting wakeup\n", |
1277 |
DPRINTF(sc, WPI_DEBUG_PWRSAVE, "%s (%d): requesting wakeup\n", |
1257 |
__func__, ring->qid); |
1278 |
__func__, ring->qid); |
1258 |
|
|
|
1259 |
WPI_SETBITS(sc, WPI_GP_CNTRL, WPI_GP_CNTRL_MAC_ACCESS_REQ); |
1260 |
ring->update = 1; |
1279 |
ring->update = 1; |
1261 |
} else |
1280 |
} else { |
1262 |
WPI_WRITE(sc, WPI_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); |
1281 |
wpi_update_tx_ring(sc, ring); |
|
|
1282 |
WPI_CLRBITS(sc, WPI_GP_CNTRL, WPI_GP_CNTRL_MAC_ACCESS_REQ); |
1283 |
} |
1263 |
} |
1284 |
} |
1264 |
|
1285 |
|
1265 |
static void |
1286 |
static void |
Lines 2067-2072
Link Here
|
2067 |
} |
2088 |
} |
2068 |
|
2089 |
|
2069 |
wakeup(&ring->cmd[desc->idx]); |
2090 |
wakeup(&ring->cmd[desc->idx]); |
|
|
2091 |
|
2092 |
if (desc->type == WPI_CMD_SET_POWER_MODE) { |
2093 |
WPI_TXQ_LOCK(sc); |
2094 |
if (sc->sc_flags & WPI_PS_PATH) { |
2095 |
sc->sc_update_rx_ring = wpi_update_rx_ring_ps; |
2096 |
sc->sc_update_tx_ring = wpi_update_tx_ring_ps; |
2097 |
} else { |
2098 |
sc->sc_update_rx_ring = wpi_update_rx_ring; |
2099 |
sc->sc_update_tx_ring = wpi_update_tx_ring; |
2100 |
} |
2101 |
WPI_TXQ_UNLOCK(sc); |
2102 |
} |
2070 |
} |
2103 |
} |
2071 |
|
2104 |
|
2072 |
static void |
2105 |
static void |
Lines 2262-2268
Link Here
|
2262 |
|
2295 |
|
2263 |
if (sc->rxq.cur % 8 == 0) { |
2296 |
if (sc->rxq.cur % 8 == 0) { |
2264 |
/* Tell the firmware what we have processed. */ |
2297 |
/* Tell the firmware what we have processed. */ |
2265 |
wpi_update_rx_ring(sc); |
2298 |
sc->sc_update_rx_ring(sc); |
2266 |
} |
2299 |
} |
2267 |
} |
2300 |
} |
2268 |
} |
2301 |
} |
Lines 2293-2301
Link Here
|
2293 |
wpi_update_tx_ring(sc, ring); |
2326 |
wpi_update_tx_ring(sc, ring); |
2294 |
} |
2327 |
} |
2295 |
} |
2328 |
} |
|
|
2329 |
WPI_CLRBITS(sc, WPI_GP_CNTRL, WPI_GP_CNTRL_MAC_ACCESS_REQ); |
2296 |
WPI_TXQ_UNLOCK(sc); |
2330 |
WPI_TXQ_UNLOCK(sc); |
2297 |
|
|
|
2298 |
WPI_CLRBITS(sc, WPI_GP_CNTRL, WPI_GP_CNTRL_MAC_ACCESS_REQ); |
2299 |
} |
2331 |
} |
2300 |
|
2332 |
|
2301 |
/* |
2333 |
/* |
Lines 2595-2601
Link Here
|
2595 |
|
2627 |
|
2596 |
/* Kick TX ring. */ |
2628 |
/* Kick TX ring. */ |
2597 |
ring->cur = (ring->cur + 1) % WPI_TX_RING_COUNT; |
2629 |
ring->cur = (ring->cur + 1) % WPI_TX_RING_COUNT; |
2598 |
wpi_update_tx_ring(sc, ring); |
2630 |
sc->sc_update_tx_ring(sc, ring); |
2599 |
|
2631 |
|
2600 |
if (ring->qid < WPI_CMD_QUEUE_NUM) { |
2632 |
if (ring->qid < WPI_CMD_QUEUE_NUM) { |
2601 |
/* Mark TX ring as full if we reach a certain threshold. */ |
2633 |
/* Mark TX ring as full if we reach a certain threshold. */ |
Lines 3147-3153
Link Here
|
3147 |
|
3179 |
|
3148 |
/* Kick command ring. */ |
3180 |
/* Kick command ring. */ |
3149 |
ring->cur = (ring->cur + 1) % WPI_TX_RING_COUNT; |
3181 |
ring->cur = (ring->cur + 1) % WPI_TX_RING_COUNT; |
3150 |
wpi_update_tx_ring(sc, ring); |
3182 |
sc->sc_update_tx_ring(sc, ring); |
3151 |
|
3183 |
|
3152 |
DPRINTF(sc, WPI_DEBUG_TRACE, TRACE_STR_END, __func__); |
3184 |
DPRINTF(sc, WPI_DEBUG_TRACE, TRACE_STR_END, __func__); |
3153 |
|
3185 |
|
Lines 3648-3655
Link Here
|
3648 |
pmgt = &wpi_pmgt[1][level]; |
3680 |
pmgt = &wpi_pmgt[1][level]; |
3649 |
|
3681 |
|
3650 |
memset(&cmd, 0, sizeof cmd); |
3682 |
memset(&cmd, 0, sizeof cmd); |
3651 |
if (level != 0) /* not CAM */ |
3683 |
WPI_TXQ_LOCK(sc); |
|
|
3684 |
if (level != 0) { /* not CAM */ |
3652 |
cmd.flags |= htole16(WPI_PS_ALLOW_SLEEP); |
3685 |
cmd.flags |= htole16(WPI_PS_ALLOW_SLEEP); |
|
|
3686 |
sc->sc_flags |= WPI_PS_PATH; |
3687 |
} else |
3688 |
sc->sc_flags &= ~WPI_PS_PATH; |
3689 |
WPI_TXQ_UNLOCK(sc); |
3653 |
/* Retrieve PCIe Active State Power Management (ASPM). */ |
3690 |
/* Retrieve PCIe Active State Power Management (ASPM). */ |
3654 |
reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1); |
3691 |
reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1); |
3655 |
if (!(reg & 0x1)) /* L0s Entry disabled. */ |
3692 |
if (!(reg & 0x1)) /* L0s Entry disabled. */ |