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Lines 487-492
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| 487 |
static void bge_stop_fw(struct bge_softc *); |
487 |
static void bge_stop_fw(struct bge_softc *); |
| 488 |
static int bge_reset(struct bge_softc *); |
488 |
static int bge_reset(struct bge_softc *); |
| 489 |
static void bge_link_upd(struct bge_softc *); |
489 |
static void bge_link_upd(struct bge_softc *); |
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|
490 |
static void bge_setwol(struct bge_softc *); |
| 490 |
|
491 |
|
| 491 |
static void bge_ape_lock_init(struct bge_softc *); |
492 |
static void bge_ape_lock_init(struct bge_softc *); |
| 492 |
static void bge_ape_read_fw_ver(struct bge_softc *); |
493 |
static void bge_ape_read_fw_ver(struct bge_softc *); |
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Lines 3742-3748
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| 3742 |
if_setsendqready(ifp); |
3743 |
if_setsendqready(ifp); |
| 3743 |
if_sethwassist(ifp, sc->bge_csum_features); |
3744 |
if_sethwassist(ifp, sc->bge_csum_features); |
| 3744 |
if_setcapabilities(ifp, IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING | |
3745 |
if_setcapabilities(ifp, IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING | |
| 3745 |
IFCAP_VLAN_MTU); |
3746 |
IFCAP_VLAN_MTU | IFCAP_WOL_MAGIC); |
| 3746 |
if ((sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3)) != 0) { |
3747 |
if ((sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3)) != 0) { |
| 3747 |
if_sethwassistbits(ifp, CSUM_TSO, 0); |
3748 |
if_sethwassistbits(ifp, CSUM_TSO, 0); |
| 3748 |
if_setcapabilitiesbit(ifp, IFCAP_TSO4 | IFCAP_VLAN_HWTSO, 0); |
3749 |
if_setcapabilitiesbit(ifp, IFCAP_TSO4 | IFCAP_VLAN_HWTSO, 0); |
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Lines 3750-3755
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| 3750 |
#ifdef IFCAP_VLAN_HWCSUM |
3751 |
#ifdef IFCAP_VLAN_HWCSUM |
| 3751 |
if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWCSUM, 0); |
3752 |
if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWCSUM, 0); |
| 3752 |
#endif |
3753 |
#endif |
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|
3754 |
if (pci_find_cap(dev, PCIY_PMG, ®) == 0) |
| 3755 |
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC, 0); |
| 3753 |
if_setcapenable(ifp, if_getcapabilities(ifp)); |
3756 |
if_setcapenable(ifp, if_getcapabilities(ifp)); |
| 3754 |
#ifdef DEVICE_POLLING |
3757 |
#ifdef DEVICE_POLLING |
| 3755 |
if_setcapabilitiesbit(ifp, IFCAP_POLLING, 0); |
3758 |
if_setcapabilitiesbit(ifp, IFCAP_POLLING, 0); |
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Lines 5847-5852
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| 5847 |
} |
5850 |
} |
| 5848 |
} |
5851 |
} |
| 5849 |
#endif |
5852 |
#endif |
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|
5853 |
if ((mask & IFCAP_WOL_MAGIC) != 0 && |
| 5854 |
(if_getcapabilities(ifp) & IFCAP_WOL_MAGIC) != 0) |
| 5855 |
if_togglecapenable(ifp, IFCAP_WOL_MAGIC); |
| 5850 |
if ((mask & IFCAP_TXCSUM) != 0 && |
5856 |
if ((mask & IFCAP_TXCSUM) != 0 && |
| 5851 |
(if_getcapabilities(ifp) & IFCAP_TXCSUM) != 0) { |
5857 |
(if_getcapabilities(ifp) & IFCAP_TXCSUM) != 0) { |
| 5852 |
if_togglecapenable(ifp, IFCAP_TXCSUM); |
5858 |
if_togglecapenable(ifp, IFCAP_TXCSUM); |
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Lines 6075-6080
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| 6075 |
sc = device_get_softc(dev); |
6081 |
sc = device_get_softc(dev); |
| 6076 |
BGE_LOCK(sc); |
6082 |
BGE_LOCK(sc); |
| 6077 |
bge_stop(sc); |
6083 |
bge_stop(sc); |
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|
6084 |
bge_setwol(sc); |
| 6078 |
BGE_UNLOCK(sc); |
6085 |
BGE_UNLOCK(sc); |
| 6079 |
|
6086 |
|
| 6080 |
return (0); |
6087 |
return (0); |
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Lines 6088-6093
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| 6088 |
sc = device_get_softc(dev); |
6095 |
sc = device_get_softc(dev); |
| 6089 |
BGE_LOCK(sc); |
6096 |
BGE_LOCK(sc); |
| 6090 |
bge_stop(sc); |
6097 |
bge_stop(sc); |
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|
6098 |
bge_setwol(sc); |
| 6091 |
BGE_UNLOCK(sc); |
6099 |
BGE_UNLOCK(sc); |
| 6092 |
|
6100 |
|
| 6093 |
return (0); |
6101 |
return (0); |
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Lines 6788-6790
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| 6788 |
return (if_get_counter_default(ifp, cnt)); |
6796 |
return (if_get_counter_default(ifp, cnt)); |
| 6789 |
} |
6797 |
} |
| 6790 |
} |
6798 |
} |
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|
6799 |
|
| 6800 |
static void |
| 6801 |
bge_setwol(struct bge_softc *sc) |
| 6802 |
{ |
| 6803 |
struct ifnet *ifp; |
| 6804 |
uint16_t pmstat; |
| 6805 |
int pmc; |
| 6806 |
|
| 6807 |
BGE_LOCK_ASSERT(sc); |
| 6808 |
|
| 6809 |
if (pci_find_cap(sc->bge_dev, PCIY_PMG, &pmc) != 0) |
| 6810 |
return; |
| 6811 |
ifp = sc->bge_ifp; |
| 6812 |
if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) == 0) |
| 6813 |
return; |
| 6814 |
if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) != 0) { |
| 6815 |
BGE_SETBIT(sc, BGE_MAC_MODE, BGE_MACMODE_MAGIC_PKT_ENB); |
| 6816 |
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_PORTMODE); |
| 6817 |
BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_GMII); |
| 6818 |
BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE); |
| 6819 |
} |
| 6820 |
else { |
| 6821 |
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_MAGIC_PKT_ENB); |
| 6822 |
} |
| 6823 |
|
| 6824 |
/* Request PME if WOL is requested. */ |
| 6825 |
pmstat = pci_read_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, 2); |
| 6826 |
pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE); |
| 6827 |
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0) |
| 6828 |
pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE; |
| 6829 |
pci_write_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, pmstat, 2); |
| 6830 |
} |
| 6831 |
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