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Lines 111-116
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| 111 |
* Assume that interrupt are disabled at this point, or |
111 |
* Assume that interrupt are disabled at this point, or |
| 112 |
* SPRG1-3 could be trashed |
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* SPRG1-3 could be trashed |
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*/ |
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*/ |
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#ifdef __powerpc64__ |
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__asm __volatile("mtsprg1 %1\n\t" |
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"mtsprg2 %2\n\t" |
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"mtsprg3 %3\n\t" |
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: |
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: "r"(ofmsr[2]), |
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"r"(ofmsr[3]), |
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"r"(ofmsr[4])); |
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#else |
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__asm __volatile("mfsprg0 %0\n\t" |
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__asm __volatile("mfsprg0 %0\n\t" |
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"mtsprg0 %1\n\t" |
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"mtsprg0 %1\n\t" |
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"mtsprg1 %2\n\t" |
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"mtsprg1 %2\n\t" |
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Lines 121-126
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| 121 |
"r"(ofmsr[2]), |
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"r"(ofmsr[2]), |
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"r"(ofmsr[3]), |
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"r"(ofmsr[3]), |
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"r"(ofmsr[4])); |
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"r"(ofmsr[4])); |
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#endif |
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} |
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} |
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static __inline void |
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static __inline void |
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Lines 136-142
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| 136 |
* |
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* |
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* PCPU data cannot be used until this routine is called ! |
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* PCPU data cannot be used until this routine is called ! |
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*/ |
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*/ |
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#ifndef __powerpc64__ |
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__asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save)); |
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__asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save)); |
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#endif |
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} |
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} |
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#endif |
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#endif |
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Lines 344-351
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| 344 |
ofmsr[0] = mfmsr(); |
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ofmsr[0] = mfmsr(); |
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#ifdef __powerpc64__ |
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#ifdef __powerpc64__ |
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ofmsr[0] &= ~PSL_SF; |
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ofmsr[0] &= ~PSL_SF; |
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#else |
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__asm __volatile("mfsprg0 %0" : "=&r"(ofmsr[1])); |
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#endif |
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#endif |
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__asm __volatile("mfsprg0 %0" : "=&r"(ofmsr[1])); |
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__asm __volatile("mfsprg1 %0" : "=&r"(ofmsr[2])); |
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__asm __volatile("mfsprg1 %0" : "=&r"(ofmsr[2])); |
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__asm __volatile("mfsprg2 %0" : "=&r"(ofmsr[3])); |
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__asm __volatile("mfsprg2 %0" : "=&r"(ofmsr[3])); |
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__asm __volatile("mfsprg3 %0" : "=&r"(ofmsr[4])); |
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__asm __volatile("mfsprg3 %0" : "=&r"(ofmsr[4])); |