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(-)b/sys/amd64/amd64/initcpu.c (-8 / +17 lines)
Lines 151-156 init_amd(void) Link Here
151 
			hw_lower_amd64_sharedpage = 1;
 156 
			hw_lower_amd64_sharedpage = 1;
152 
		}
 157 
		}
153 
	}
 158 
	}
159 

            

            

              160
              
	if (CPUID_TO_FAMILY(cpu_id) == 0x17) {

            

            

              161
              
		msr = rdmsr(MSR_AMD_CPUID07);

            

            

              162
              
		msr &= ~CPUID_STDEXT_FSGSBASE;

            

            

              163
              
		wrmsr(MSR_AMD_CPUID07, msr);

            

            

              164
              
		if (IS_BSP())

            

            

              165
              
			cpu_stdext_feature &= ~CPUID_STDEXT_FSGSBASE;

            

            

              166
              
	}

            

        

          154
          
}

          167
          
}

        

        

          155
          

          168
          

        

        

          156
          
/*

          169
          
/*

        

  

    
      
            Lines 201-206
          initializecpu(void)
      
      
        Link Here
      
    
  

        

          201
          
	uint64_t msr;

          214
          
	uint64_t msr;

        

        

          202
          
	uint32_t cr4;

          215
          
	uint32_t cr4;

        

        

          203
          

          216
          

        

            

              
              
              217
              
	switch (cpu_vendor_id) {

            

            

              218
              
	case CPU_VENDOR_AMD:

            

            

              219
              
		init_amd();

            

            

              220
              
		break;

            

            

              221
              
	case CPU_VENDOR_CENTAUR:

            

            

              222
              
		init_via();

            

            

              223
              
		break;

            

            

              224
              
	}

            

            

              225
              

            

        

          204
          
	cr4 = rcr4();

          226
          
	cr4 = rcr4();

        

        

          205
          
	if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) {

          227
          
	if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) {

        

        

          206
          
		cr4 |= CR4_FXSR | CR4_XMM;

          228
          
		cr4 |= CR4_FXSR | CR4_XMM;

        

  

    
      
            Lines 224-237
          initializecpu(void)
      
      
        Link Here
      
    
  

        

          224
          
		pg_nx = PG_NX;

          246
          
		pg_nx = PG_NX;

        

        

          225
          
	}

          247
          
	}

        

        

          226
          
	hw_ibrs_recalculate();

          248
          
	hw_ibrs_recalculate();

        

            

              227
              
	switch (cpu_vendor_id) {

              
              
            

            

              228
              
	case CPU_VENDOR_AMD:

            

            

              229
              
		init_amd();

            

            

              230
              
		break;

            

            

              231
              
	case CPU_VENDOR_CENTAUR:

            

            

              232
              
		init_via();

            

            

              233
              
		break;

            

            

              234
              
	}

            

        

          235
          
}

          249
          
}

        

        

          236
          

          250
          

        

        

          237
          
void

          251
          
void

        



(-)b/sys/x86/include/specialreg.h
      (+1 lines)




  

    
      
            Lines 1001-1006
          
      
      
        Link Here
      
    
  

        

          1001
          
#define	MSR_P_STATE_CONFIG(n) (0xc0010064 + (n)) /* P-state Config */

          1001
          
#define	MSR_P_STATE_CONFIG(n) (0xc0010064 + (n)) /* P-state Config */

        

        

          1002
          
#define	MSR_SMM_ADDR	0xc0010112	/* SMM TSEG base address */

          1002
          
#define	MSR_SMM_ADDR	0xc0010112	/* SMM TSEG base address */

        

        

          1003
          
#define	MSR_SMM_MASK	0xc0010113	/* SMM TSEG address mask */

          1003
          
#define	MSR_SMM_MASK	0xc0010113	/* SMM TSEG address mask */

        

            

              
              
              1004
              
#define	MSR_AMD_CPUID07	0xc0011002	/* CPUID 07 %ebx override */

            

        

          1004
          
#define	MSR_EXTFEATURES	0xc0011005	/* Extended CPUID Features override */

          1005
          
#define	MSR_EXTFEATURES	0xc0011005	/* Extended CPUID Features override */

        

        

          1005
          
#define	MSR_IC_CFG	0xc0011021	/* Instruction Cache Configuration */

          1006
          
#define	MSR_IC_CFG	0xc0011021	/* Instruction Cache Configuration */

        

        

          1006
          
#define	MSR_K8_UCODE_UPDATE	0xc0010020	/* update microcode */

          1007
          
#define	MSR_K8_UCODE_UPDATE	0xc0010020	/* update microcode */

        






  

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