Attachment #203348 for bug #236855

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--- src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h.orig	2019-01-16 11:59:47 UTC
+++ src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h
@@ -16,6 +16,24 @@
 namespace crc32c {
 
 #if HAVE_ARM64_CRC32C
 
+#if defined(__FreeBSD__)
+#include <machine/armreg.h>
+#include <sys/types.h>
+namespace crc32c {
+
+inline bool CanUseArm64Linux() {
+  uint64_t id_aa64isar0;
+
+  id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
+  if ((ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) && \
+     (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE))
+    return true;
+  return false;
+}
+
+}  // namespace crc32c
+
+#elif defined(__linux__)
 #if HAVE_STRONG_GETAUXVAL
 #include <sys/auxv.h>
 #elif HAVE_WEAK_GETAUXVAL
@@ -43,6 +61,7 @@ inline bool CanUseArm64Linux() {
 
 }  // namespace crc32c
 
+#endif
 #endif  // HAVE_ARM64_CRC32C
 
 #endif  // CRC32C_CRC32C_ARM_LINUX_CHECK_H_




--- src/3rdparty/chromium/third_party/skia/src/opts/SkRasterPipeline_opts.h.orig	2019-01-16 10:59:47 UTC
+++ src/3rdparty/chromium/third_party/skia/src/opts/SkRasterPipeline_opts.h
@@ -658,9 +658,7 @@ SI F approx_powf(F x, F y) {
 
 SI F from_half(U16 h) {
 #if defined(__ARM_FP16_FORMAT_IEEE)
-    __fp16 fp16;
-    memcpy(&fp16, &h, sizeof(U16));
-    return float(fp16);
+    return vcvt_f32_f16(h);
 
 #elif defined(JUMPER_IS_HSW) || defined(JUMPER_IS_AVX512)
     return _mm256_cvtph_ps(h);
@@ -680,10 +678,7 @@ SI F from_half(U16 h) {
 
 SI U16 to_half(F f) {
 #if defined(__ARM_FP16_FORMAT_IEEE)
-    __fp16 fp16 = __fp16(f);
-    U16 u16;
-    memcpy(&u16, &fp16, sizeof(U16));
-    return u16;
+    return vcvt_f16_f32(f);
 
 #elif defined(JUMPER_IS_HSW) || defined(JUMPER_IS_AVX512)
     return _mm256_cvtps_ph(f, _MM_FROUND_CUR_DIRECTION);




--- src/3rdparty/chromium/third_party/zlib/arm_features.c.orig	2019-01-16 11:59:47 UTC
+++ src/3rdparty/chromium/third_party/zlib/arm_features.c
@@ -10,20 +10,33 @@
 #include <pthread.h>
 #include <stdint.h>
 
-#if defined(ARMV8_OS_ANDROID)
+int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
+int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
+
+static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
+
+#if defined (__FreeBSD__)
+#include <machine/armreg.h>
+#include <sys/types.h>
+static void init_arm_features(void)
+{
+#if defined (__aarch64__)
+    uint64_t id_aa64isar0;
+
+    id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
+    if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL)
+        arm_cpu_enable_pmull = 1;
+    if (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE)
+        arm_cpu_enable_crc32 = 1;
+#endif
+}
+#elif defined(ARMV8_OS_ANDROID)
 #include <cpu-features.h>
 #elif defined(ARMV8_OS_LINUX)
 #include <asm/hwcap.h>
 #include <sys/auxv.h>
-#else
-#error ### No ARM CPU features detection in your platform/OS
-#endif
 #endif
 
 int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
 int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
 
-int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
-int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
 
-static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
-
 static void init_arm_features(void)
 {
     uint64_t flag_crc32 = 0, flag_pmull = 0, capabilities = 0;
@@ -53,6 +66,9 @@ static void init_arm_features(void)
     if (capabilities & flag_pmull)
         arm_cpu_enable_pmull = 1;
 }
+#else
+#error ### No ARM CPU features detection in your platform/OS
+#endif
 
 void ZLIB_INTERNAL arm_check_features(void)
 {
+#ifdef ARMV8_OS_LINUX
     pthread_once(&cpu_check_inited_once, init_arm_features);
+#endif
 }

Return to bug 236855

Lines 1-19 Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_third__party_crc32c_src_src_crc32c__arm64__linux__check.h (-15 / +31 lines)
1	--- src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h.orig 2018-11-13 18:25:11 UTC	1	--- src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h.orig 2019-01-16 11:59:47 UTC
2	+++ src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h	2	+++ src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h
3	@@ -29,6 +29,8 @@ extern "C" unsigned long getauxval(unsigned long type)	3	@@ -16,6 +16,24 @@
4	namespace crc32c {
5		4
6	inline bool CanUseArm64Linux() {	5	#if HAVE_ARM64_CRC32C
7	+return false;	6
8	+#if 0	7	+#if defined(__FreeBSD__)
9	#if HAVE_STRONG_GETAUXVAL \|\| HAVE_WEAK_GETAUXVAL	8	+#include <machine/armreg.h>
10	// From 'arch/arm64/include/uapi/asm/hwcap.h' in Linux kernel source code.	9	+#include <sys/types.h>
11	constexpr unsigned long kHWCAP_PMULL = 1 << 4;	10	+namespace crc32c {
12	@@ -39,6 +41,7 @@ inline bool CanUseArm64Linux() {	11	+
13	#else	12	+inline bool CanUseArm64Linux() {
14	return false;	13	+ uint64_t id_aa64isar0;
15	#endif // HAVE_STRONG_GETAUXVAL \|\| HAVE_WEAK_GETAUXVAL	14	+
16	+#endif	15	+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
17	}	16	+ if ((ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) && \
		17	+ (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE))
		18	+ return true;
		19	+ return false;
		20	+}
		21	+
		22	+} // namespace crc32c
		23	+
		24	+#elif defined(__linux__)
		25	#if HAVE_STRONG_GETAUXVAL
		26	#include <sys/auxv.h>
		27	#elif HAVE_WEAK_GETAUXVAL
		28	@@ -43,6 +61,7 @@ inline bool CanUseArm64Linux() {
18		29
19	} // namespace crc32c	30	} // namespace crc32c
		31
		32	+#endif
		33	#endif // HAVE_ARM64_CRC32C
		34
		35	#endif // CRC32C_CRC32C_ARM_LINUX_CHECK_H_

Added Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_third__party_skia_src_opts_SkRasterPipeline__opts.h (+25 lines)
1	--- src/3rdparty/chromium/third_party/skia/src/opts/SkRasterPipeline_opts.h.orig 2019-01-16 10:59:47 UTC
2	+++ src/3rdparty/chromium/third_party/skia/src/opts/SkRasterPipeline_opts.h
3	@@ -658,9 +658,7 @@ SI F approx_powf(F x, F y) {
4
5	SI F from_half(U16 h) {
6	#if defined(__ARM_FP16_FORMAT_IEEE)
7	- __fp16 fp16;
8	- memcpy(&fp16, &h, sizeof(U16));
9	- return float(fp16);
10	+ return vcvt_f32_f16(h);
11
12	#elif defined(JUMPER_IS_HSW) \|\| defined(JUMPER_IS_AVX512)
13	return _mm256_cvtph_ps(h);
14	@@ -680,10 +678,7 @@ SI F from_half(U16 h) {
15
16	SI U16 to_half(F f) {
17	#if defined(__ARM_FP16_FORMAT_IEEE)
18	- __fp16 fp16 = __fp16(f);
19	- U16 u16;
20	- memcpy(&u16, &fp16, sizeof(U16));
21	- return u16;
22	+ return vcvt_f16_f32(f);
23
24	#elif defined(JUMPER_IS_HSW) \|\| defined(JUMPER_IS_AVX512)
25	return _mm256_cvtps_ph(f, _MM_FROUND_CUR_DIRECTION);

Lines 1-29 Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_third__party_zlib_arm__features.c (-15 / +40 lines)
1	--- src/3rdparty/chromium/third_party/zlib/arm_features.c.orig 2018-11-13 18:25:11 UTC	1	--- src/3rdparty/chromium/third_party/zlib/arm_features.c.orig 2019-01-16 11:59:47 UTC
2	+++ src/3rdparty/chromium/third_party/zlib/arm_features.c	2	+++ src/3rdparty/chromium/third_party/zlib/arm_features.c
3	@@ -16,12 +16,13 @@	3	@@ -10,20 +10,33 @@
		4	#include <pthread.h>
		5	#include <stdint.h>
		6
		7	-#if defined(ARMV8_OS_ANDROID)
		8	+int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
		9	+int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
		10	+
		11	+static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
		12	+
		13	+#if defined (__FreeBSD__)
		14	+#include <machine/armreg.h>
		15	+#include <sys/types.h>
		16	+static void init_arm_features(void)
		17	+{
		18	+#if defined (__aarch64__)
		19	+ uint64_t id_aa64isar0;
		20	+
		21	+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
		22	+ if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL)
		23	+ arm_cpu_enable_pmull = 1;
		24	+ if (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE)
		25	+ arm_cpu_enable_crc32 = 1;
		26	+#endif
		27	+}
		28	+#elif defined(ARMV8_OS_ANDROID)
		29	#include <cpu-features.h>
		30	#elif defined(ARMV8_OS_LINUX)
4	#include <asm/hwcap.h>	31	#include <asm/hwcap.h>
5	#include <sys/auxv.h>	32	#include <sys/auxv.h>
6	#else	33	-#else
7	-#error ### No ARM CPU features detection in your platform/OS	34	-#error ### No ARM CPU features detection in your platform/OS
8	+/* #error ### No ARM CPU features detection in your platform/OS */	35	-#endif
9	#endif
10
11	int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
12	int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
13		36
14	+#ifdef ARMV8_OS_LINUX	37	-int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
15	static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;	38	-int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
16		39
		40	-static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
		41	-
17	static void init_arm_features(void)	42	static void init_arm_features(void)
18	@@ -53,8 +54,11 @@ static void init_arm_features(void)	43	{
		44	uint64_t flag_crc32 = 0, flag_pmull = 0, capabilities = 0;
		45	@@ -53,6 +66,9 @@ static void init_arm_features(void)
19	if (capabilities & flag_pmull)	46	if (capabilities & flag_pmull)
20	arm_cpu_enable_pmull = 1;	47	arm_cpu_enable_pmull = 1;
21	}	48	}
		49	+#else
		50	+#error ### No ARM CPU features detection in your platform/OS
22	+#endif	51	+#endif
23		52
24	void ZLIB_INTERNAL arm_check_features(void)	53	void ZLIB_INTERNAL arm_check_features(void)
25	{	54	{
26	+#ifdef ARMV8_OS_LINUX
27	pthread_once(&cpu_check_inited_once, init_arm_features);
28	+#endif
29	}