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(-)ig4_iic.c (+6 lines)
Lines 579-584 Link Here
579
	v = reg_read(sc, IG4_REG_SS_SCL_LCNT);
579
	v = reg_read(sc, IG4_REG_SS_SCL_LCNT);
580
	reg_write(sc, IG4_REG_FS_SCL_LCNT, v);
580
	reg_write(sc, IG4_REG_FS_SCL_LCNT, v);
581
581
582
	reg_read(sc, IG4_REG_CLR_INTR);
583
	reg_write(sc, IG4_REG_INTR_MASK, 0);
584
582
	/*
585
	/*
583
	 * Program based on a 25000 Hz clock.  This is a bit of a
586
	 * Program based on a 25000 Hz clock.  This is a bit of a
584
	 * hack (obviously).  The defaults are 400 and 470 for standard
587
	 * hack (obviously).  The defaults are 400 and 470 for standard
Lines 590-595 Link Here
590
	reg_write(sc, IG4_REG_SS_SCL_LCNT, 125);
593
	reg_write(sc, IG4_REG_SS_SCL_LCNT, 125);
591
	reg_write(sc, IG4_REG_FS_SCL_HCNT, 100);
594
	reg_write(sc, IG4_REG_FS_SCL_HCNT, 100);
592
	reg_write(sc, IG4_REG_FS_SCL_LCNT, 125);
595
	reg_write(sc, IG4_REG_FS_SCL_LCNT, 125);
596
	reg_write(sc, IG4_REG_SDA_HOLD, 1);
593
597
594
	/*
598
	/*
595
	 * Use a threshold of 1 so we get interrupted on each character,
599
	 * Use a threshold of 1 so we get interrupted on each character,
Lines 631-636 Link Here
631
		device_printf(sc->dev, "controller error during attach-1\n");
635
		device_printf(sc->dev, "controller error during attach-1\n");
632
	if (set_controller(sc, IG4_I2C_ENABLE))
636
	if (set_controller(sc, IG4_I2C_ENABLE))
633
		device_printf(sc->dev, "controller error during attach-2\n");
637
		device_printf(sc->dev, "controller error during attach-2\n");
638
	if (set_controller(sc, 0))
639
		device_printf(sc->dev, "controller error during attach-3\n");
634
	mtx_unlock(&sc->io_lock);
640
	mtx_unlock(&sc->io_lock);
635
	error = bus_setup_intr(sc->dev, sc->intr_res, INTR_TYPE_MISC | INTR_MPSAFE,
641
	error = bus_setup_intr(sc->dev, sc->intr_res, INTR_TYPE_MISC | INTR_MPSAFE,
636
			       NULL, ig4iic_intr, sc, &sc->intr_handle);
642
			       NULL, ig4iic_intr, sc, &sc->intr_handle);

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