SHA256 (bootstrap-openjdk11-aarch64-11.0.2.9.2.tar.xz) = 963f7486d80d54920fd8d07a95148fe41ed66045bb5a10d2d2f3d3677c6ca554

SIZE (bootstrap-openjdk11-aarch64-11.0.2.9.2.tar.xz) = 105149964

.if ${ARCH} == aarch64

CONFIGURE_ARGS+=	--disable-warnings-as-errors \

			--disable-dtrace

.endif

From b6b15000fd62882be19223443f0aa6c468c15a14 Mon Sep 17 00:00:00 2001

From: miki <mikael.urankar@gmail.com>

Date: Thu, 11 Apr 2019 20:09:26 +0200

Subject: [PATCH 01/17] copy src/hotspot/os_cpu/linux_aarch64/* to

 src/hotspot/os_cpu/bsd_aarch64/

copy src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/aarch64/* to

src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/bsd/aarch64/

and rename files to *bsd*

mkdir src/hotspot/os_cpu/bsd_aarch64

for file in $(ls src/hotspot/os_cpu/linux_aarch64/*)

do

  bsd=$(echo $file | sed 's/linux/bsd/g')

  cp ${file} ${bsd}

done

mkdir src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/bsd/aarch64

cp src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/aarch64/LinuxAARCH64CFrame.java \

   src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/bsd/aarch64/BsdAARCH64CFrame.java

cp src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/aarch64/LinuxAARCH64ThreadContext.java \

   src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/bsd/aarch64/BsdAARCH64ThreadContext.java

---

 .../bsd_aarch64/assembler_bsd_aarch64.cpp     |  28 +

 .../os_cpu/bsd_aarch64/atomic_bsd_aarch64.hpp |  75 ++

 src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.S  |  48 ++

 src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.ad |  69 ++

 .../bsd_aarch64/bytes_bsd_aarch64.inline.hpp  |  45 ++

 .../bsd_aarch64/copy_bsd_aarch64.inline.hpp   | 188 +++++

 .../os_cpu/bsd_aarch64/copy_bsd_aarch64.s     | 236 ++++++

 .../bsd_aarch64/globals_bsd_aarch64.hpp       |  45 ++

 .../bsd_aarch64/orderAccess_bsd_aarch64.hpp   |  73 ++

 .../os_cpu/bsd_aarch64/os_bsd_aarch64.cpp     | 733 ++++++++++++++++++

 .../os_cpu/bsd_aarch64/os_bsd_aarch64.hpp     |  45 ++

 .../bsd_aarch64/os_bsd_aarch64.inline.hpp     |  40 +

 .../prefetch_bsd_aarch64.inline.hpp           |  46 ++

 .../os_cpu/bsd_aarch64/threadLS_bsd_aarch64.s |  44 ++

 .../os_cpu/bsd_aarch64/thread_bsd_aarch64.cpp | 104 +++

 .../os_cpu/bsd_aarch64/thread_bsd_aarch64.hpp |  80 ++

 .../bsd_aarch64/vmStructs_bsd_aarch64.hpp     |  55 ++

 .../bsd_aarch64/vm_version_bsd_aarch64.cpp    |  29 +

 .../bsd/aarch64/BsdAARCH64CFrame.java         |  86 ++

 .../bsd/aarch64/BsdAARCH64ThreadContext.java  |  47 ++

 20 files changed, 2116 insertions(+)

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/assembler_bsd_aarch64.cpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/atomic_bsd_aarch64.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.S

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.ad

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/bytes_bsd_aarch64.inline.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/copy_bsd_aarch64.inline.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/copy_bsd_aarch64.s

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/globals_bsd_aarch64.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/orderAccess_bsd_aarch64.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.cpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.inline.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/prefetch_bsd_aarch64.inline.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/threadLS_bsd_aarch64.s

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/thread_bsd_aarch64.cpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/thread_bsd_aarch64.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/vmStructs_bsd_aarch64.hpp

 create mode 100644 src/hotspot/os_cpu/bsd_aarch64/vm_version_bsd_aarch64.cpp

 create mode 100644 src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/bsd/aarch64/BsdAARCH64CFrame.java

 create mode 100644 src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/bsd/aarch64/BsdAARCH64ThreadContext.java

diff --git a/src/hotspot/os_cpu/bsd_aarch64/assembler_bsd_aarch64.cpp b/src/hotspot/os_cpu/bsd_aarch64/assembler_bsd_aarch64.cpp

new file mode 100644

index 0000000000..920d94da7f

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/assembler_bsd_aarch64.cpp

@@ -0,0 +1,28 @@

+/*

+ * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+// nothing required here

+

+

diff --git a/src/hotspot/os_cpu/bsd_aarch64/atomic_bsd_aarch64.hpp b/src/hotspot/os_cpu/bsd_aarch64/atomic_bsd_aarch64.hpp

new file mode 100644

index 0000000000..e1f59bb43e

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/atomic_bsd_aarch64.hpp

@@ -0,0 +1,75 @@

+/*

+ * Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+#ifndef OS_CPU_LINUX_AARCH64_VM_ATOMIC_LINUX_AARCH64_HPP

+#define OS_CPU_LINUX_AARCH64_VM_ATOMIC_LINUX_AARCH64_HPP

+

+#include "vm_version_aarch64.hpp"

+

+// Implementation of class atomic

+

+#define FULL_MEM_BARRIER  __sync_synchronize()

+#define READ_MEM_BARRIER  __atomic_thread_fence(__ATOMIC_ACQUIRE);

+#define WRITE_MEM_BARRIER __atomic_thread_fence(__ATOMIC_RELEASE);

+

+template<size_t byte_size>

+struct Atomic::PlatformAdd

+  : Atomic::AddAndFetch<Atomic::PlatformAdd<byte_size> >

+{

+  template<typename I, typename D>

+  D add_and_fetch(I add_value, D volatile* dest, atomic_memory_order order) const {

+    return __sync_add_and_fetch(dest, add_value);

+  }

+};

+

+template<size_t byte_size>

+template<typename T>

+inline T Atomic::PlatformXchg<byte_size>::operator()(T exchange_value,

+                                                     T volatile* dest,

+                                                     atomic_memory_order order) const {

+  STATIC_ASSERT(byte_size == sizeof(T));

+  T res = __sync_lock_test_and_set(dest, exchange_value);

+  FULL_MEM_BARRIER;

+  return res;

+}

+

+template<size_t byte_size>

+template<typename T>

+inline T Atomic::PlatformCmpxchg<byte_size>::operator()(T exchange_value,

+                                                        T volatile* dest,

+                                                        T compare_value,

+                                                        atomic_memory_order order) const {

+  STATIC_ASSERT(byte_size == sizeof(T));

+  if (order == memory_order_relaxed) {

+    T value = compare_value;

+    __atomic_compare_exchange(dest, &value, &exchange_value, /*weak*/false,

+                              __ATOMIC_RELAXED, __ATOMIC_RELAXED);

+    return value;

+  } else {

+    return __sync_val_compare_and_swap(dest, compare_value, exchange_value);

+  }

+}

+

+#endif // OS_CPU_LINUX_AARCH64_VM_ATOMIC_LINUX_AARCH64_HPP

diff --git a/src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.S b/src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.S

new file mode 100644

index 0000000000..3c863ad1d2

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.S

@@ -0,0 +1,48 @@

+//

+// Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.

+// Copyright (c) 2014, Red Hat Inc. All rights reserved.

+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+//

+// This code is free software; you can redistribute it and/or modify it

+// under the terms of the GNU General Public License version 2 only, as

+// published by the Free Software Foundation.

+//

+// This code is distributed in the hope that it will be useful, but WITHOUT

+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+// version 2 for more details (a copy is included in the LICENSE file that

+// accompanied this code).

+//

+// You should have received a copy of the GNU General Public License version

+// 2 along with this work; if not, write to the Free Software Foundation,

+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+//

+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+// or visit www.oracle.com if you need additional information or have any

+// questions.

+

+#ifdef BUILTIN_SIM

+

+        .globl SafeFetch32, Fetch32PFI, Fetch32Resume

+        .align  16

+        .type   SafeFetch32,@function

+        // Prototype: int SafeFetch32 (int * Adr, int ErrValue) 

+SafeFetch32:

+        movl    %esi, %eax

+Fetch32PFI:

+        movl    (%rdi), %eax

+Fetch32Resume:

+        ret

+

+        .globl SafeFetchN, FetchNPFI, FetchNResume

+        .align  16

+        .type   SafeFetchN,@function

+        // Prototype: intptr_t SafeFetchN (intptr_t * Adr, intptr_t ErrValue) 

+SafeFetchN:

+        movq    %rsi, %rax

+FetchNPFI:

+        movq    (%rdi), %rax

+FetchNResume:

+        ret

+

+#endif

diff --git a/src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.ad b/src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.ad

new file mode 100644

index 0000000000..c3b8cd2c45

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/bsd_aarch64.ad

@@ -0,0 +1,69 @@

+//

+// Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.

+// Copyright (c) 2014, Red Hat Inc. All rights reserved.

+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+//

+// This code is free software; you can redistribute it and/or modify it

+// under the terms of the GNU General Public License version 2 only, as

+// published by the Free Software Foundation.

+//

+// This code is distributed in the hope that it will be useful, but WITHOUT

+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+// version 2 for more details (a copy is included in the LICENSE file that

+// accompanied this code).

+//

+// You should have received a copy of the GNU General Public License version

+// 2 along with this work; if not, write to the Free Software Foundation,

+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+//

+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+// or visit www.oracle.com if you need additional information or have any

+// questions.

+//

+//

+

+// AArch64 Linux Architecture Description File

+

+//----------OS-DEPENDENT ENCODING BLOCK----------------------------------------

+// This block specifies the encoding classes used by the compiler to

+// output byte streams.  Encoding classes generate functions which are

+// called by Machine Instruction Nodes in order to generate the bit

+// encoding of the instruction.  Operands specify their base encoding

+// interface with the interface keyword.  There are currently

+// supported four interfaces, REG_INTER, CONST_INTER, MEMORY_INTER, &

+// COND_INTER.  REG_INTER causes an operand to generate a function

+// which returns its register number when queried.  CONST_INTER causes

+// an operand to generate a function which returns the value of the

+// constant when queried.  MEMORY_INTER causes an operand to generate

+// four functions which return the Base Register, the Index Register,

+// the Scale Value, and the Offset Value of the operand when queried.

+// COND_INTER causes an operand to generate six functions which return

+// the encoding code (ie - encoding bits for the instruction)

+// associated with each basic boolean condition for a conditional

+// instruction.  Instructions specify two basic values for encoding.

+// They use the ins_encode keyword to specify their encoding class

+// (which must be one of the class names specified in the encoding

+// block), and they use the opcode keyword to specify, in order, their

+// primary, secondary, and tertiary opcode.  Only the opcode sections

+// which a particular instruction needs for encoding need to be

+// specified.

+encode %{

+  // Build emit functions for each basic byte or larger field in the intel

+  // encoding scheme (opcode, rm, sib, immediate), and call them from C++

+  // code in the enc_class source block.  Emit functions will live in the

+  // main source block for now.  In future, we can generalize this by

+  // adding a syntax that specifies the sizes of fields in an order,

+  // so that the adlc can build the emit functions automagically

+

+  enc_class Java_To_Runtime(method meth) %{

+  %}

+

+%}

+

+

+// Platform dependent source

+

+source %{

+

+%}

diff --git a/src/hotspot/os_cpu/bsd_aarch64/bytes_bsd_aarch64.inline.hpp b/src/hotspot/os_cpu/bsd_aarch64/bytes_bsd_aarch64.inline.hpp

new file mode 100644

index 0000000000..e283f86d10

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/bytes_bsd_aarch64.inline.hpp

@@ -0,0 +1,45 @@

+/*

+ * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+#ifndef OS_CPU_LINUX_AARCH64_VM_BYTES_LINUX_AARCH64_INLINE_HPP

+#define OS_CPU_LINUX_AARCH64_VM_BYTES_LINUX_AARCH64_INLINE_HPP

+

+#include <byteswap.h>

+

+// Efficient swapping of data bytes from Java byte

+// ordering to native byte ordering and vice versa.

+inline u2   Bytes::swap_u2(u2 x) {

+  return bswap_16(x);

+}

+

+inline u4   Bytes::swap_u4(u4 x) {

+  return bswap_32(x);

+}

+

+inline u8 Bytes::swap_u8(u8 x) {

+  return bswap_64(x);

+}

+

+#endif // OS_CPU_LINUX_AARCH64_VM_BYTES_LINUX_AARCH64_INLINE_HPP

diff --git a/src/hotspot/os_cpu/bsd_aarch64/copy_bsd_aarch64.inline.hpp b/src/hotspot/os_cpu/bsd_aarch64/copy_bsd_aarch64.inline.hpp

new file mode 100644

index 0000000000..794ab349b0

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/copy_bsd_aarch64.inline.hpp

@@ -0,0 +1,188 @@

+/*

+ * Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+#ifndef OS_CPU_LINUX_AARCH64_VM_COPY_LINUX_AARCH64_INLINE_HPP

+#define OS_CPU_LINUX_AARCH64_VM_COPY_LINUX_AARCH64_INLINE_HPP

+

+#define COPY_SMALL(from, to, count)                                     \

+{                                                                       \

+        long tmp0, tmp1, tmp2, tmp3;                                    \

+        long tmp4, tmp5, tmp6, tmp7;                                    \

+  __asm volatile(                                                       \

+"       adr     %[t0], 0f;"                                             \

+"       add     %[t0], %[t0], %[cnt], lsl #5;"                          \

+"       br      %[t0];"                                                 \

+"       .align  5;"                                                     \

+"0:"                                                                    \

+"       b       1f;"                                                    \

+"       .align  5;"                                                     \

+"       ldr     %[t0], [%[s], #0];"                                     \

+"       str     %[t0], [%[d], #0];"                                     \

+"       b       1f;"                                                    \

+"       .align  5;"                                                     \

+"       ldp     %[t0], %[t1], [%[s], #0];"                              \

+"       stp     %[t0], %[t1], [%[d], #0];"                              \

+"       b       1f;"                                                    \

+"       .align  5;"                                                     \

+"       ldp     %[t0], %[t1], [%[s], #0];"                              \

+"       ldr     %[t2], [%[s], #16];"                                    \

+"       stp     %[t0], %[t1], [%[d], #0];"                              \

+"       str     %[t2], [%[d], #16];"                                    \

+"       b       1f;"                                                    \

+"       .align  5;"                                                     \

+"       ldp     %[t0], %[t1], [%[s], #0];"                              \

+"       ldp     %[t2], %[t3], [%[s], #16];"                             \

+"       stp     %[t0], %[t1], [%[d], #0];"                              \

+"       stp     %[t2], %[t3], [%[d], #16];"                             \

+"       b       1f;"                                                    \

+"       .align  5;"                                                     \

+"       ldp     %[t0], %[t1], [%[s], #0];"                              \

+"       ldp     %[t2], %[t3], [%[s], #16];"                             \

+"       ldr     %[t4], [%[s], #32];"                                    \

+"       stp     %[t0], %[t1], [%[d], #0];"                              \

+"       stp     %[t2], %[t3], [%[d], #16];"                             \

+"       str     %[t4], [%[d], #32];"                                    \

+"       b       1f;"                                                    \

+"       .align  5;"                                                     \

+"       ldp     %[t0], %[t1], [%[s], #0];"                              \

+"       ldp     %[t2], %[t3], [%[s], #16];"                             \

+"       ldp     %[t4], %[t5], [%[s], #32];"                             \

+"2:"                                                                    \

+"       stp     %[t0], %[t1], [%[d], #0];"                              \

+"       stp     %[t2], %[t3], [%[d], #16];"                             \

+"       stp     %[t4], %[t5], [%[d], #32];"                             \

+"       b       1f;"                                                    \

+"       .align  5;"                                                     \

+"       ldr     %[t6], [%[s], #0];"                                     \

+"       ldp     %[t0], %[t1], [%[s], #8];"                              \

+"       ldp     %[t2], %[t3], [%[s], #24];"                             \

+"       ldp     %[t4], %[t5], [%[s], #40];"                             \

+"       str     %[t6], [%[d]], #8;"                                     \

+"       b       2b;"                                                    \

+"       .align  5;"                                                     \

+"       ldp     %[t0], %[t1], [%[s], #0];"                              \

+"       ldp     %[t2], %[t3], [%[s], #16];"                             \

+"       ldp     %[t4], %[t5], [%[s], #32];"                             \

+"       ldp     %[t6], %[t7], [%[s], #48];"                             \

+"       stp     %[t0], %[t1], [%[d], #0];"                              \

+"       stp     %[t2], %[t3], [%[d], #16];"                             \

+"       stp     %[t4], %[t5], [%[d], #32];"                             \

+"       stp     %[t6], %[t7], [%[d], #48];"                             \

+"1:"                                                                    \

+                                                                        \

+  : [s]"+r"(from), [d]"+r"(to), [cnt]"+r"(count),                       \

+    [t0]"=&r"(tmp0), [t1]"=&r"(tmp1), [t2]"=&r"(tmp2), [t3]"=&r"(tmp3), \

+    [t4]"=&r"(tmp4), [t5]"=&r"(tmp5), [t6]"=&r"(tmp6), [t7]"=&r"(tmp7)  \

+  :                                                                     \

+  : "memory", "cc");                                                    \

+}

+

+static void pd_conjoint_words(const HeapWord* from, HeapWord* to, size_t count) {

+  __asm volatile( "prfm pldl1strm, [%[s], #0];" :: [s]"r"(from) : "memory");

+  if (__builtin_expect(count <= 8, 1)) {

+    COPY_SMALL(from, to, count);

+    return;

+  }

+  _Copy_conjoint_words(from, to, count);

+}

+

+static void pd_disjoint_words(const HeapWord* from, HeapWord* to, size_t count) {

+  if (__builtin_constant_p(count)) {

+    memcpy(to, from, count * sizeof(HeapWord));

+    return;

+  }

+  __asm volatile( "prfm pldl1strm, [%[s], #0];" :: [s]"r"(from) : "memory");

+  if (__builtin_expect(count <= 8, 1)) {

+    COPY_SMALL(from, to, count);

+    return;

+  }

+  _Copy_disjoint_words(from, to, count);

+}

+

+static void pd_disjoint_words_atomic(const HeapWord* from, HeapWord* to, size_t count) {

+  __asm volatile( "prfm pldl1strm, [%[s], #0];" :: [s]"r"(from) : "memory");

+  if (__builtin_expect(count <= 8, 1)) {

+    COPY_SMALL(from, to, count);

+    return;

+  }

+  _Copy_disjoint_words(from, to, count);

+}

+

+static void pd_aligned_conjoint_words(const HeapWord* from, HeapWord* to, size_t count) {

+  pd_conjoint_words(from, to, count);

+}

+

+static void pd_aligned_disjoint_words(const HeapWord* from, HeapWord* to, size_t count) {

+  pd_disjoint_words(from, to, count);

+}

+

+static void pd_conjoint_bytes(const void* from, void* to, size_t count) {

+  (void)memmove(to, from, count);

+}

+

+static void pd_conjoint_bytes_atomic(const void* from, void* to, size_t count) {

+  pd_conjoint_bytes(from, to, count);

+}

+

+static void pd_conjoint_jshorts_atomic(const jshort* from, jshort* to, size_t count) {

+  _Copy_conjoint_jshorts_atomic(from, to, count);

+}

+

+static void pd_conjoint_jints_atomic(const jint* from, jint* to, size_t count) {

+  _Copy_conjoint_jints_atomic(from, to, count);

+}

+

+static void pd_conjoint_jlongs_atomic(const jlong* from, jlong* to, size_t count) {

+  _Copy_conjoint_jlongs_atomic(from, to, count);

+}

+

+static void pd_conjoint_oops_atomic(const oop* from, oop* to, size_t count) {

+  assert(BytesPerLong == BytesPerOop, "jlongs and oops must be the same size");

+  _Copy_conjoint_jlongs_atomic((const jlong*)from, (jlong*)to, count);

+}

+

+static void pd_arrayof_conjoint_bytes(const HeapWord* from, HeapWord* to, size_t count) {

+  _Copy_arrayof_conjoint_bytes(from, to, count);

+}

+

+static void pd_arrayof_conjoint_jshorts(const HeapWord* from, HeapWord* to, size_t count) {

+  _Copy_arrayof_conjoint_jshorts(from, to, count);

+}

+

+static void pd_arrayof_conjoint_jints(const HeapWord* from, HeapWord* to, size_t count) {

+   _Copy_arrayof_conjoint_jints(from, to, count);

+}

+

+static void pd_arrayof_conjoint_jlongs(const HeapWord* from, HeapWord* to, size_t count) {

+  _Copy_arrayof_conjoint_jlongs(from, to, count);

+}

+

+static void pd_arrayof_conjoint_oops(const HeapWord* from, HeapWord* to, size_t count) {

+  assert(!UseCompressedOops, "foo!");

+  assert(BytesPerLong == BytesPerOop, "jlongs and oops must be the same size");

+  _Copy_arrayof_conjoint_jlongs(from, to, count);

+}

+

+#endif // OS_CPU_LINUX_AARCH64_VM_COPY_LINUX_AARCH64_INLINE_HPP

diff --git a/src/hotspot/os_cpu/bsd_aarch64/copy_bsd_aarch64.s b/src/hotspot/os_cpu/bsd_aarch64/copy_bsd_aarch64.s

new file mode 100644

index 0000000000..25e3b054f7

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/copy_bsd_aarch64.s

@@ -0,0 +1,236 @@

+/*

+ * Copyright (c) 2016, Linaro Ltd. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+        .global _Copy_conjoint_words

+        .global _Copy_disjoint_words

+

+s       .req    x0

+d       .req    x1

+count   .req    x2

+t0      .req    x3

+t1      .req    x4

+t2      .req    x5

+t3      .req    x6

+t4      .req    x7

+t5      .req    x8

+t6      .req    x9

+t7      .req    x10

+

+        .align  6

+_Copy_disjoint_words:

+        // Ensure 2 word aligned

+        tbz     s, #3, fwd_copy_aligned

+        ldr     t0, [s], #8

+        str     t0, [d], #8

+        sub     count, count, #1

+

+fwd_copy_aligned:

+        // Bias s & d so we only pre index on the last copy

+        sub     s, s, #16

+        sub     d, d, #16

+

+        ldp     t0, t1, [s, #16]

+        ldp     t2, t3, [s, #32]

+        ldp     t4, t5, [s, #48]

+        ldp     t6, t7, [s, #64]!

+

+        subs    count, count, #16

+        blo     fwd_copy_drain

+

+fwd_copy_again:

+        prfm    pldl1keep, [s, #256]

+        stp     t0, t1, [d, #16]

+        ldp     t0, t1, [s, #16]

+        stp     t2, t3, [d, #32]

+        ldp     t2, t3, [s, #32]

+        stp     t4, t5, [d, #48]

+        ldp     t4, t5, [s, #48]

+        stp     t6, t7, [d, #64]!

+        ldp     t6, t7, [s, #64]!

+        subs    count, count, #8

+        bhs     fwd_copy_again

+

+fwd_copy_drain:

+        stp     t0, t1, [d, #16]

+        stp     t2, t3, [d, #32]

+        stp     t4, t5, [d, #48]

+        stp     t6, t7, [d, #64]!

+

+        // count is now -8..-1 for 0..7 words to copy

+        adr     t0, 0f

+        add     t0, t0, count, lsl #5

+        br      t0

+

+        .align  5

+        ret                             // -8 == 0 words

+        .align  5

+        ldr     t0, [s, #16]            // -7 == 1 word

+        str     t0, [d, #16]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #16]        // -6 = 2 words

+        stp     t0, t1, [d, #16]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #16]        // -5 = 3 words

+        ldr     t2, [s, #32]

+        stp     t0, t1, [d, #16]

+        str     t2, [d, #32]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #16]        // -4 = 4 words

+        ldp     t2, t3, [s, #32]

+        stp     t0, t1, [d, #16]

+        stp     t2, t3, [d, #32]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #16]        // -3 = 5 words

+        ldp     t2, t3, [s, #32]

+        ldr     t4, [s, #48]

+        stp     t0, t1, [d, #16]

+        stp     t2, t3, [d, #32]

+        str     t4, [d, #48]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #16]        // -2 = 6 words

+        ldp     t2, t3, [s, #32]

+        ldp     t4, t5, [s, #48]

+        stp     t0, t1, [d, #16]

+        stp     t2, t3, [d, #32]

+        stp     t4, t5, [d, #48]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #16]        // -1 = 7 words

+        ldp     t2, t3, [s, #32]

+        ldp     t4, t5, [s, #48]

+        ldr     t6, [s, #64]

+        stp     t0, t1, [d, #16]

+        stp     t2, t3, [d, #32]

+        stp     t4, t5, [d, #48]

+        str     t6, [d, #64]

+        // Is always aligned here, code for 7 words is one instruction

+        // too large so it just falls through.

+        .align  5

+0:

+        ret

+

+        .align  6

+_Copy_conjoint_words:

+        sub     t0, d, s

+        cmp     t0, count, lsl #3

+        bhs     _Copy_disjoint_words

+

+        add     s, s, count, lsl #3

+        add     d, d, count, lsl #3

+

+        // Ensure 2 word aligned

+        tbz     s, #3, bwd_copy_aligned

+        ldr     t0, [s, #-8]!

+        str     t0, [d, #-8]!

+        sub     count, count, #1

+

+bwd_copy_aligned:

+        ldp     t0, t1, [s, #-16]

+        ldp     t2, t3, [s, #-32]

+        ldp     t4, t5, [s, #-48]

+        ldp     t6, t7, [s, #-64]!

+

+        subs    count, count, #16

+        blo     bwd_copy_drain

+

+bwd_copy_again:

+        prfm    pldl1keep, [s, #-256]

+        stp     t0, t1, [d, #-16]

+        ldp     t0, t1, [s, #-16]

+        stp     t2, t3, [d, #-32]

+        ldp     t2, t3, [s, #-32]

+        stp     t4, t5, [d, #-48]

+        ldp     t4, t5, [s, #-48]

+        stp     t6, t7, [d, #-64]!

+        ldp     t6, t7, [s, #-64]!

+        subs    count, count, #8

+        bhs     bwd_copy_again

+

+bwd_copy_drain:

+        stp     t0, t1, [d, #-16]

+        stp     t2, t3, [d, #-32]

+        stp     t4, t5, [d, #-48]

+        stp     t6, t7, [d, #-64]!

+

+        // count is now -8..-1 for 0..7 words to copy

+        adr     t0, 0f

+        add     t0, t0, count, lsl #5

+        br      t0

+

+        .align  5

+        ret                             // -8 == 0 words

+        .align  5

+        ldr     t0, [s, #-8]            // -7 == 1 word

+        str     t0, [d, #-8]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #-16]       // -6 = 2 words

+        stp     t0, t1, [d, #-16]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #-16]       // -5 = 3 words

+        ldr     t2, [s, #-24]

+        stp     t0, t1, [d, #-16]

+        str     t2, [d, #-24]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #-16]       // -4 = 4 words

+        ldp     t2, t3, [s, #-32]

+        stp     t0, t1, [d, #-16]

+        stp     t2, t3, [d, #-32]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #-16]       // -3 = 5 words

+        ldp     t2, t3, [s, #-32]

+        ldr     t4, [s, #-40]

+        stp     t0, t1, [d, #-16]

+        stp     t2, t3, [d, #-32]

+        str     t4, [d, #-40]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #-16]       // -2 = 6 words

+        ldp     t2, t3, [s, #-32]

+        ldp     t4, t5, [s, #-48]

+        stp     t0, t1, [d, #-16]

+        stp     t2, t3, [d, #-32]

+        stp     t4, t5, [d, #-48]

+        ret

+        .align  5

+        ldp     t0, t1, [s, #-16]       // -1 = 7 words

+        ldp     t2, t3, [s, #-32]

+        ldp     t4, t5, [s, #-48]

+        ldr     t6, [s, #-56]

+        stp     t0, t1, [d, #-16]

+        stp     t2, t3, [d, #-32]

+        stp     t4, t5, [d, #-48]

+        str     t6, [d, #-56]

+        // Is always aligned here, code for 7 words is one instruction

+        // too large so it just falls through.

+        .align  5

+0:

+        ret

diff --git a/src/hotspot/os_cpu/bsd_aarch64/globals_bsd_aarch64.hpp b/src/hotspot/os_cpu/bsd_aarch64/globals_bsd_aarch64.hpp

new file mode 100644

index 0000000000..360be743dd

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/globals_bsd_aarch64.hpp

@@ -0,0 +1,45 @@

+/*

+ * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+#ifndef OS_CPU_LINUX_AARCH64_VM_GLOBALS_LINUX_AARCH64_HPP

+#define OS_CPU_LINUX_AARCH64_VM_GLOBALS_LINUX_AARCH64_HPP

+

+// Sets the default values for platform dependent flags used by the runtime system.

+// (see globals.hpp)

+

+define_pd_global(bool, DontYieldALot,            false);

+define_pd_global(intx, ThreadStackSize,          2048); // 0 => use system default

+define_pd_global(intx, VMThreadStackSize,        2048);

+

+define_pd_global(intx, CompilerThreadStackSize,  2048);

+

+define_pd_global(uintx,JVMInvokeMethodSlack,     8192);

+

+// Used on 64 bit platforms for UseCompressedOops base address

+define_pd_global(uintx,HeapBaseMinAddress,       2*G);

+

+extern __thread Thread *aarch64_currentThread;

+

+#endif // OS_CPU_LINUX_AARCH64_VM_GLOBALS_LINUX_AARCH64_HPP

diff --git a/src/hotspot/os_cpu/bsd_aarch64/orderAccess_bsd_aarch64.hpp b/src/hotspot/os_cpu/bsd_aarch64/orderAccess_bsd_aarch64.hpp

new file mode 100644

index 0000000000..b733db1957

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/orderAccess_bsd_aarch64.hpp

@@ -0,0 +1,73 @@

+/*

+ * Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+#ifndef OS_CPU_LINUX_AARCH64_VM_ORDERACCESS_LINUX_AARCH64_HPP

+#define OS_CPU_LINUX_AARCH64_VM_ORDERACCESS_LINUX_AARCH64_HPP

+

+// Included in orderAccess.hpp header file.

+

+#include "vm_version_aarch64.hpp"

+

+// Implementation of class OrderAccess.

+

+inline void OrderAccess::loadload()   { acquire(); }

+inline void OrderAccess::storestore() { release(); }

+inline void OrderAccess::loadstore()  { acquire(); }

+inline void OrderAccess::storeload()  { fence(); }

+

+inline void OrderAccess::acquire() {

+  READ_MEM_BARRIER;

+}

+

+inline void OrderAccess::release() {

+  WRITE_MEM_BARRIER;

+}

+

+inline void OrderAccess::fence() {

+  FULL_MEM_BARRIER;

+}

+

+template<size_t byte_size>

+struct OrderAccess::PlatformOrderedLoad<byte_size, X_ACQUIRE>

+{

+  template <typename T>

+  T operator()(const volatile T* p) const { T data; __atomic_load(p, &data, __ATOMIC_ACQUIRE); return data; }

+};

+

+template<size_t byte_size>

+struct OrderAccess::PlatformOrderedStore<byte_size, RELEASE_X>

+{

+  template <typename T>

+  void operator()(T v, volatile T* p) const { __atomic_store(p, &v, __ATOMIC_RELEASE); }

+};

+

+template<size_t byte_size>

+struct OrderAccess::PlatformOrderedStore<byte_size, RELEASE_X_FENCE>

+{

+  template <typename T>

+  void operator()(T v, volatile T* p) const { release_store(p, v); fence(); }

+};

+

+#endif // OS_CPU_LINUX_AARCH64_VM_ORDERACCESS_LINUX_AARCH64_HPP

diff --git a/src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.cpp b/src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.cpp

new file mode 100644

index 0000000000..3c7b15086e

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.cpp

@@ -0,0 +1,733 @@

+/*

+ * Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+// no precompiled headers

+#include "jvm.h"

+#include "asm/macroAssembler.hpp"

+#include "classfile/classLoader.hpp"

+#include "classfile/systemDictionary.hpp"

+#include "classfile/vmSymbols.hpp"

+#include "code/codeCache.hpp"

+#include "code/icBuffer.hpp"

+#include "code/vtableStubs.hpp"

+#include "code/nativeInst.hpp"

+#include "interpreter/interpreter.hpp"

+#include "memory/allocation.inline.hpp"

+#include "os_share_linux.hpp"

+#include "prims/jniFastGetField.hpp"

+#include "prims/jvm_misc.hpp"

+#include "runtime/arguments.hpp"

+#include "runtime/extendedPC.hpp"

+#include "runtime/frame.inline.hpp"

+#include "runtime/interfaceSupport.inline.hpp"

+#include "runtime/java.hpp"

+#include "runtime/javaCalls.hpp"

+#include "runtime/mutexLocker.hpp"

+#include "runtime/osThread.hpp"

+#include "runtime/sharedRuntime.hpp"

+#include "runtime/stubRoutines.hpp"

+#include "runtime/thread.inline.hpp"

+#include "runtime/timer.hpp"

+#include "utilities/debug.hpp"

+#include "utilities/events.hpp"

+#include "utilities/vmError.hpp"

+#ifdef BUILTIN_SIM

+#include "../../../../../../simulator/simulator.hpp"

+#endif

+

+// put OS-includes here

+# include <sys/types.h>

+# include <sys/mman.h>

+# include <pthread.h>

+# include <signal.h>

+# include <errno.h>

+# include <dlfcn.h>

+# include <stdlib.h>

+# include <stdio.h>

+# include <unistd.h>

+# include <sys/resource.h>

+# include <pthread.h>

+# include <sys/stat.h>

+# include <sys/time.h>

+# include <sys/utsname.h>

+# include <sys/socket.h>

+# include <sys/wait.h>

+# include <pwd.h>

+# include <poll.h>

+# include <ucontext.h>

+# include <fpu_control.h>

+

+#ifdef BUILTIN_SIM

+#define REG_SP REG_RSP

+#define REG_PC REG_RIP

+#define REG_FP REG_RBP

+#define SPELL_REG_SP "rsp"

+#define SPELL_REG_FP "rbp"

+#else

+#define REG_FP 29

+#define REG_LR 30

+

+#define SPELL_REG_SP "sp"

+#define SPELL_REG_FP "x29"

+#endif

+

+address os::current_stack_pointer() {

+  register void *esp __asm__ (SPELL_REG_SP);

+  return (address) esp;

+}

+

+char* os::non_memory_address_word() {

+  // Must never look like an address returned by reserve_memory,

+  // even in its subfields (as defined by the CPU immediate fields,

+  // if the CPU splits constants across multiple instructions).

+

+  return (char*) 0xffffffffffff;

+}

+

+address os::Linux::ucontext_get_pc(const ucontext_t * uc) {

+#ifdef BUILTIN_SIM

+  return (address)uc->uc_mcontext.gregs[REG_PC];

+#else

+  return (address)uc->uc_mcontext.pc;

+#endif

+}

+

+void os::Linux::ucontext_set_pc(ucontext_t * uc, address pc) {

+#ifdef BUILTIN_SIM

+  uc->uc_mcontext.gregs[REG_PC] = (intptr_t)pc;

+#else

+  uc->uc_mcontext.pc = (intptr_t)pc;

+#endif

+}

+

+intptr_t* os::Linux::ucontext_get_sp(const ucontext_t * uc) {

+#ifdef BUILTIN_SIM

+  return (intptr_t*)uc->uc_mcontext.gregs[REG_SP];

+#else

+  return (intptr_t*)uc->uc_mcontext.sp;

+#endif

+}

+

+intptr_t* os::Linux::ucontext_get_fp(const ucontext_t * uc) {

+#ifdef BUILTIN_SIM

+  return (intptr_t*)uc->uc_mcontext.gregs[REG_FP];

+#else

+  return (intptr_t*)uc->uc_mcontext.regs[REG_FP];

+#endif

+}

+

+// For Forte Analyzer AsyncGetCallTrace profiling support - thread

+// is currently interrupted by SIGPROF.

+// os::Solaris::fetch_frame_from_ucontext() tries to skip nested signal

+// frames. Currently we don't do that on Linux, so it's the same as

+// os::fetch_frame_from_context().

+ExtendedPC os::Linux::fetch_frame_from_ucontext(Thread* thread,

+  const ucontext_t* uc, intptr_t** ret_sp, intptr_t** ret_fp) {

+

+  assert(thread != NULL, "just checking");

+  assert(ret_sp != NULL, "just checking");

+  assert(ret_fp != NULL, "just checking");

+

+  return os::fetch_frame_from_context(uc, ret_sp, ret_fp);

+}

+

+ExtendedPC os::fetch_frame_from_context(const void* ucVoid,

+                    intptr_t** ret_sp, intptr_t** ret_fp) {

+

+  ExtendedPC  epc;

+  const ucontext_t* uc = (const ucontext_t*)ucVoid;

+

+  if (uc != NULL) {

+    epc = ExtendedPC(os::Linux::ucontext_get_pc(uc));

+    if (ret_sp) *ret_sp = os::Linux::ucontext_get_sp(uc);

+    if (ret_fp) *ret_fp = os::Linux::ucontext_get_fp(uc);

+  } else {

+    // construct empty ExtendedPC for return value checking

+    epc = ExtendedPC(NULL);

+    if (ret_sp) *ret_sp = (intptr_t *)NULL;

+    if (ret_fp) *ret_fp = (intptr_t *)NULL;

+  }

+

+  return epc;

+}

+

+frame os::fetch_frame_from_context(const void* ucVoid) {

+  intptr_t* sp;

+  intptr_t* fp;

+  ExtendedPC epc = fetch_frame_from_context(ucVoid, &sp, &fp);

+  return frame(sp, fp, epc.pc());

+}

+

+bool os::Linux::get_frame_at_stack_banging_point(JavaThread* thread, ucontext_t* uc, frame* fr) {

+  address pc = (address) os::Linux::ucontext_get_pc(uc);

+  if (Interpreter::contains(pc)) {

+    // interpreter performs stack banging after the fixed frame header has

+    // been generated while the compilers perform it before. To maintain

+    // semantic consistency between interpreted and compiled frames, the

+    // method returns the Java sender of the current frame.

+    *fr = os::fetch_frame_from_context(uc);

+    if (!fr->is_first_java_frame()) {

+      assert(fr->safe_for_sender(thread), "Safety check");

+      *fr = fr->java_sender();

+    }

+  } else {

+    // more complex code with compiled code

+    assert(!Interpreter::contains(pc), "Interpreted methods should have been handled above");

+    CodeBlob* cb = CodeCache::find_blob(pc);

+    if (cb == NULL || !cb->is_nmethod() || cb->is_frame_complete_at(pc)) {

+      // Not sure where the pc points to, fallback to default

+      // stack overflow handling

+      return false;

+    } else {

+      // In compiled code, the stack banging is performed before LR

+      // has been saved in the frame.  LR is live, and SP and FP

+      // belong to the caller.

+      intptr_t* fp = os::Linux::ucontext_get_fp(uc);

+      intptr_t* sp = os::Linux::ucontext_get_sp(uc);

+      address pc = (address)(uc->uc_mcontext.regs[REG_LR]

+                         - NativeInstruction::instruction_size);

+      *fr = frame(sp, fp, pc);

+      if (!fr->is_java_frame()) {

+        assert(fr->safe_for_sender(thread), "Safety check");

+        assert(!fr->is_first_frame(), "Safety check");

+        *fr = fr->java_sender();

+      }

+    }

+  }

+  assert(fr->is_java_frame(), "Safety check");

+  return true;

+}

+

+// By default, gcc always saves frame pointer rfp on this stack. This

+// may get turned off by -fomit-frame-pointer.

+frame os::get_sender_for_C_frame(frame* fr) {

+#ifdef BUILTIN_SIM

+  return frame(fr->sender_sp(), fr->link(), fr->sender_pc());

+#else

+  return frame(fr->link(), fr->link(), fr->sender_pc());

+#endif

+}

+

+intptr_t* _get_previous_fp() {

+  register intptr_t **fp __asm__ (SPELL_REG_FP);

+

+  // fp is for this frame (_get_previous_fp). We want the fp for the

+  // caller of os::current_frame*(), so go up two frames. However, for

+  // optimized builds, _get_previous_fp() will be inlined, so only go

+  // up 1 frame in that case.

+  #ifdef _NMT_NOINLINE_

+    return **(intptr_t***)fp;

+  #else

+    return *fp;

+  #endif

+}

+

+

+frame os::current_frame() {

+  intptr_t* fp = _get_previous_fp();

+  frame myframe((intptr_t*)os::current_stack_pointer(),

+                (intptr_t*)fp,

+                CAST_FROM_FN_PTR(address, os::current_frame));

+  if (os::is_first_C_frame(&myframe)) {

+    // stack is not walkable

+    return frame();

+  } else {

+    return os::get_sender_for_C_frame(&myframe);

+  }

+}

+

+// Utility functions

+

+// From IA32 System Programming Guide

+enum {

+  trap_page_fault = 0xE

+};

+

+#ifdef BUILTIN_SIM

+extern "C" void Fetch32PFI () ;

+extern "C" void Fetch32Resume () ;

+extern "C" void FetchNPFI () ;

+extern "C" void FetchNResume () ;

+#endif

+

+extern "C" JNIEXPORT int

+JVM_handle_linux_signal(int sig,

+                        siginfo_t* info,

+                        void* ucVoid,

+                        int abort_if_unrecognized) {

+  ucontext_t* uc = (ucontext_t*) ucVoid;

+

+  Thread* t = Thread::current_or_null_safe();

+

+  // Must do this before SignalHandlerMark, if crash protection installed we will longjmp away

+  // (no destructors can be run)

+  os::ThreadCrashProtection::check_crash_protection(sig, t);

+

+  SignalHandlerMark shm(t);

+

+  // Note: it's not uncommon that JNI code uses signal/sigset to install

+  // then restore certain signal handler (e.g. to temporarily block SIGPIPE,

+  // or have a SIGILL handler when detecting CPU type). When that happens,

+  // JVM_handle_linux_signal() might be invoked with junk info/ucVoid. To

+  // avoid unnecessary crash when libjsig is not preloaded, try handle signals

+  // that do not require siginfo/ucontext first.

+

+  if (sig == SIGPIPE || sig == SIGXFSZ) {

+    // allow chained handler to go first

+    if (os::Linux::chained_handler(sig, info, ucVoid)) {

+      return true;

+    } else {

+      // Ignoring SIGPIPE/SIGXFSZ - see bugs 4229104 or 6499219

+      return true;

+    }

+  }

+

+#ifdef CAN_SHOW_REGISTERS_ON_ASSERT

+  if ((sig == SIGSEGV || sig == SIGBUS) && info != NULL && info->si_addr == g_assert_poison) {

+    handle_assert_poison_fault(ucVoid, info->si_addr);

+    return 1;

+  }

+#endif

+

+  JavaThread* thread = NULL;

+  VMThread* vmthread = NULL;

+  if (os::Linux::signal_handlers_are_installed) {

+    if (t != NULL ){

+      if(t->is_Java_thread()) {

+        thread = (JavaThread*)t;

+      }

+      else if(t->is_VM_thread()){

+        vmthread = (VMThread *)t;

+      }

+    }

+  }

+/*

+  NOTE: does not seem to work on linux.

+  if (info == NULL || info->si_code <= 0 || info->si_code == SI_NOINFO) {

+    // can't decode this kind of signal

+    info = NULL;

+  } else {

+    assert(sig == info->si_signo, "bad siginfo");

+  }

+*/

+  // decide if this trap can be handled by a stub

+  address stub = NULL;

+

+  address pc          = NULL;

+

+  //%note os_trap_1

+  if (info != NULL && uc != NULL && thread != NULL) {

+    pc = (address) os::Linux::ucontext_get_pc(uc);

+

+#ifdef BUILTIN_SIM

+    if (pc == (address) Fetch32PFI) {

+       uc->uc_mcontext.gregs[REG_PC] = intptr_t(Fetch32Resume) ;

+       return 1 ;

+    }

+    if (pc == (address) FetchNPFI) {

+       uc->uc_mcontext.gregs[REG_PC] = intptr_t (FetchNResume) ;

+       return 1 ;

+    }

+#else

+    if (StubRoutines::is_safefetch_fault(pc)) {

+      os::Linux::ucontext_set_pc(uc, StubRoutines::continuation_for_safefetch_fault(pc));

+      return 1;

+    }

+#endif

+

+    address addr = (address) info->si_addr;

+

+    // Make sure the high order byte is sign extended, as it may be masked away by the hardware.

+    if ((uintptr_t(addr) & (uintptr_t(1) << 55)) != 0) {

+      addr = address(uintptr_t(addr) | (uintptr_t(0xFF) << 56));

+    }

+

+    // Handle ALL stack overflow variations here

+    if (sig == SIGSEGV) {

+      // check if fault address is within thread stack

+      if (thread->on_local_stack(addr)) {

+        // stack overflow

+        if (thread->in_stack_yellow_reserved_zone(addr)) {

+          if (thread->thread_state() == _thread_in_Java) {

+            if (thread->in_stack_reserved_zone(addr)) {

+              frame fr;

+              if (os::Linux::get_frame_at_stack_banging_point(thread, uc, &fr)) {

+                assert(fr.is_java_frame(), "Must be a Java frame");

+                frame activation =

+                  SharedRuntime::look_for_reserved_stack_annotated_method(thread, fr);

+                if (activation.sp() != NULL) {

+                  thread->disable_stack_reserved_zone();

+                  if (activation.is_interpreted_frame()) {

+                    thread->set_reserved_stack_activation((address)(

+                      activation.fp() + frame::interpreter_frame_initial_sp_offset));

+                  } else {

+                    thread->set_reserved_stack_activation((address)activation.unextended_sp());

+                  }

+                  return 1;

+                }

+              }

+            }

+            // Throw a stack overflow exception.  Guard pages will be reenabled

+            // while unwinding the stack.

+            thread->disable_stack_yellow_reserved_zone();

+            stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW);

+          } else {

+            // Thread was in the vm or native code.  Return and try to finish.

+            thread->disable_stack_yellow_reserved_zone();

+            return 1;

+          }

+        } else if (thread->in_stack_red_zone(addr)) {

+          // Fatal red zone violation.  Disable the guard pages and fall through

+          // to handle_unexpected_exception way down below.

+          thread->disable_stack_red_zone();

+          tty->print_raw_cr("An irrecoverable stack overflow has occurred.");

+

+          // This is a likely cause, but hard to verify. Let's just print

+          // it as a hint.

+          tty->print_raw_cr("Please check if any of your loaded .so files has "

+                            "enabled executable stack (see man page execstack(8))");

+        } else {

+          // Accessing stack address below sp may cause SEGV if current

+          // thread has MAP_GROWSDOWN stack. This should only happen when

+          // current thread was created by user code with MAP_GROWSDOWN flag

+          // and then attached to VM. See notes in os_linux.cpp.

+          if (thread->osthread()->expanding_stack() == 0) {

+             thread->osthread()->set_expanding_stack();

+             if (os::Linux::manually_expand_stack(thread, addr)) {

+               thread->osthread()->clear_expanding_stack();

+               return 1;

+             }

+             thread->osthread()->clear_expanding_stack();

+          } else {

+             fatal("recursive segv. expanding stack.");

+          }

+        }

+      }

+    }

+

+    if (thread->thread_state() == _thread_in_Java) {

+      // Java thread running in Java code => find exception handler if any

+      // a fault inside compiled code, the interpreter, or a stub

+

+      // Handle signal from NativeJump::patch_verified_entry().

+      if ((sig == SIGILL || sig == SIGTRAP)

+          && nativeInstruction_at(pc)->is_sigill_zombie_not_entrant()) {

+        if (TraceTraps) {

+          tty->print_cr("trap: zombie_not_entrant (%s)", (sig == SIGTRAP) ? "SIGTRAP" : "SIGILL");

+        }

+        stub = SharedRuntime::get_handle_wrong_method_stub();

+      } else if (sig == SIGSEGV && os::is_poll_address((address)info->si_addr)) {

+        stub = SharedRuntime::get_poll_stub(pc);

+      } else if (sig == SIGBUS /* && info->si_code == BUS_OBJERR */) {

+        // BugId 4454115: A read from a MappedByteBuffer can fault

+        // here if the underlying file has been truncated.

+        // Do not crash the VM in such a case.

+        CodeBlob* cb = CodeCache::find_blob_unsafe(pc);

+        CompiledMethod* nm = (cb != NULL) ? cb->as_compiled_method_or_null() : NULL;

+        if (nm != NULL && nm->has_unsafe_access()) {

+          address next_pc = pc + NativeCall::instruction_size;

+          stub = SharedRuntime::handle_unsafe_access(thread, next_pc);

+        }

+      }

+      else

+

+      if (sig == SIGFPE  &&

+          (info->si_code == FPE_INTDIV || info->si_code == FPE_FLTDIV)) {

+        stub =

+          SharedRuntime::

+          continuation_for_implicit_exception(thread,

+                                              pc,

+                                              SharedRuntime::

+                                              IMPLICIT_DIVIDE_BY_ZERO);

+      } else if (sig == SIGSEGV &&

+                 !MacroAssembler::needs_explicit_null_check((intptr_t)info->si_addr)) {

+          // Determination of interpreter/vtable stub/compiled code null exception

+          stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);

+      }

+    } else if (thread->thread_state() == _thread_in_vm &&

+               sig == SIGBUS && /* info->si_code == BUS_OBJERR && */

+               thread->doing_unsafe_access()) {

+      address next_pc = pc + NativeCall::instruction_size;

+      stub = SharedRuntime::handle_unsafe_access(thread, next_pc);

+    }

+

+    // jni_fast_Get<Primitive>Field can trap at certain pc's if a GC kicks in

+    // and the heap gets shrunk before the field access.

+    if ((sig == SIGSEGV) || (sig == SIGBUS)) {

+      address addr = JNI_FastGetField::find_slowcase_pc(pc);

+      if (addr != (address)-1) {

+        stub = addr;

+      }

+    }

+  }

+

+  if (stub != NULL) {

+    // save all thread context in case we need to restore it

+    if (thread != NULL) thread->set_saved_exception_pc(pc);

+

+    os::Linux::ucontext_set_pc(uc, stub);

+    return true;

+  }

+

+  // signal-chaining

+  if (os::Linux::chained_handler(sig, info, ucVoid)) {

+     return true;

+  }

+

+  if (!abort_if_unrecognized) {

+    // caller wants another chance, so give it to him

+    return false;

+  }

+

+  if (pc == NULL && uc != NULL) {

+    pc = os::Linux::ucontext_get_pc(uc);

+  }

+

+  // unmask current signal

+  sigset_t newset;

+  sigemptyset(&newset);

+  sigaddset(&newset, sig);

+  sigprocmask(SIG_UNBLOCK, &newset, NULL);

+

+  VMError::report_and_die(t, sig, pc, info, ucVoid);

+

+  ShouldNotReachHere();

+  return true; // Mute compiler

+}

+

+void os::Linux::init_thread_fpu_state(void) {

+}

+

+int os::Linux::get_fpu_control_word(void) {

+  return 0;

+}

+

+void os::Linux::set_fpu_control_word(int fpu_control) {

+}

+

+// Check that the linux kernel version is 2.4 or higher since earlier

+// versions do not support SSE without patches.

+bool os::supports_sse() {

+  return true;

+}

+

+bool os::is_allocatable(size_t bytes) {

+  return true;

+}

+

+////////////////////////////////////////////////////////////////////////////////

+// thread stack

+

+// Minimum usable stack sizes required to get to user code. Space for

+// HotSpot guard pages is added later.

+size_t os::Posix::_compiler_thread_min_stack_allowed = 72 * K;

+size_t os::Posix::_java_thread_min_stack_allowed = 72 * K;

+size_t os::Posix::_vm_internal_thread_min_stack_allowed = 72 * K;

+

+// return default stack size for thr_type

+size_t os::Posix::default_stack_size(os::ThreadType thr_type) {

+  // default stack size (compiler thread needs larger stack)

+  size_t s = (thr_type == os::compiler_thread ? 4 * M : 1 * M);

+  return s;

+}

+

+/////////////////////////////////////////////////////////////////////////////

+// helper functions for fatal error handler

+

+void os::print_context(outputStream *st, const void *context) {

+  if (context == NULL) return;

+

+  const ucontext_t *uc = (const ucontext_t*)context;

+  st->print_cr("Registers:");

+#ifdef BUILTIN_SIM

+  st->print(  "RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]);

+  st->print(", RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]);

+  st->print(", RCX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RCX]);

+  st->print(", RDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDX]);

+  st->cr();

+  st->print(  "RSP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSP]);

+  st->print(", RBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBP]);

+  st->print(", RSI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSI]);

+  st->print(", RDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDI]);

+  st->cr();

+  st->print(  "R8 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]);

+  st->print(", R9 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]);

+  st->print(", R10=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R10]);

+  st->print(", R11=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R11]);

+  st->cr();

+  st->print(  "R12=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R12]);

+  st->print(", R13=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R13]);

+  st->print(", R14=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R14]);

+  st->print(", R15=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R15]);

+  st->cr();

+  st->print(  "RIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RIP]);

+  st->print(", EFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EFL]);

+  st->print(", CSGSFS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_CSGSFS]);

+  st->print(", ERR=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_ERR]);

+  st->cr();

+  st->print("  TRAPNO=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_TRAPNO]);

+  st->cr();

+#else

+  for (int r = 0; r < 31; r++) {

+    st->print("R%-2d=", r);

+    print_location(st, uc->uc_mcontext.regs[r]);

+  }

+#endif

+  st->cr();

+

+  intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc);

+  st->print_cr("Top of Stack: (sp=" PTR_FORMAT ")", p2i(sp));

+  print_hex_dump(st, (address)sp, (address)(sp + 8*sizeof(intptr_t)), sizeof(intptr_t));

+  st->cr();

+

+  // Note: it may be unsafe to inspect memory near pc. For example, pc may

+  // point to garbage if entry point in an nmethod is corrupted. Leave

+  // this at the end, and hope for the best.

+  address pc = os::Linux::ucontext_get_pc(uc);

+  st->print_cr("Instructions: (pc=" PTR_FORMAT ")", p2i(pc));

+  print_hex_dump(st, pc - 32, pc + 32, sizeof(char));

+}

+

+void os::print_register_info(outputStream *st, const void *context) {

+  if (context == NULL) return;

+

+  const ucontext_t *uc = (const ucontext_t*)context;

+

+  st->print_cr("Register to memory mapping:");

+  st->cr();

+

+  // this is horrendously verbose but the layout of the registers in the

+  // context does not match how we defined our abstract Register set, so

+  // we can't just iterate through the gregs area

+

+  // this is only for the "general purpose" registers

+

+#ifdef BUILTIN_SIM

+  st->print("RAX="); print_location(st, uc->uc_mcontext.gregs[REG_RAX]);

+  st->print("RBX="); print_location(st, uc->uc_mcontext.gregs[REG_RBX]);

+  st->print("RCX="); print_location(st, uc->uc_mcontext.gregs[REG_RCX]);

+  st->print("RDX="); print_location(st, uc->uc_mcontext.gregs[REG_RDX]);

+  st->print("RSP="); print_location(st, uc->uc_mcontext.gregs[REG_RSP]);

+  st->print("RBP="); print_location(st, uc->uc_mcontext.gregs[REG_RBP]);

+  st->print("RSI="); print_location(st, uc->uc_mcontext.gregs[REG_RSI]);

+  st->print("RDI="); print_location(st, uc->uc_mcontext.gregs[REG_RDI]);

+  st->print("R8 ="); print_location(st, uc->uc_mcontext.gregs[REG_R8]);

+  st->print("R9 ="); print_location(st, uc->uc_mcontext.gregs[REG_R9]);

+  st->print("R10="); print_location(st, uc->uc_mcontext.gregs[REG_R10]);

+  st->print("R11="); print_location(st, uc->uc_mcontext.gregs[REG_R11]);

+  st->print("R12="); print_location(st, uc->uc_mcontext.gregs[REG_R12]);

+  st->print("R13="); print_location(st, uc->uc_mcontext.gregs[REG_R13]);

+  st->print("R14="); print_location(st, uc->uc_mcontext.gregs[REG_R14]);

+  st->print("R15="); print_location(st, uc->uc_mcontext.gregs[REG_R15]);

+#else

+  for (int r = 0; r < 31; r++)

+    st->print_cr(  "R%d=" INTPTR_FORMAT, r, (uintptr_t)uc->uc_mcontext.regs[r]);

+#endif

+  st->cr();

+}

+

+void os::setup_fpu() {

+}

+

+#ifndef PRODUCT

+void os::verify_stack_alignment() {

+  assert(((intptr_t)os::current_stack_pointer() & (StackAlignmentInBytes-1)) == 0, "incorrect stack alignment");

+}

+#endif

+

+int os::extra_bang_size_in_bytes() {

+  // AArch64 does not require the additional stack bang.

+  return 0;

+}

+

+extern "C" {

+  int SpinPause() {

+    return 0;

+  }

+

+  void _Copy_conjoint_jshorts_atomic(jshort* from, jshort* to, size_t count) {

+    if (from > to) {

+      jshort *end = from + count;

+      while (from < end)

+        *(to++) = *(from++);

+    }

+    else if (from < to) {

+      jshort *end = from;

+      from += count - 1;

+      to   += count - 1;

+      while (from >= end)

+        *(to--) = *(from--);

+    }

+  }

+  void _Copy_conjoint_jints_atomic(jint* from, jint* to, size_t count) {

+    if (from > to) {

+      jint *end = from + count;

+      while (from < end)

+        *(to++) = *(from++);

+    }

+    else if (from < to) {

+      jint *end = from;

+      from += count - 1;

+      to   += count - 1;

+      while (from >= end)

+        *(to--) = *(from--);

+    }

+  }

+  void _Copy_conjoint_jlongs_atomic(jlong* from, jlong* to, size_t count) {

+    if (from > to) {

+      jlong *end = from + count;

+      while (from < end)

+        os::atomic_copy64(from++, to++);

+    }

+    else if (from < to) {

+      jlong *end = from;

+      from += count - 1;

+      to   += count - 1;

+      while (from >= end)

+        os::atomic_copy64(from--, to--);

+    }

+  }

+

+  void _Copy_arrayof_conjoint_bytes(HeapWord* from,

+                                    HeapWord* to,

+                                    size_t    count) {

+    memmove(to, from, count);

+  }

+  void _Copy_arrayof_conjoint_jshorts(HeapWord* from,

+                                      HeapWord* to,

+                                      size_t    count) {

+    memmove(to, from, count * 2);

+  }

+  void _Copy_arrayof_conjoint_jints(HeapWord* from,

+                                    HeapWord* to,

+                                    size_t    count) {

+    memmove(to, from, count * 4);

+  }

+  void _Copy_arrayof_conjoint_jlongs(HeapWord* from,

+                                     HeapWord* to,

+                                     size_t    count) {

+    memmove(to, from, count * 8);

+  }

+};

diff --git a/src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.hpp b/src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.hpp

new file mode 100644

index 0000000000..d2d02efc54

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.hpp

@@ -0,0 +1,45 @@

+/*

+ * Copyright (c) 1999, 2017, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+#ifndef OS_CPU_LINUX_AARCH64_VM_OS_LINUX_AARCH64_HPP

+#define OS_CPU_LINUX_AARCH64_VM_OS_LINUX_AARCH64_HPP

+

+  static void setup_fpu();

+  static bool supports_sse();

+

+  static jlong rdtsc();

+

+  static bool is_allocatable(size_t bytes);

+

+  // Used to register dynamic code cache area with the OS

+  // Note: Currently only used in 64 bit Windows implementations

+  static bool register_code_area(char *low, char *high) { return true; }

+

+  // Atomically copy 64 bits of data

+  static void atomic_copy64(const volatile void *src, volatile void *dst) {

+    *(jlong *) dst = *(const jlong *) src;

+  }

+

+#endif // OS_CPU_LINUX_AARCH64_VM_OS_LINUX_AARCH64_HPP

diff --git a/src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.inline.hpp b/src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.inline.hpp

new file mode 100644

index 0000000000..2402d13540

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/os_bsd_aarch64.inline.hpp

@@ -0,0 +1,40 @@

+/*

+ * Copyright (c) 2011, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+#ifndef OS_CPU_LINUX_AARCH64_VM_OS_LINUX_AARCH64_INLINE_HPP

+#define OS_CPU_LINUX_AARCH64_VM_OS_LINUX_AARCH64_INLINE_HPP

+

+#include "runtime/os.hpp"

+

+// See http://www.technovelty.org/code/c/reading-rdtsc.htl for details

+inline jlong os::rdtsc() {

+  uint64_t res;

+  uint32_t ts1, ts2;

+  __asm__ __volatile__ ("rdtsc" : "=a" (ts1), "=d" (ts2));

+  res = ((uint64_t)ts1 | (uint64_t)ts2 << 32);

+  return (jlong)res;

+}

+

+#endif // OS_CPU_LINUX_AARCH64_VM_OS_LINUX_AARCH64_INLINE_HPP

diff --git a/src/hotspot/os_cpu/bsd_aarch64/prefetch_bsd_aarch64.inline.hpp b/src/hotspot/os_cpu/bsd_aarch64/prefetch_bsd_aarch64.inline.hpp

new file mode 100644

index 0000000000..687eb50bab

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/prefetch_bsd_aarch64.inline.hpp

@@ -0,0 +1,46 @@

+/*

+ * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+#ifndef OS_CPU_LINUX_AARCH64_VM_PREFETCH_LINUX_AARCH64_INLINE_HPP

+#define OS_CPU_LINUX_AARCH64_VM_PREFETCH_LINUX_AARCH64_INLINE_HPP

+

+#include "runtime/prefetch.hpp"

+

+

+inline void Prefetch::read (void *loc, intx interval) {

+#ifndef BUILTIN_SIM

+  if (interval >= 0)

+    asm("prfm PLDL1KEEP, [%0, %1]" : : "r"(loc), "r"(interval));

+#endif

+}

+

+inline void Prefetch::write(void *loc, intx interval) {

+#ifndef BUILTIN_SIM

+  if (interval >= 0)

+    asm("prfm PSTL1KEEP, [%0, %1]" : : "r"(loc), "r"(interval));

+#endif

+}

+

+#endif // OS_CPU_LINUX_AARCH64_VM_PREFETCH_LINUX_AARCH64_INLINE_HPP

diff --git a/src/hotspot/os_cpu/bsd_aarch64/threadLS_bsd_aarch64.s b/src/hotspot/os_cpu/bsd_aarch64/threadLS_bsd_aarch64.s

new file mode 100644

index 0000000000..f541844b9d

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/threadLS_bsd_aarch64.s

@@ -0,0 +1,44 @@

+// Copyright (c) 2015, Red Hat Inc. All rights reserved.

+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+//

+// This code is free software; you can redistribute it and/or modify it

+// under the terms of the GNU General Public License version 2 only, as

+// published by the Free Software Foundation.

+//

+// This code is distributed in the hope that it will be useful, but WITHOUT

+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+// version 2 for more details (a copy is included in the LICENSE file that

+// accompanied this code).

+//

+// You should have received a copy of the GNU General Public License version

+// 2 along with this work; if not, write to the Free Software Foundation,

+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+//

+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+// or visit www.oracle.com if you need additional information or have any

+// questions.

+

+        // JavaThread::aarch64_get_thread_helper()

+        //

+        // Return the current thread pointer in x0.

+        // Clobber x1, flags.

+        // All other registers are preserved,

+

+	.global	_ZN10JavaThread25aarch64_get_thread_helperEv

+	.type	_ZN10JavaThread25aarch64_get_thread_helperEv, %function

+

+_ZN10JavaThread25aarch64_get_thread_helperEv:

+	stp x29, x30, [sp, -16]!

+	adrp x0, :tlsdesc:_ZN6Thread12_thr_currentE

+	ldr x1, [x0, #:tlsdesc_lo12:_ZN6Thread12_thr_currentE]

+	add x0, x0, :tlsdesc_lo12:_ZN6Thread12_thr_currentE

+	.tlsdesccall _ZN6Thread12_thr_currentE

+	blr x1

+	mrs x1, tpidr_el0

+	add x0, x1, x0

+	ldr x0, [x0]

+	ldp x29, x30, [sp], 16

+	ret

+

+	.size _ZN10JavaThread25aarch64_get_thread_helperEv, .-_ZN10JavaThread25aarch64_get_thread_helperEv

diff --git a/src/hotspot/os_cpu/bsd_aarch64/thread_bsd_aarch64.cpp b/src/hotspot/os_cpu/bsd_aarch64/thread_bsd_aarch64.cpp

new file mode 100644

index 0000000000..9084daeaa2

--- /dev/null

+++ src/hotspot/os_cpu/bsd_aarch64/thread_bsd_aarch64.cpp

@@ -0,0 +1,104 @@

+/*

+ * Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.

+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.

+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

+ *

+ * This code is free software; you can redistribute it and/or modify it

+ * under the terms of the GNU General Public License version 2 only, as

+ * published by the Free Software Foundation.

+ *

+ * This code is distributed in the hope that it will be useful, but WITHOUT

+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

+ * version 2 for more details (a copy is included in the LICENSE file that

+ * accompanied this code).

+ *

+ * You should have received a copy of the GNU General Public License version

+ * 2 along with this work; if not, write to the Free Software Foundation,

+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

+ *

+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

+ * or visit www.oracle.com if you need additional information or have any

+ * questions.

+ *

+ */

+

+#include "precompiled.hpp"

+#include "memory/metaspaceShared.hpp"

+#include "runtime/frame.inline.hpp"

+#include "runtime/thread.inline.hpp"

+

+frame JavaThread::pd_last_frame() {

+  assert(has_last_Java_frame(), "must have last_Java_sp() when suspended");

+  return frame(_anchor.last_Java_sp(), _anchor.last_Java_fp(), _anchor.last_Java_pc());

+}

+

+// For Forte Analyzer AsyncGetCallTrace profiling support - thread is

+// currently interrupted by SIGPROF

+bool JavaThread::pd_get_top_frame_for_signal_handler(frame* fr_addr,

+  void* ucontext, bool isInJava) {

+

+  assert(Thread::current() == this, "caller must be current thread");

+  return pd_get_top_frame(fr_addr, ucontext, isInJava);

+}