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(-)b/graphics/mesa-dri/Makefile (-1 / +1 lines)
Lines 3-9 Link Here
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PORTNAME=	mesa-dri
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PORTNAME=	mesa-dri
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PORTVERSION=	${MESAVERSION}
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PORTVERSION=	${MESAVERSION}
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PORTREVISION=	5
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PORTREVISION=	6
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CATEGORIES=	graphics
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CATEGORIES=	graphics
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COMMENT=	OpenGL hardware acceleration drivers for DRI2+
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COMMENT=	OpenGL hardware acceleration drivers for DRI2+
(-)b/graphics/mesa-dri/files/patch-39d0c68 (+16 lines)
Added Link Here
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https://gitlab.freedesktop.org/mesa/mesa/commit/39d0c68321df
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--- src/amd/common/ac_llvm_build.c.orig	2019-01-17 11:26:22 UTC
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+++ src/amd/common/ac_llvm_build.c
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@@ -401,8 +401,9 @@ ac_build_optimization_barrier(struct ac_llvm_context *
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 LLVMValueRef
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 ac_build_shader_clock(struct ac_llvm_context *ctx)
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 {
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-	LLVMValueRef tmp = ac_build_intrinsic(ctx, "llvm.readcyclecounter",
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-					      ctx->i64, NULL, 0, 0);
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+	const char *intr = HAVE_LLVM >= 0x0900 && ctx->chip_class >= VI ?
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+				"llvm.amdgcn.s.memrealtime" : "llvm.readcyclecounter";
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+	LLVMValueRef tmp = ac_build_intrinsic(ctx, intr, ctx->i64, NULL, 0, 0);
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 	return LLVMBuildBitCast(ctx->builder, tmp, ctx->v2i32, "");
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 }
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(-)b/graphics/mesa-dri/files/patch-dded2ed (+46 lines)
Added Link Here
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https://gitlab.freedesktop.org/mesa/mesa/commit/dded2edf8bed
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--- src/gallium/auxiliary/gallivm/lp_bld_arit.c.orig	2019-01-17 11:26:22 UTC
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+++ src/gallium/auxiliary/gallivm/lp_bld_arit.c
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@@ -555,6 +555,12 @@ lp_build_add(struct lp_build_context *bld,
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         return bld->one;
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       if (!type.floating && !type.fixed) {
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+         if (HAVE_LLVM >= 0x0900) {
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+            char intrin[32];
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+            intrinsic = type.sign ? "llvm.sadd.sat" : "llvm.uadd.sat";
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+            lp_format_intrinsic(intrin, sizeof intrin, intrinsic, bld->vec_type);
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+            return lp_build_intrinsic_binary(builder, intrin, bld->vec_type, a, b);
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+         }
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          if (type.width * type.length == 128) {
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             if (util_cpu_caps.has_sse2) {
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                if (type.width == 8)
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@@ -625,6 +631,7 @@ lp_build_add(struct lp_build_context *bld,
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           * NOTE: cmp/select does sext/trunc of the mask. Does not seem to
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           * interfere with llvm's ability to recognize the pattern but seems
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           * a bit brittle.
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+          * NOTE: llvm 9+ always uses (non arch specific) intrinsic.
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           */
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          LLVMValueRef overflowed = lp_build_cmp(bld, PIPE_FUNC_GREATER, a, res);
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          res = lp_build_select(bld, overflowed,
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@@ -876,6 +883,12 @@ lp_build_sub(struct lp_build_context *bld,
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         return bld->zero;
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       if (!type.floating && !type.fixed) {
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+         if (HAVE_LLVM >= 0x0900) {
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+            char intrin[32];
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+            intrinsic = type.sign ? "llvm.ssub.sat" : "llvm.usub.sat";
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+            lp_format_intrinsic(intrin, sizeof intrin, intrinsic, bld->vec_type);
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+            return lp_build_intrinsic_binary(builder, intrin, bld->vec_type, a, b);
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+         }
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          if (type.width * type.length == 128) {
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             if (util_cpu_caps.has_sse2) {
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                if (type.width == 8)
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@@ -925,6 +938,7 @@ lp_build_sub(struct lp_build_context *bld,
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           * NOTE: cmp/select does sext/trunc of the mask. Does not seem to
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           * interfere with llvm's ability to recognize the pattern but seems
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           * a bit brittle.
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+          * NOTE: llvm 9+ always uses (non arch specific) intrinsic.
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           */
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          LLVMValueRef no_ov = lp_build_cmp(bld, PIPE_FUNC_GREATER, a, b);
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          a = lp_build_select(bld, no_ov, a, b);

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