Attachment #214925 for bug #204521




		error = rtsx_send_req_get_resp(sc, cmd);
		if (error)
			return (error);
	}
	
	/* Configure DMA transfer mode parameters. */
	if (cmd->opcode == MMC_READ_MULTIPLE_BLOCK)

		 * sent the write command and gotten the response, and will
		 * send CMD 12 manually after writing multiple blocks.
		 */
        tmode = RTSX_TM_AUTO_WRITE3;
		cfg2 |= RTSX_SD_NO_CALCULATE_CRC7 | RTSX_SD_NO_CHECK_CRC7;

		sc->rtsx_cmd_index = 0;

	rtsx_send_cmd_nowait(sc, cmd);

	sc->rtsx_intr_status = 0;
    /* Sync data DMA buffer. */
    bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_PREREAD);
    bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_PREWRITE);
	if (!read)
		memcpy(sc->rtsx_data_dmamem, cmd->data->data, cmd->data->len);
	
	/* Sync data DMA buffer. */
	bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_PREREAD);
	bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_PREWRITE);

	/* Tell the chip where the data buffer is and run the transfer. */
	WRITE4(sc, RTSX_HDBAR, sc->rtsx_data_buffer);
	WRITE4(sc, RTSX_HDBCTLR, RTSX_TRIG_DMA | (read ? RTSX_DMA_READ : 0) |

	bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_POSTWRITE);

	if (read)
        memcpy(cmd->data->data, sc->rtsx_data_dmamem, cmd->data->len);
    else
        rtsx_send_req_get_resp(sc,sc->rtsx_req->stop);

    return (error);
}

static int

Return to bug 204521

Lines 1702-1708 rtsx_xfer(struct rtsx_softc sc, struct mmc_command cmd) Link Here

(-)b/rtsx.c (-10 / +9 lines)
1702	error = rtsx_send_req_get_resp(sc, cmd);	1702	error = rtsx_send_req_get_resp(sc, cmd);
1703	if (error)	1703	if (error)
1704	return (error);	1704	return (error);
1705	}
1706		1705
1707	/* Configure DMA transfer mode parameters. */	1706	/* Configure DMA transfer mode parameters. */
1708	if (cmd->opcode == MMC_READ_MULTIPLE_BLOCK)	1707	if (cmd->opcode == MMC_READ_MULTIPLE_BLOCK)
Lines 1727-1733 rtsx_xfer(struct rtsx_softc sc, struct mmc_command cmd) Link Here
1727	* sent the write command and gotten the response, and will	1726	* sent the write command and gotten the response, and will
1728	* send CMD 12 manually after writing multiple blocks.	1727	* send CMD 12 manually after writing multiple blocks.
1729	*/	1728	*/
1730	tmode = RTSX_TM_AUTO_WRITE3;	1729	tmode = RTSX_TM_AUTO_WRITE3;
1731	cfg2 \|= RTSX_SD_NO_CALCULATE_CRC7 \| RTSX_SD_NO_CHECK_CRC7;	1730	cfg2 \|= RTSX_SD_NO_CALCULATE_CRC7 \| RTSX_SD_NO_CHECK_CRC7;
1732		1731
1733	sc->rtsx_cmd_index = 0;	1732	sc->rtsx_cmd_index = 0;
Lines 1776-1789 rtsx_xfer(struct rtsx_softc sc, struct mmc_command cmd) Link Here
1776	rtsx_send_cmd_nowait(sc, cmd);	1775	rtsx_send_cmd_nowait(sc, cmd);
1777		1776
1778	sc->rtsx_intr_status = 0;	1777	sc->rtsx_intr_status = 0;
1779		1778	/* Sync data DMA buffer. */
		1779	bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_PREREAD);
		1780	bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_PREWRITE);
1780	if (!read)	1781	if (!read)
1781	memcpy(sc->rtsx_data_dmamem, cmd->data->data, cmd->data->len);	1782	memcpy(sc->rtsx_data_dmamem, cmd->data->data, cmd->data->len);
1782		1783
1783	/* Sync data DMA buffer. */
1784	bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_PREREAD);
1785	bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_PREWRITE);
1786
1787	/* Tell the chip where the data buffer is and run the transfer. */	1784	/* Tell the chip where the data buffer is and run the transfer. */
1788	WRITE4(sc, RTSX_HDBAR, sc->rtsx_data_buffer);	1785	WRITE4(sc, RTSX_HDBAR, sc->rtsx_data_buffer);
1789	WRITE4(sc, RTSX_HDBCTLR, RTSX_TRIG_DMA \| (read ? RTSX_DMA_READ : 0) \|	1786	WRITE4(sc, RTSX_HDBCTLR, RTSX_TRIG_DMA \| (read ? RTSX_DMA_READ : 0) \|
Lines 1799-1807 rtsx_xfer(struct rtsx_softc sc, struct mmc_command cmd) Link Here
1799	bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_POSTWRITE);	1796	bus_dmamap_sync(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamap, BUS_DMASYNC_POSTWRITE);
1800		1797
1801	if (read)	1798	if (read)
1802	memcpy(cmd->data->data, sc->rtsx_data_dmamem, cmd->data->len);	1799	memcpy(cmd->data->data, sc->rtsx_data_dmamem, cmd->data->len);
1803		1800	else
1804	return (error);	1801	rtsx_send_req_get_resp(sc,sc->rtsx_req->stop);
		1802
		1803	return (error);
1805	}	1804	}
1806		1805
1807	static int	1806	static int