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(-)sys/dev/usb/controller/xhci.c (+11 lines)
Lines 1898-1903 Link Here
1898
				}
1898
				}
1899
				if (temp->direction == UE_DIR_IN)
1899
				if (temp->direction == UE_DIR_IN)
1900
					dword |= XHCI_TRB_3_ISP_BIT;
1900
					dword |= XHCI_TRB_3_ISP_BIT;
1901
				if (!temp->last_frame)
1902
					dword |= XHCI_TRB_3_BEI_BIT;
1901
				break;
1903
				break;
1902
			case XHCI_TRB_TYPE_DATA_STAGE:
1904
			case XHCI_TRB_TYPE_DATA_STAGE:
1903
				dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT |
1905
				dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT |
Lines 1940-1945 Link Here
1940
1942
1941
		td->td_trb[x-1].dwTrb3 |= htole32(XHCI_TRB_3_IOC_BIT);
1943
		td->td_trb[x-1].dwTrb3 |= htole32(XHCI_TRB_3_IOC_BIT);
1942
1944
1945
		switch (temp->trb_type) {
1946
		case XHCI_TRB_TYPE_ISOCH:
1947
			if (!temp->last_frame)
1948
				td->td_trb[x-1].dwTrb3 |= htole32(XHCI_TRB_3_BEI_BIT);
1949
			break;
1950
		default:
1951
			break;
1952
		}
1953
1943
		/* store number of data TRB's */
1954
		/* store number of data TRB's */
1944
1955
1945
		td->ntrb = x;
1956
		td->ntrb = x;

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