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--- deps/v8/src/codegen/arm/cpu-arm.cc.orig 2021-10-26 12:00:55 UTC |
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+++ deps/v8/src/codegen/arm/cpu-arm.cc |
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@@ -2,12 +2,14 @@ |
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// Use of this source code is governed by a BSD-style license that can be |
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// found in the LICENSE file. |
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|
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+#include "include/v8config.h" |
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// CPU specific code for arm independent of OS goes here. |
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#ifdef __arm__ |
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#ifdef __QNXNTO__ |
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#include <sys/mman.h> // for cache flushing. |
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#undef MAP_TYPE |
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#elif V8_OS_FREEBSD |
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+#include <sys/cdefs.h> |
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#include <machine/sysarch.h> // for cache flushing |
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#include <sys/types.h> |
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#elif V8_OS_STARBOARD |
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@@ -31,9 +33,7 @@ V8_NOINLINE void CpuFeatures::FlushICache(void* start, |
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#if V8_OS_QNX |
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msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE); |
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#elif V8_OS_FREEBSD |
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- struct arm_sync_icache_args args = { |
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- .addr = reinterpret_cast<uintptr_t>(start), .len = size}; |
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- sysarch(ARM_SYNC_ICACHE, reinterpret_cast<void*>(&args)); |
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+ arm_sync_icache(reinterpret_cast<uintptr_t>(start), size); |
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#else |
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register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start); |
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register uint32_t end asm("r1") = beg + size; |