Attachment #233863 for bug #261355




static int
a20_if_dwc_init(device_t dev)
{
	struct dwc_softc *sc;
	const char *tx_parent_name;
	char *phy_type;
	clk_t clk_tx, clk_tx_parent;
	regulator_t reg;
	phandle_t node;
	int error;

	sc = device_get_softc(dev);

	/* Configure PHY for MII or RGMII mode */
	switch(sc->phy_mode) {
	case PHY_MODE_RGMII:
		tx_parent_name = "gmac_int_tx";
		break;
	case PHY_MODE_MII:
		tx_parent_name = "mii_phy_tx";
		break;
	default:
		device_printf(dev, "unsupported PHY connection type: %d",
		    sc->phy_mode);
		return (ENXIO);
	}
		error = clk_get_by_name(dev, tx_parent_name, &clk_tx_parent);
		if (error != 0) {
			device_printf(dev, "could not get clock '%s'\n",
			    tx_parent_name);
			return (error);
		}

	error = clk_get_by_ofw_name(dev, 0, "allwinner_gmac_tx", &clk_tx);
	if (error != 0) {
		device_printf(dev, "could not get tx clk\n");
		return (error);
	}
	error = clk_get_by_name(dev, tx_parent_name, &clk_tx_parent);
	if (error != 0) {
		device_printf(dev, "could not get clock '%s'\n",
		    tx_parent_name);
		return (error);
	}
	error = clk_set_parent_by_clk(clk_tx, clk_tx_parent);
	if (error != 0) {
		device_printf(dev, "could not set tx clk parent\n");
		return (error);
	}

	/* Enable PHY regulator if applicable */

Return to bug 261355

Lines 62-101 a20_if_dwc_probe(device_t dev) Link Here

(-)b/sys/arm/allwinner/aw_if_dwc.c (-26 / +29 lines)
62	static int	62	static int
63	a20_if_dwc_init(device_t dev)	63	a20_if_dwc_init(device_t dev)
64	{	64	{
		65	struct dwc_softc *sc;
65	const char *tx_parent_name;	66	const char *tx_parent_name;
66	char *phy_type;
67	clk_t clk_tx, clk_tx_parent;	67	clk_t clk_tx, clk_tx_parent;
68	regulator_t reg;	68	regulator_t reg;
69	phandle_t node;
70	int error;	69	int error;
71		70
72	node = ofw_bus_get_node(dev);	71	sc = device_get_softc(dev);
73		72
74	/* Configure PHY for MII or RGMII mode */	73	/* Configure PHY for MII or RGMII mode */
75	if (OF_getprop_alloc(node, "phy-mode", (void **)&phy_type)) {	74	switch(sc->phy_mode) {
76	error = clk_get_by_ofw_name(dev, 0, "allwinner_gmac_tx", &clk_tx);	75	case PHY_MODE_RGMII:
77	if (error != 0) {	76	tx_parent_name = "gmac_int_tx";
78	device_printf(dev, "could not get tx clk\n");	77	break;
79	return (error);	78	case PHY_MODE_MII:
80	}	79	tx_parent_name = "mii_phy_tx";
81		80	break;
82	if (strcmp(phy_type, "rgmii") == 0)	81	default:
83	tx_parent_name = "gmac_int_tx";	82	device_printf(dev, "unsupported PHY connection type: %d",
84	else	83	sc->phy_mode);
85	tx_parent_name = "mii_phy_tx";	84	return (ENXIO);
86		85	}
87	error = clk_get_by_name(dev, tx_parent_name, &clk_tx_parent);
88	if (error != 0) {
89	device_printf(dev, "could not get clock '%s'\n",
90	tx_parent_name);
91	return (error);
92	}
93		86
94	error = clk_set_parent_by_clk(clk_tx, clk_tx_parent);	87	error = clk_get_by_ofw_name(dev, 0, "allwinner_gmac_tx", &clk_tx);
95	if (error != 0) {	88	if (error != 0) {
96	device_printf(dev, "could not set tx clk parent\n");	89	device_printf(dev, "could not get tx clk\n");
97	return (error);	90	return (error);
98	}	91	}
		92	error = clk_get_by_name(dev, tx_parent_name, &clk_tx_parent);
		93	if (error != 0) {
		94	device_printf(dev, "could not get clock '%s'\n",
		95	tx_parent_name);
		96	return (error);
		97	}
		98	error = clk_set_parent_by_clk(clk_tx, clk_tx_parent);
		99	if (error != 0) {
		100	device_printf(dev, "could not set tx clk parent\n");
		101	return (error);
99	}	102	}
100		103
101	/* Enable PHY regulator if applicable */	104	/* Enable PHY regulator if applicable */