Attachment #235413 for bug #265368

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Lines 106-111 Link Here

(-)b/benchmarks/Makefile (+1 lines)
106	SUBDIR += ttcp	106	SUBDIR += ttcp
107	SUBDIR += typometer	107	SUBDIR += typometer
108	SUBDIR += ubench	108	SUBDIR += ubench
		109	SUBDIR += uica
109	SUBDIR += unixbench	110	SUBDIR += unixbench
110	SUBDIR += uperf	111	SUBDIR += uperf
111	SUBDIR += vegeta	112	SUBDIR += vegeta




PORTNAME=	uiCA
PORTVERSION=	g20220630+${INSTRVERSION}
CATEGORIES=	benchmarks devel
MASTER_SITES=	https://uops.info/instructions.xml?dummy=/:instructions \
		https://uops.info/:instructions
PKGNAMEPREFIX=	${PYTHON_PKGNAMEPREFIX}
DISTFILES=	${INSTRUCTIONS}:instructions
EXTRACT_ONLY=	${DISTFILES:C,:[^:]*$,,:N*.xml}

MAINTAINER=	fuz@fuz.su
COMMENT=	uops.info Code Analyzer

LICENSE=	AGPLv3 APACHE20
LICENSE_COMB=	multi

BUILD_DEPENDS=	${PYTHON_PKGNAMEPREFIX}setuptools>0:devel/py-setuptools@${PY_FLAVOR}
RUN_DEPENDS=	${PYTHON_PKGNAMEPREFIX}plotly>0:graphics/py-plotly@${PY_FLAVOR}

USES=		compiler python shebangfix
USE_GITHUB=	yes
GH_ACCOUNT=	andreas-abel
GH_TAGNAME=	ba6ad5557ebd96a10fa0d0e076c9961ec5024574
GH_TUPLE=	andreas-abel:XED-to-XML:c71679ee893ae91db677056d542f305fcc433cb1:xed/XED-to-XML \
		intelxed:mbuild:09b6654be0c52bf1df44e88c88b411a67b624cbd:mbuild/mbuild
USE_PYTHON=	concurrent flavors

# manually build a file name like instructions_Apr2022.xml from
# the machine-sortable INSTRVERSION.  Use := to have date run only once
INSTRVERSION=	2022.04
INSTRUCTIONS:=	instructions_${LC_ALL=C date -j -f %Y.%m ${INSTRVERSION} +%b%Y:L:sh}.xml

MFLAGS=		--compiler=${COMPILER_TYPE:S/gcc/gnu/} \
		--cc=${CC} \
		--cxx=${CXX} \
		--strip=${STRIP_CMD} \
		--extra-ccflags='${CFLAGS}' \
		--extra-cxxflags='${CXXFLAGS}' \
		--extra-linkflags='${LDFLAGS}'

SHEBANG_FILES=	uiCA.py

do-configure:
	${REINPLACE_CMD} -e 's,%%DATADIR%%,${DATADIR},' ${WRKSRC}/uiCA.py

do-build:
	(cd ${WRKSRC}/XED-to-XML && ${PYTHON_CMD} mfile.py ${MFLAGS} --no-encoder pymodule)
	${LN} -f ${WRKSRC}/XED-to-XML/xed.* ${WRKSRC}/
	(cd ${WRKSRC} && ${PYTHON_CMD} convertXML.py ${DISTDIR}/${INSTRUCTIONS})
	${RM} -r ${WRKSRC}/__pycache__
.for f in microArchConfigs.py uiCA.py x64_lib.py instrData
	${PYTHON_CMD} -m compileall ${WRKSRC}/$f
.endfor

do-install:
	${MKDIR} ${STAGEDIR}${DATADIR} ${STAGEDIR}${PYTHON_LIBDIR}/lib-dynload/
	${INSTALL_DATA} ${WRKSRC}/traceTemplate.html ${STAGEDIR}${DATADIR}/
	${INSTALL_LIB} ${WRKSRC}/xed${PYTHON_EXT_SUFFIX}.so ${STAGEDIR}${PYTHON_LIBDIR}/lib-dynload/
	(cd ${WRKSRC} && ${COPYTREE_SHARE} '__pycache__ instrData microArchConfigs.py x64_lib.py' ${STAGEDIR}${PYTHON_LIBDIR})
	${INSTALL_SCRIPT} ${WRKSRC}/uiCA.py ${STAGEDIR}${PREFIX}/bin/uiCA

.include <bsd.port.mk>

Added Link Here

(-)b/benchmarks/uica/distinfo (+9 lines)
1	TIMESTAMP = 1658429663
2	SHA256 (instructions_Apr2022.xml) = 5f495e61df55443f06de73b7567d29ec3f3d097db135ee55b9ab89fcae75d4fc
3	SIZE (instructions_Apr2022.xml) = 109323644
4	SHA256 (andreas-abel-uiCA-g20220630+2022.04-ba6ad5557ebd96a10fa0d0e076c9961ec5024574_GH0.tar.gz) = 93d78e9d380eed1a7f8828b762e60e371898a8b3d6bc0cf3cfca8d3bed199872
5	SIZE (andreas-abel-uiCA-g20220630+2022.04-ba6ad5557ebd96a10fa0d0e076c9961ec5024574_GH0.tar.gz) = 46859
6	SHA256 (andreas-abel-XED-to-XML-c71679ee893ae91db677056d542f305fcc433cb1_GH0.tar.gz) = b610897d541cf808cfbf53c5a9abe384e7ca2cac25939e994a737d3bcfa00c35
7	SIZE (andreas-abel-XED-to-XML-c71679ee893ae91db677056d542f305fcc433cb1_GH0.tar.gz) = 1286967
8	SHA256 (intelxed-mbuild-09b6654be0c52bf1df44e88c88b411a67b624cbd_GH0.tar.gz) = 5af6b3f0394df1332dd2f09d842719bd2ece1037c09cd042f18e417dddf1e54e
9	SIZE (intelxed-mbuild-09b6654be0c52bf1df44e88c88b411a67b624cbd_GH0.tar.gz) = 81598

Added Link Here

(-)b/benchmarks/uica/files/patch-mbuild_mbuild_env.py (+11 lines)
1	--- mbuild/mbuild/env.py.orig 2021-04-16 20:40:24 UTC
2	+++ mbuild/mbuild/env.py
3	@@ -1237,6 +1237,8 @@ class env_t(object):
4	return 'ia32'
5	elif name in ['aarch64', 'arm64']:
6	return 'aarch64'
7	+ elif name[0:3] == 'arm':
8	+ return 'arm'
9	else:
10	die("Unknown cpu " + name)
11

Added Link Here

(-)b/benchmarks/uica/files/patch-uiCA.py (+11 lines)
1	--- uiCA.py.orig 2022-07-21 20:16:37 UTC
2	+++ uiCA.py
3	@@ -2077,7 +2077,7 @@ def generateHTMLTraceTable(filename, instructions, ins
4	uopData['events'][evCycle] = ev
5	prevInstrI = instrI
6
7	- with open(os.path.join(os.path.dirname(os.path.realpath(__file__)), 'traceTemplate.html'), 'r') as t:
8	+ with open('%%DATADIR%%/traceTemplate.html', 'r') as t:
9	html = t.read()
10	html = html.replace('var tableData = {}', 'var tableData = ' + json.dumps(tableDataForRnd))
11

Added Link Here

(-)b/benchmarks/uica/pkg-descr (+9 lines)
1	uiCA is a simulator that can predict the throughput of basic blocks on
2	recent Intel microarchitectures. In addition to that, it also provides
3	insights into how the code is executed.
4
5	uiCA is based on data from uops.info, combined with a detailed pipeline
6	model. Like related tools, it assumes that all memory accesses result in
7	cache hits.
8
9	WWW: https://uops.info/uiCA.html




bin/uiCA
%%PYTHON_LIBDIR%%/__pycache__/microArchConfigs%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/__pycache__/uiCA%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/__pycache__/x64_lib%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/BDW.py
%%PYTHON_LIBDIR%%/instrData/CFL.py
%%PYTHON_LIBDIR%%/instrData/CLX.py
%%PYTHON_LIBDIR%%/instrData/HSW.py
%%PYTHON_LIBDIR%%/instrData/ICL.py
%%PYTHON_LIBDIR%%/instrData/IVB.py
%%PYTHON_LIBDIR%%/instrData/KBL.py
%%PYTHON_LIBDIR%%/instrData/RKL.py
%%PYTHON_LIBDIR%%/instrData/SKL.py
%%PYTHON_LIBDIR%%/instrData/SKX.py
%%PYTHON_LIBDIR%%/instrData/SNB.py
%%PYTHON_LIBDIR%%/instrData/TGL.py
%%PYTHON_LIBDIR%%/instrData/__init__.py
%%PYTHON_LIBDIR%%/instrData/__pycache__/BDW%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/CFL%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/CLX%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/HSW%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/ICL%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/IVB%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/KBL%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/RKL%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/SKL%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/SKX%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/SNB%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/TGL%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/__init__%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/__pycache__/uArchInfo%%PYTHON_EXT_SUFFIX%%.pyc
%%PYTHON_LIBDIR%%/instrData/uArchInfo.py
%%PYTHON_LIBDIR%%/lib-dynload/xed%%PYTHON_EXT_SUFFIX%%.so
%%PYTHON_LIBDIR%%/microArchConfigs.py
%%PYTHON_LIBDIR%%/x64_lib.py
%%DATADIR%%/traceTemplate.html

Return to bug 265368

Added Link Here

(-)b/benchmarks/uica/Makefile (+61 lines)
1	PORTNAME= uiCA
2	PORTVERSION= g20220630+${INSTRVERSION}
3	CATEGORIES= benchmarks devel
4	MASTER_SITES= https://uops.info/instructions.xml?dummy=/:instructions \
5	https://uops.info/:instructions
6	PKGNAMEPREFIX= ${PYTHON_PKGNAMEPREFIX}
7	DISTFILES= ${INSTRUCTIONS}:instructions
8	EXTRACT_ONLY= ${DISTFILES:C,:[^:]$,,:N.xml}
9
10	MAINTAINER= fuz@fuz.su
11	COMMENT= uops.info Code Analyzer
12
13	LICENSE= AGPLv3 APACHE20
14	LICENSE_COMB= multi
15
16	BUILD_DEPENDS= ${PYTHON_PKGNAMEPREFIX}setuptools>0:devel/py-setuptools@${PY_FLAVOR}
17	RUN_DEPENDS= ${PYTHON_PKGNAMEPREFIX}plotly>0:graphics/py-plotly@${PY_FLAVOR}
18
19	USES= compiler python shebangfix
20	USE_GITHUB= yes
21	GH_ACCOUNT= andreas-abel
22	GH_TAGNAME= ba6ad5557ebd96a10fa0d0e076c9961ec5024574
23	GH_TUPLE= andreas-abel:XED-to-XML:c71679ee893ae91db677056d542f305fcc433cb1:xed/XED-to-XML \
24	intelxed:mbuild:09b6654be0c52bf1df44e88c88b411a67b624cbd:mbuild/mbuild
25	USE_PYTHON= concurrent flavors
26
27	# manually build a file name like instructions_Apr2022.xml from
28	# the machine-sortable INSTRVERSION. Use := to have date run only once
29	INSTRVERSION= 2022.04
30	INSTRUCTIONS:= instructions_${LC_ALL=C date -j -f %Y.%m ${INSTRVERSION} +%b%Y:L:sh}.xml
31
32	MFLAGS= --compiler=${COMPILER_TYPE:S/gcc/gnu/} \
33	--cc=${CC} \
34	--cxx=${CXX} \
35	--strip=${STRIP_CMD} \
36	--extra-ccflags='${CFLAGS}' \
37	--extra-cxxflags='${CXXFLAGS}' \
38	--extra-linkflags='${LDFLAGS}'
39
40	SHEBANG_FILES= uiCA.py
41
42	do-configure:
43	${REINPLACE_CMD} -e 's,%%DATADIR%%,${DATADIR},' ${WRKSRC}/uiCA.py
44
45	do-build:
46	(cd ${WRKSRC}/XED-to-XML && ${PYTHON_CMD} mfile.py ${MFLAGS} --no-encoder pymodule)
47	${LN} -f ${WRKSRC}/XED-to-XML/xed.* ${WRKSRC}/
48	(cd ${WRKSRC} && ${PYTHON_CMD} convertXML.py ${DISTDIR}/${INSTRUCTIONS})
49	${RM} -r ${WRKSRC}/__pycache__
50	.for f in microArchConfigs.py uiCA.py x64_lib.py instrData
51	${PYTHON_CMD} -m compileall ${WRKSRC}/$f
52	.endfor
53
54	do-install:
55	${MKDIR} ${STAGEDIR}${DATADIR} ${STAGEDIR}${PYTHON_LIBDIR}/lib-dynload/
56	${INSTALL_DATA} ${WRKSRC}/traceTemplate.html ${STAGEDIR}${DATADIR}/
57	${INSTALL_LIB} ${WRKSRC}/xed${PYTHON_EXT_SUFFIX}.so ${STAGEDIR}${PYTHON_LIBDIR}/lib-dynload/
58	(cd ${WRKSRC} && ${COPYTREE_SHARE} '__pycache__ instrData microArchConfigs.py x64_lib.py' ${STAGEDIR}${PYTHON_LIBDIR})
59	${INSTALL_SCRIPT} ${WRKSRC}/uiCA.py ${STAGEDIR}${PREFIX}/bin/uiCA
60
61	.include <bsd.port.mk>

Added Link Here

(-)b/benchmarks/uica/pkg-plist (-1 / +36 lines)
0	-	1	bin/uiCA
		2	%%PYTHON_LIBDIR%%/__pycache__/microArchConfigs%%PYTHON_EXT_SUFFIX%%.pyc
		3	%%PYTHON_LIBDIR%%/__pycache__/uiCA%%PYTHON_EXT_SUFFIX%%.pyc
		4	%%PYTHON_LIBDIR%%/__pycache__/x64_lib%%PYTHON_EXT_SUFFIX%%.pyc
		5	%%PYTHON_LIBDIR%%/instrData/BDW.py
		6	%%PYTHON_LIBDIR%%/instrData/CFL.py
		7	%%PYTHON_LIBDIR%%/instrData/CLX.py
		8	%%PYTHON_LIBDIR%%/instrData/HSW.py
		9	%%PYTHON_LIBDIR%%/instrData/ICL.py
		10	%%PYTHON_LIBDIR%%/instrData/IVB.py
		11	%%PYTHON_LIBDIR%%/instrData/KBL.py
		12	%%PYTHON_LIBDIR%%/instrData/RKL.py
		13	%%PYTHON_LIBDIR%%/instrData/SKL.py
		14	%%PYTHON_LIBDIR%%/instrData/SKX.py
		15	%%PYTHON_LIBDIR%%/instrData/SNB.py
		16	%%PYTHON_LIBDIR%%/instrData/TGL.py
		17	%%PYTHON_LIBDIR%%/instrData/__init__.py
		18	%%PYTHON_LIBDIR%%/instrData/__pycache__/BDW%%PYTHON_EXT_SUFFIX%%.pyc
		19	%%PYTHON_LIBDIR%%/instrData/__pycache__/CFL%%PYTHON_EXT_SUFFIX%%.pyc
		20	%%PYTHON_LIBDIR%%/instrData/__pycache__/CLX%%PYTHON_EXT_SUFFIX%%.pyc
		21	%%PYTHON_LIBDIR%%/instrData/__pycache__/HSW%%PYTHON_EXT_SUFFIX%%.pyc
		22	%%PYTHON_LIBDIR%%/instrData/__pycache__/ICL%%PYTHON_EXT_SUFFIX%%.pyc
		23	%%PYTHON_LIBDIR%%/instrData/__pycache__/IVB%%PYTHON_EXT_SUFFIX%%.pyc
		24	%%PYTHON_LIBDIR%%/instrData/__pycache__/KBL%%PYTHON_EXT_SUFFIX%%.pyc
		25	%%PYTHON_LIBDIR%%/instrData/__pycache__/RKL%%PYTHON_EXT_SUFFIX%%.pyc
		26	%%PYTHON_LIBDIR%%/instrData/__pycache__/SKL%%PYTHON_EXT_SUFFIX%%.pyc
		27	%%PYTHON_LIBDIR%%/instrData/__pycache__/SKX%%PYTHON_EXT_SUFFIX%%.pyc
		28	%%PYTHON_LIBDIR%%/instrData/__pycache__/SNB%%PYTHON_EXT_SUFFIX%%.pyc
		29	%%PYTHON_LIBDIR%%/instrData/__pycache__/TGL%%PYTHON_EXT_SUFFIX%%.pyc
		30	%%PYTHON_LIBDIR%%/instrData/__pycache__/__init__%%PYTHON_EXT_SUFFIX%%.pyc
		31	%%PYTHON_LIBDIR%%/instrData/__pycache__/uArchInfo%%PYTHON_EXT_SUFFIX%%.pyc
		32	%%PYTHON_LIBDIR%%/instrData/uArchInfo.py
		33	%%PYTHON_LIBDIR%%/lib-dynload/xed%%PYTHON_EXT_SUFFIX%%.so
		34	%%PYTHON_LIBDIR%%/microArchConfigs.py
		35	%%PYTHON_LIBDIR%%/x64_lib.py
		36	%%DATADIR%%/traceTemplate.html