Attachment #244752 for bug #273703




		-Dgallium-drivers="swrast" \
		-Dvulkan-drivers="" \
		-Dplatforms="" \
		-Dandroid-libbacktrace=disabled \
		-Dgallium-vdpau=disabled \
		-Dgallium-omx=disabled \
		-Dgallium-va=disabled \

		-Dgallium-nine=false \
		-Dgles1=disabled \
		-Dgles2=disabled \
		-Dlmsensors=disabled \
		-Dmicrosoft-clc=disabled \
		-Dopengl=true \
		-Dglx=disabled \
		-Degl=disabled \
		-Dgbm=disabled \
		-Dtools="" \
		-Dvalgrind=disabled \
		-Dzstd=disabled
LDFLAGS_i386=		-Wl,-znotext





PORTNAME=	mesa-dri
PORTVERSION=	${MESAVERSION}
PORTREVISION=	3
CATEGORIES=	graphics

COMMENT=	OpenGL hardware acceleration drivers for DRI2+

		-Dplatforms="${MESA_PLATFORMS:ts,:tl}"

# Disable some options
MESON_ARGS+=	-Dandroid-libbacktrace=disabled \
		-Dgallium-xa=disabled \
		-Dgallium-vdpau=disabled \
		-Dgallium-va=disabled \
		-Dgles1=disabled \
		-Dgles2=disabled \
		-Dglx=disabled \
		-Dlmsensors=disabled \
		-Dmicrosoft-clc=disabled \
		-Dosmesa=false \
		-Dvalgrind=disabled

.for _gd in ${ALL_GALLIUM_DRIVERS}
. if defined(GALLIUM_DRIVERS) && ${GALLIUM_DRIVERS:M${_gd}}

Lines 12-18 Link Here

(-)mesa-23/graphics/mesa-dri/Makefile.common (-1 / +1 lines)
12	MESAVERSION= ${MESABASEVERSION}${MESASUBVERSION:C/^(.)/.\1/}	12	MESAVERSION= ${MESABASEVERSION}${MESASUBVERSION:C/^(.)/.\1/}
13	MESADISTVERSION=${MESABASEVERSION}${MESASUBVERSION:C/^(.)/-\1/}	13	MESADISTVERSION=${MESABASEVERSION}${MESASUBVERSION:C/^(.)/-\1/}
14		14
15	MESABASEVERSION= 22.3.7	15	MESABASEVERSION= 23.1.7
16	# if there is a subversion, don't include the '-' between 7.11-rc2.	16	# if there is a subversion, don't include the '-' between 7.11-rc2.
17	MESASUBVERSION=	17	MESASUBVERSION=
18		18

Lines 1-3 Link Here

(-)mesa-23/graphics/mesa-dri/distinfo (-3 / +3 lines)
1	TIMESTAMP = 1678348804	1	TIMESTAMP = 1694273655
2	SHA256 (mesa-22.3.7.tar.xz) = 894ce2f4a1c2e76177cdd2284620192d0da3066b243eec2fbb1d7cf37f13042c	2	SHA256 (mesa-23.1.7.tar.xz) = 409641eadf0ed1c7794797a6f5a0b0195b5580b282166e5ec5629c6bcda6acd3
3	SIZE (mesa-22.3.7.tar.xz) = 17136476	3	SIZE (mesa-23.1.7.tar.xz) = 18544916




--- include/drm-uapi/dma-buf.h.orig	2022-10-14 14:21:26 UTC
+++ include/drm-uapi/dma-buf.h
@@ -0,0 +1,195 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ * Framework for buffer objects that can be shared across devices/subsystems.
+ *
+ * Copyright(C) 2015 Intel Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _DMA_BUF_UAPI_H_
+#define _DMA_BUF_UAPI_H_
+
+#ifdef __linux__
+#include <linux/types.h>
+#else
+#include <sys/types.h>
+
+typedef int8_t   __s8;
+typedef uint8_t  __u8;
+typedef int16_t  __s16;
+typedef uint16_t __u16;
+typedef int32_t  __s32;
+typedef uint32_t __u32;
+typedef int64_t  __s64;
+typedef uint64_t __u64;
+#endif
+
+/**
+ * struct dma_buf_sync - Synchronize with CPU access.
+ *
+ * When a DMA buffer is accessed from the CPU via mmap, it is not always
+ * possible to guarantee coherency between the CPU-visible map and underlying
+ * memory.  To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
+ * any CPU access to give the kernel the chance to shuffle memory around if
+ * needed.
+ *
+ * Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
+ * with DMA_BUF_SYNC_START and the appropriate read/write flags.  Once the
+ * access is complete, the client should call DMA_BUF_IOCTL_SYNC with
+ * DMA_BUF_SYNC_END and the same read/write flags.
+ *
+ * The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
+ * coherency.  It does not prevent other processes or devices from
+ * accessing the memory at the same time.  If synchronization with a GPU or
+ * other device driver is required, it is the client's responsibility to
+ * wait for buffer to be ready for reading or writing before calling this
+ * ioctl with DMA_BUF_SYNC_START.  Likewise, the client must ensure that
+ * follow-up work is not submitted to GPU or other device driver until
+ * after this ioctl has been called with DMA_BUF_SYNC_END?
+ *
+ * If the driver or API with which the client is interacting uses implicit
+ * synchronization, waiting for prior work to complete can be done via
+ * poll() on the DMA buffer file descriptor.  If the driver or API requires
+ * explicit synchronization, the client may have to wait on a sync_file or
+ * other synchronization primitive outside the scope of the DMA buffer API.
+ */
+struct dma_buf_sync {
+	/**
+	 * @flags: Set of access flags
+	 *
+	 * DMA_BUF_SYNC_START:
+	 *     Indicates the start of a map access session.
+	 *
+	 * DMA_BUF_SYNC_END:
+	 *     Indicates the end of a map access session.
+	 *
+	 * DMA_BUF_SYNC_READ:
+	 *     Indicates that the mapped DMA buffer will be read by the
+	 *     client via the CPU map.
+	 *
+	 * DMA_BUF_SYNC_WRITE:
+	 *     Indicates that the mapped DMA buffer will be written by the
+	 *     client via the CPU map.
+	 *
+	 * DMA_BUF_SYNC_RW:
+	 *     An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
+	 */
+	__u64 flags;
+};
+
+#define DMA_BUF_SYNC_READ      (1 << 0)
+#define DMA_BUF_SYNC_WRITE     (2 << 0)
+#define DMA_BUF_SYNC_RW        (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
+#define DMA_BUF_SYNC_START     (0 << 2)
+#define DMA_BUF_SYNC_END       (1 << 2)
+#define DMA_BUF_SYNC_VALID_FLAGS_MASK \
+	(DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
+
+#define DMA_BUF_NAME_LEN	32
+
+/**
+ * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
+ *
+ * Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
+ * current set of fences on a dma-buf file descriptor as a sync_file.  CPU
+ * waits via poll() or other driver-specific mechanisms typically wait on
+ * whatever fences are on the dma-buf at the time the wait begins.  This
+ * is similar except that it takes a snapshot of the current fences on the
+ * dma-buf for waiting later instead of waiting immediately.  This is
+ * useful for modern graphics APIs such as Vulkan which assume an explicit
+ * synchronization model but still need to inter-operate with dma-buf.
+ *
+ * The intended usage pattern is the following:
+ *
+ *  1. Export a sync_file with flags corresponding to the expected GPU usage
+ *     via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
+ *
+ *  2. Submit rendering work which uses the dma-buf.  The work should wait on
+ *     the exported sync file before rendering and produce another sync_file
+ *     when complete.
+ *
+ *  3. Import the rendering-complete sync_file into the dma-buf with flags
+ *     corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
+ *
+ * Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
+ * the above is not a single atomic operation.  If userspace wants to ensure
+ * ordering via these fences, it is the respnosibility of userspace to use
+ * locks or other mechanisms to ensure that no other context adds fences or
+ * submits work between steps 1 and 3 above.
+ */
+struct dma_buf_export_sync_file {
+	/**
+	 * @flags: Read/write flags
+	 *
+	 * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
+	 *
+	 * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
+	 * the returned sync file waits on any writers of the dma-buf to
+	 * complete.  Waiting on the returned sync file is equivalent to
+	 * poll() with POLLIN.
+	 *
+	 * If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
+	 * any users of the dma-buf (read or write) to complete.  Waiting
+	 * on the returned sync file is equivalent to poll() with POLLOUT.
+	 * If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
+	 * is equivalent to just DMA_BUF_SYNC_WRITE.
+	 */
+	__u32 flags;
+	/** @fd: Returned sync file descriptor */
+	__s32 fd;
+};
+
+/**
+ * struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
+ *
+ * Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
+ * sync_file into a dma-buf for the purposes of implicit synchronization
+ * with other dma-buf consumers.  This allows clients using explicitly
+ * synchronized APIs such as Vulkan to inter-op with dma-buf consumers
+ * which expect implicit synchronization such as OpenGL or most media
+ * drivers/video.
+ */
+struct dma_buf_import_sync_file {
+	/**
+	 * @flags: Read/write flags
+	 *
+	 * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
+	 *
+	 * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
+	 * this inserts the sync_file as a read-only fence.  Any subsequent
+	 * implicitly synchronized writes to this dma-buf will wait on this
+	 * fence but reads will not.
+	 *
+	 * If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
+	 * write fence.  All subsequent implicitly synchronized access to
+	 * this dma-buf will wait on this fence.
+	 */
+	__u32 flags;
+	/** @fd: Sync file descriptor */
+	__s32 fd;
+};
+
+#define DMA_BUF_BASE		'b'
+#define DMA_BUF_IOCTL_SYNC	_IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
+
+/* 32/64bitness of this uapi was botched in android, there's no difference
+ * between them in actual uapi, they're just different numbers.
+ */
+#define DMA_BUF_SET_NAME	_IOW(DMA_BUF_BASE, 1, const char *)
+#define DMA_BUF_SET_NAME_A	_IOW(DMA_BUF_BASE, 1, u32)
+#define DMA_BUF_SET_NAME_B	_IOW(DMA_BUF_BASE, 1, u64)
+#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE	_IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
+#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE	_IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
+
+#endif

Lines 1-11 Link Here

(-)mesa-23/graphics/mesa-dri/files/patch-src_gallium_include_pipe_p__compiler.h (-11 lines)
1	--- src/gallium/include/pipe/p_compiler.h.orig 2022-10-11 18:53:31 UTC
2	+++ src/gallium/include/pipe/p_compiler.h
3	@@ -125,7 +125,7 @@ typedef unsigned char boolean;
4	* aligned, but we only want to align the field.
5	*/
6	#define EXCLUSIVE_CACHELINE(decl) \
7	- union { char __cl_space[CACHE_LINE_SIZE]; \
8	+ union { char __cl_space[MESA_CACHE_LINE_SIZE]; \
9	decl; }
10
11	#if defined(__cplusplus)

Lines 1-11 Link Here

(-)mesa-23/graphics/mesa-dri/files/patch-src_util_macros.h (-11 lines)
1	--- src/util/macros.h.orig 2022-10-11 18:53:31 UTC
2	+++ src/util/macros.h
3	@@ -448,7 +448,7 @@ typedef int lock_cap_t;
4	#endif
5
6	/* TODO: this could be different on non-x86 architectures. */
7	-#define CACHE_LINE_SIZE 64
8	+#define MESA_CACHE_LINE_SIZE 64
9
10	#define DO_PRAGMA(X) _Pragma (#X)
11




--- src/util/u_memory.h.orig	2023-09-06 23:29:52 UTC
+++ src/util/u_memory.h
@@ -90,7 +90,7 @@ mem_dup(const void *src, size_t size)
 #define Offset(TYPE, MEMBER) ((uintptr_t)&(((TYPE *)NULL)->MEMBER))
 
 /* TODO: this could be different on non-x86 architectures. */
-#define CACHE_LINE_SIZE 64
+#define MESA_CACHE_LINE_SIZE 64
 
 /**
  * Declare a variable on its own cache line.
@@ -107,12 +107,12 @@ mem_dup(const void *src, size_t size)
  *       aligned, but we only want to align the field.
  */
 #define EXCLUSIVE_CACHELINE(decl) \
-   union { char __cl_space[CACHE_LINE_SIZE]; \
+   union { char __cl_space[MESA_CACHE_LINE_SIZE]; \
            decl; }
 
 /* Allocate a structure aligned to a cache line. (used to make atomic ops faster) */
-#define MALLOC_STRUCT_CL(T) (struct T *)align_malloc(sizeof(struct T), CACHE_LINE_SIZE)




--- src/vulkan/wsi/wsi_common_drm.c.orig	2022-10-11 18:53:31 UTC
+++ src/vulkan/wsi/wsi_common_drm.c
@@ -30,29 +30,15 @@
 #include "vk_physical_device.h"
 #include "vk_util.h"
 #include "drm-uapi/drm_fourcc.h"
+#include "drm-uapi/dma-buf.h"
 
 #include <errno.h>
-#include <linux/dma-buf.h>
-#include <linux/sync_file.h>
 #include <time.h>
 #include <unistd.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <xf86drm.h>
 
-struct dma_buf_export_sync_file_wsi {
-   __u32 flags;
-   __s32 fd;
-};
-
-struct dma_buf_import_sync_file_wsi {
-   __u32 flags;
-   __s32 fd;
-};
-
-#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE_WSI   _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file_wsi)
-#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE_WSI   _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file_wsi)
-
 static VkResult
 wsi_dma_buf_export_sync_file(int dma_buf_fd, int *sync_file_fd)
 {
@@ -61,11 +47,11 @@ wsi_dma_buf_export_sync_file(int dma_buf_fd, int *sync
    if (no_dma_buf_sync_file)
       return VK_ERROR_FEATURE_NOT_PRESENT;
 
-   struct dma_buf_export_sync_file_wsi export = {
+   struct dma_buf_export_sync_file export = {
       .flags = DMA_BUF_SYNC_RW,
       .fd = -1,
    };
-   int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_EXPORT_SYNC_FILE_WSI, &export);
+   int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_EXPORT_SYNC_FILE, &export);
    if (ret) {
       if (errno == ENOTTY || errno == EBADF || errno == ENOSYS) {
          no_dma_buf_sync_file = true;
@@ -88,11 +74,11 @@ wsi_dma_buf_import_sync_file(int dma_buf_fd, int sync_
    if (no_dma_buf_sync_file)
       return VK_ERROR_FEATURE_NOT_PRESENT;
 
-   struct dma_buf_import_sync_file_wsi import = {
+   struct dma_buf_import_sync_file import = {
       .flags = DMA_BUF_SYNC_RW,
       .fd = sync_file_fd,
    };
-   int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_IMPORT_SYNC_FILE_WSI, &import);
+   int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_IMPORT_SYNC_FILE, &import);
    if (ret) {
       if (errno == ENOTTY || errno == EBADF || errno == ENOSYS) {
          no_dma_buf_sync_file = true;




https://gitlab.freedesktop.org/mesa/mesa/-/commit/ee5d2250fd15
https://gitlab.freedesktop.org/mesa/mesa/-/commit/689ce66a4332

--- src/egl/drivers/dri2/platform_wayland.c.orig	2023-03-08 18:37:09 UTC
+++ src/egl/drivers/dri2/platform_wayland.c
@@ -2789,10 +2789,10 @@ dri2_teardown_wayland(struct dri2_egl_display *dri2_dp
       wl_shm_destroy(dri2_dpy->wl_shm);
    if (dri2_dpy->wl_registry)
       wl_registry_destroy(dri2_dpy->wl_registry);
-   if (dri2_dpy->wl_queue)
-      wl_event_queue_destroy(dri2_dpy->wl_queue);
    if (dri2_dpy->wl_dpy_wrapper)
       wl_proxy_wrapper_destroy(dri2_dpy->wl_dpy_wrapper);
+   if (dri2_dpy->wl_queue)
+      wl_event_queue_destroy(dri2_dpy->wl_queue);
 
    if (dri2_dpy->own_device)
       wl_display_disconnect(dri2_dpy->wl_dpy);
--- src/vulkan/wsi/wsi_common_wayland.c.orig	2023-03-08 18:37:09 UTC
+++ src/vulkan/wsi/wsi_common_wayland.c
@@ -1156,17 +1156,17 @@ wsi_wl_surface_destroy(VkIcdSurfaceBase *icd_surface, 
    struct wsi_wl_surface *wsi_wl_surface =
       wl_container_of((VkIcdSurfaceWayland *)icd_surface, wsi_wl_surface, base);
 
-   if (wsi_wl_surface->surface)
-      wl_proxy_wrapper_destroy(wsi_wl_surface->surface);
-
-   if (wsi_wl_surface->display)
-      wsi_wl_display_destroy(wsi_wl_surface->display);
-
    if (wsi_wl_surface->wl_dmabuf_feedback) {
       zwp_linux_dmabuf_feedback_v1_destroy(wsi_wl_surface->wl_dmabuf_feedback);
       dmabuf_feedback_fini(&wsi_wl_surface->dmabuf_feedback);
       dmabuf_feedback_fini(&wsi_wl_surface->pending_dmabuf_feedback);
    }
+
+   if (wsi_wl_surface->surface)
+      wl_proxy_wrapper_destroy(wsi_wl_surface->surface);
+
+   if (wsi_wl_surface->display)
+      wsi_wl_display_destroy(wsi_wl_surface->display);
 
    vk_free2(&instance->alloc, pAllocator, wsi_wl_surface);
 }




		-Dvideo-codecs="vc1dec,h264dec,h264enc,h265dec,h265enc" \
		-Dgallium-drivers="radeonsi,r600" \
		-Dvulkan-drivers="" \
		-Dandroid-libbacktrace=disabled \
		-Dgallium-vdpau=disabled \
		-Dgallium-omx=disabled \
		-Dgallium-xa=disabled \

		-Dgbm=disabled \
		-Dgles1=disabled \
		-Dgles2=disabled \
		-Dlmsensors=disabled \
		-Dmicrosoft-clc=disabled \
		-Dosmesa=false \
		-Dvalgrind=disabled \
		-Dglx=disabled \
		-Ddri3=enabled





MESON_ARGS+=	-Ddri-drivers="" \
		-Dgallium-drivers="r300,r600,radeonsi" \
		-Dvulkan-drivers="" \
		-Dandroid-libbacktrace=disabled \
		-Dgallium-va=disabled \
		-Dgallium-omx=disabled \
		-Dgallium-xa=disabled \

		-Dgbm=disabled \
		-Dgles1=disabled \
		-Dgles2=disabled \
		-Dlmsensors=disabled \
		-Dmicrosoft-clc=disabled \
		-Dosmesa=false \
		-Dvalgrind=disabled \
		-Dglx=disabled \
		-Ddri3=enabled





		-Dgallium-drivers="svga" \
		-Dvulkan-drivers="" \
		-Dplatforms="" \
		-Dandroid-libbacktrace=disabled \
		-Dgallium-vdpau=disabled \
		-Dgallium-omx=disabled \
		-Dgallium-va=disabled \

		-Dgles1=disabled \
		-Dgles2=disabled \
		-Dglx=disabled \
		-Dlmsensors=disabled \
		-Dmicrosoft-clc=disabled \
		-Dopengl=false \
		-Dshared-glapi=disabled \
		-Dosmesa=false \
		-Dvalgrind=disabled

LDFLAGS_i386=		-Wl,-znotext





PORTNAME=	mesa-libs
PORTVERSION=	${MESAVERSION}
PORTREVISION=	2
CATEGORIES=	graphics

COMMENT=	OpenGL libraries that support GLX and EGL clients

.include <bsd.port.options.mk>
.include "${.CURDIR:H:H}/graphics/mesa-dri/Makefile.common"

MESON_ARGS+=	-Dandroid-libbacktrace=disabled \
		-Dgallium-vdpau=disabled \
		-Dgallium-omx=disabled \
		-Dgallium-va=disabled \
		-Dgallium-xa=disabled \
		-Dgallium-nine=false \
		-Dlmsensors=disabled \
		-Dmicrosoft-clc=disabled \
		-Dosmesa=false \
		-Dtools="" \
		-Dvalgrind=disabled \
		-Degl=enabled \
		-Dgbm=enabled \
		-Dvulkan-drivers="" \




MESON_ARGS+=	-Ddri-drivers="" \
		-Dplatforms="" \
		-Dvulkan-drivers="" \
		-Dandroid-libbacktrace=disabled \
		-Dgallium-nine=false \
		-Dgallium-omx=disabled \
		-Dgallium-opencl=disabled \

		-Dgallium-xa=disabled \
		-Dgles1=disabled \
		-Dgles2=disabled \
		-Dlmsensors=disabled \
		-Dmicrosoft-clc=disabled \
		-Dopengl=false \
		-Dglx=disabled \
		-Degl=disabled \
		-Dgbm=disabled \
		-Dtools="" \
		-Dvalgrind=disabled \
		-Dgallium-opencl=icd \
		-Dgallium-drivers=r600,radeonsi


Return to bug 273703

Lines 23-28 MESON_ARGS+= -Ddri-drivers="" \ Link Here

(-)mesa-23/graphics/libosmesa/Makefile (+3 lines)
23	-Dgallium-drivers="swrast" \	23	-Dgallium-drivers="swrast" \
24	-Dvulkan-drivers="" \	24	-Dvulkan-drivers="" \
25	-Dplatforms="" \	25	-Dplatforms="" \
		26	-Dandroid-libbacktrace=disabled \
26	-Dgallium-vdpau=disabled \	27	-Dgallium-vdpau=disabled \
27	-Dgallium-omx=disabled \	28	-Dgallium-omx=disabled \
28	-Dgallium-va=disabled \	29	-Dgallium-va=disabled \
Lines 31-42 MESON_ARGS+= -Ddri-drivers="" \ Link Here
31	-Dgallium-nine=false \	32	-Dgallium-nine=false \
32	-Dgles1=disabled \	33	-Dgles1=disabled \
33	-Dgles2=disabled \	34	-Dgles2=disabled \
		35	-Dlmsensors=disabled \
34	-Dmicrosoft-clc=disabled \	36	-Dmicrosoft-clc=disabled \
35	-Dopengl=true \	37	-Dopengl=true \
36	-Dglx=disabled \	38	-Dglx=disabled \
37	-Degl=disabled \	39	-Degl=disabled \
38	-Dgbm=disabled \	40	-Dgbm=disabled \
39	-Dtools="" \	41	-Dtools="" \
		42	-Dvalgrind=disabled \
40	-Dzstd=disabled	43	-Dzstd=disabled
41	LDFLAGS_i386= -Wl,-znotext	44	LDFLAGS_i386= -Wl,-znotext
42		45

Lines 1-6 Link Here

(-)mesa-23/graphics/mesa-dri/Makefile (-3 / +5 lines)
1	PORTNAME= mesa-dri	1	PORTNAME= mesa-dri
2	PORTVERSION= ${MESAVERSION}	2	PORTVERSION= ${MESAVERSION}
3	PORTREVISION= 3
4	CATEGORIES= graphics	3	CATEGORIES= graphics
5		4
6	COMMENT= OpenGL hardware acceleration drivers for DRI2+	5	COMMENT= OpenGL hardware acceleration drivers for DRI2+
Lines 73-86 MESON_ARGS+= -Dgallium-drivers="${GALLIU Link Here
73	-Dplatforms="${MESA_PLATFORMS:ts,:tl}"	72	-Dplatforms="${MESA_PLATFORMS:ts,:tl}"
74		73
75	# Disable some options	74	# Disable some options
76	MESON_ARGS+= -Dgallium-xa=disabled \	75	MESON_ARGS+= -Dandroid-libbacktrace=disabled \
		76	-Dgallium-xa=disabled \
77	-Dgallium-vdpau=disabled \	77	-Dgallium-vdpau=disabled \
78	-Dgallium-va=disabled \	78	-Dgallium-va=disabled \
79	-Dgles1=disabled \	79	-Dgles1=disabled \
80	-Dgles2=disabled \	80	-Dgles2=disabled \
81	-Dglx=disabled \	81	-Dglx=disabled \
		82	-Dlmsensors=disabled \
82	-Dmicrosoft-clc=disabled \	83	-Dmicrosoft-clc=disabled \
83	-Dosmesa=false	84	-Dosmesa=false \
		85	-Dvalgrind=disabled
84		86
85	.for _gd in ${ALL_GALLIUM_DRIVERS}	87	.for _gd in ${ALL_GALLIUM_DRIVERS}
86	. if defined(GALLIUM_DRIVERS) && ${GALLIUM_DRIVERS:M${_gd}}	88	. if defined(GALLIUM_DRIVERS) && ${GALLIUM_DRIVERS:M${_gd}}

Lines 1-198 Link Here

(-)mesa-23/graphics/mesa-dri/files/patch-include_drm-uapi_dma-buf.h (-198 lines)
1	--- include/drm-uapi/dma-buf.h.orig 2022-10-14 14:21:26 UTC
2	+++ include/drm-uapi/dma-buf.h
3	@@ -0,0 +1,195 @@
4	+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5	+/*
6	+ * Framework for buffer objects that can be shared across devices/subsystems.
7	+ *
8	+ * Copyright(C) 2015 Intel Ltd
9	+ *
10	+ * This program is free software; you can redistribute it and/or modify it
11	+ * under the terms of the GNU General Public License version 2 as published by
12	+ * the Free Software Foundation.
13	+ *
14	+ * This program is distributed in the hope that it will be useful, but WITHOUT
15	+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16	+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17	+ * more details.
18	+ *
19	+ * You should have received a copy of the GNU General Public License along with
20	+ * this program. If not, see <http://www.gnu.org/licenses/>.
21	+ */
22	+
23	+#ifndef _DMA_BUF_UAPI_H_
24	+#define _DMA_BUF_UAPI_H_
25	+
26	+#ifdef __linux__
27	+#include <linux/types.h>
28	+#else
29	+#include <sys/types.h>
30	+
31	+typedef int8_t __s8;
32	+typedef uint8_t __u8;
33	+typedef int16_t __s16;
34	+typedef uint16_t __u16;
35	+typedef int32_t __s32;
36	+typedef uint32_t __u32;
37	+typedef int64_t __s64;
38	+typedef uint64_t __u64;
39	+#endif
40	+
41	+/**
42	+ * struct dma_buf_sync - Synchronize with CPU access.
43	+ *
44	+ * When a DMA buffer is accessed from the CPU via mmap, it is not always
45	+ * possible to guarantee coherency between the CPU-visible map and underlying
46	+ * memory. To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
47	+ * any CPU access to give the kernel the chance to shuffle memory around if
48	+ * needed.
49	+ *
50	+ * Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
51	+ * with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
52	+ * access is complete, the client should call DMA_BUF_IOCTL_SYNC with
53	+ * DMA_BUF_SYNC_END and the same read/write flags.
54	+ *
55	+ * The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
56	+ * coherency. It does not prevent other processes or devices from
57	+ * accessing the memory at the same time. If synchronization with a GPU or
58	+ * other device driver is required, it is the client's responsibility to
59	+ * wait for buffer to be ready for reading or writing before calling this
60	+ * ioctl with DMA_BUF_SYNC_START. Likewise, the client must ensure that
61	+ * follow-up work is not submitted to GPU or other device driver until
62	+ * after this ioctl has been called with DMA_BUF_SYNC_END?
63	+ *
64	+ * If the driver or API with which the client is interacting uses implicit
65	+ * synchronization, waiting for prior work to complete can be done via
66	+ * poll() on the DMA buffer file descriptor. If the driver or API requires
67	+ * explicit synchronization, the client may have to wait on a sync_file or
68	+ * other synchronization primitive outside the scope of the DMA buffer API.
69	+ */
70	+struct dma_buf_sync {
71	+ /**
72	+ * @flags: Set of access flags
73	+ *
74	+ * DMA_BUF_SYNC_START:
75	+ * Indicates the start of a map access session.
76	+ *
77	+ * DMA_BUF_SYNC_END:
78	+ * Indicates the end of a map access session.
79	+ *
80	+ * DMA_BUF_SYNC_READ:
81	+ * Indicates that the mapped DMA buffer will be read by the
82	+ * client via the CPU map.
83	+ *
84	+ * DMA_BUF_SYNC_WRITE:
85	+ * Indicates that the mapped DMA buffer will be written by the
86	+ * client via the CPU map.
87	+ *
88	+ * DMA_BUF_SYNC_RW:
89	+ * An alias for DMA_BUF_SYNC_READ \| DMA_BUF_SYNC_WRITE.
90	+ */
91	+ __u64 flags;
92	+};
93	+
94	+#define DMA_BUF_SYNC_READ (1 << 0)
95	+#define DMA_BUF_SYNC_WRITE (2 << 0)
96	+#define DMA_BUF_SYNC_RW (DMA_BUF_SYNC_READ \| DMA_BUF_SYNC_WRITE)
97	+#define DMA_BUF_SYNC_START (0 << 2)
98	+#define DMA_BUF_SYNC_END (1 << 2)
99	+#define DMA_BUF_SYNC_VALID_FLAGS_MASK \
100	+ (DMA_BUF_SYNC_RW \| DMA_BUF_SYNC_END)
101	+
102	+#define DMA_BUF_NAME_LEN 32
103	+
104	+/**
105	+ * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
106	+ *
107	+ * Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
108	+ * current set of fences on a dma-buf file descriptor as a sync_file. CPU
109	+ * waits via poll() or other driver-specific mechanisms typically wait on
110	+ * whatever fences are on the dma-buf at the time the wait begins. This
111	+ * is similar except that it takes a snapshot of the current fences on the
112	+ * dma-buf for waiting later instead of waiting immediately. This is
113	+ * useful for modern graphics APIs such as Vulkan which assume an explicit
114	+ * synchronization model but still need to inter-operate with dma-buf.
115	+ *
116	+ * The intended usage pattern is the following:
117	+ *
118	+ * 1. Export a sync_file with flags corresponding to the expected GPU usage
119	+ * via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
120	+ *
121	+ * 2. Submit rendering work which uses the dma-buf. The work should wait on
122	+ * the exported sync file before rendering and produce another sync_file
123	+ * when complete.
124	+ *
125	+ * 3. Import the rendering-complete sync_file into the dma-buf with flags
126	+ * corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
127	+ *
128	+ * Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
129	+ * the above is not a single atomic operation. If userspace wants to ensure
130	+ * ordering via these fences, it is the respnosibility of userspace to use
131	+ * locks or other mechanisms to ensure that no other context adds fences or
132	+ * submits work between steps 1 and 3 above.
133	+ */
134	+struct dma_buf_export_sync_file {
135	+ /**
136	+ * @flags: Read/write flags
137	+ *
138	+ * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
139	+ *
140	+ * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
141	+ * the returned sync file waits on any writers of the dma-buf to
142	+ * complete. Waiting on the returned sync file is equivalent to
143	+ * poll() with POLLIN.
144	+ *
145	+ * If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
146	+ * any users of the dma-buf (read or write) to complete. Waiting
147	+ * on the returned sync file is equivalent to poll() with POLLOUT.
148	+ * If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
149	+ * is equivalent to just DMA_BUF_SYNC_WRITE.
150	+ */
151	+ __u32 flags;
152	+ /** @fd: Returned sync file descriptor */
153	+ __s32 fd;
154	+};
155	+
156	+/**
157	+ * struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
158	+ *
159	+ * Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
160	+ * sync_file into a dma-buf for the purposes of implicit synchronization
161	+ * with other dma-buf consumers. This allows clients using explicitly
162	+ * synchronized APIs such as Vulkan to inter-op with dma-buf consumers
163	+ * which expect implicit synchronization such as OpenGL or most media
164	+ * drivers/video.
165	+ */
166	+struct dma_buf_import_sync_file {
167	+ /**
168	+ * @flags: Read/write flags
169	+ *
170	+ * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
171	+ *
172	+ * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
173	+ * this inserts the sync_file as a read-only fence. Any subsequent
174	+ * implicitly synchronized writes to this dma-buf will wait on this
175	+ * fence but reads will not.
176	+ *
177	+ * If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
178	+ * write fence. All subsequent implicitly synchronized access to
179	+ * this dma-buf will wait on this fence.
180	+ */
181	+ __u32 flags;
182	+ /** @fd: Sync file descriptor */
183	+ __s32 fd;
184	+};
185	+
186	+#define DMA_BUF_BASE 'b'
187	+#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
188	+
189	+/* 32/64bitness of this uapi was botched in android, there's no difference
190	+ * between them in actual uapi, they're just different numbers.
191	+ */
192	+#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
193	+#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
194	+#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
195	+#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
196	+#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
197	+
198	+#endif

Lines 1-7 Link Here

(-)mesa-23/graphics/mesa-dri/files/patch-src_util_u__memory.h (-2 / +16 lines)
1	--- src/util/u_memory.h.orig 2022-12-01 11:58:25 UTC	1	--- src/util/u_memory.h.orig 2023-09-06 23:29:52 UTC
2	+++ src/util/u_memory.h	2	+++ src/util/u_memory.h
3	@@ -91,8 +91,8 @@ mem_dup(const void *src, size_t size)	3	@@ -90,7 +90,7 @@ mem_dup(const void *src, size_t size)
		4	#define Offset(TYPE, MEMBER) ((uintptr_t)&(((TYPE *)NULL)->MEMBER))
4		5
		6	/* TODO: this could be different on non-x86 architectures. */
		7	-#define CACHE_LINE_SIZE 64
		8	+#define MESA_CACHE_LINE_SIZE 64
		9
		10	/**
		11	* Declare a variable on its own cache line.
		12	@@ -107,12 +107,12 @@ mem_dup(const void *src, size_t size)
		13	* aligned, but we only want to align the field.
		14	*/
		15	#define EXCLUSIVE_CACHELINE(decl) \
		16	- union { char __cl_space[CACHE_LINE_SIZE]; \
		17	+ union { char __cl_space[MESA_CACHE_LINE_SIZE]; \
		18	decl; }
5		19
6	/* Allocate a structure aligned to a cache line. (used to make atomic ops faster) */	20	/* Allocate a structure aligned to a cache line. (used to make atomic ops faster) */
7	-#define MALLOC_STRUCT_CL(T) (struct T *)align_malloc(sizeof(struct T), CACHE_LINE_SIZE)	21	-#define MALLOC_STRUCT_CL(T) (struct T *)align_malloc(sizeof(struct T), CACHE_LINE_SIZE)

Lines 1-61 Link Here

(-)mesa-23/graphics/mesa-dri/files/patch-src_vulkan_wsi_wsi__common__drm.c (-61 lines)
1	--- src/vulkan/wsi/wsi_common_drm.c.orig 2022-10-11 18:53:31 UTC
2	+++ src/vulkan/wsi/wsi_common_drm.c
3	@@ -30,29 +30,15 @@
4	#include "vk_physical_device.h"
5	#include "vk_util.h"
6	#include "drm-uapi/drm_fourcc.h"
7	+#include "drm-uapi/dma-buf.h"
8
9	#include <errno.h>
10	-#include <linux/dma-buf.h>
11	-#include <linux/sync_file.h>
12	#include <time.h>
13	#include <unistd.h>
14	#include <stdlib.h>
15	#include <stdio.h>
16	#include <xf86drm.h>
17
18	-struct dma_buf_export_sync_file_wsi {
19	- __u32 flags;
20	- __s32 fd;
21	-};
22	-
23	-struct dma_buf_import_sync_file_wsi {
24	- __u32 flags;
25	- __s32 fd;
26	-};
27	-
28	-#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE_WSI _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file_wsi)
29	-#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE_WSI _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file_wsi)
30	-
31	static VkResult
32	wsi_dma_buf_export_sync_file(int dma_buf_fd, int *sync_file_fd)
33	{
34	@@ -61,11 +47,11 @@ wsi_dma_buf_export_sync_file(int dma_buf_fd, int *sync
35	if (no_dma_buf_sync_file)
36	return VK_ERROR_FEATURE_NOT_PRESENT;
37
38	- struct dma_buf_export_sync_file_wsi export = {
39	+ struct dma_buf_export_sync_file export = {
40	.flags = DMA_BUF_SYNC_RW,
41	.fd = -1,
42	};
43	- int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_EXPORT_SYNC_FILE_WSI, &export);
44	+ int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_EXPORT_SYNC_FILE, &export);
45	if (ret) {
46	if (errno == ENOTTY \|\| errno == EBADF \|\| errno == ENOSYS) {
47	no_dma_buf_sync_file = true;
48	@@ -88,11 +74,11 @@ wsi_dma_buf_import_sync_file(int dma_buf_fd, int sync_
49	if (no_dma_buf_sync_file)
50	return VK_ERROR_FEATURE_NOT_PRESENT;
51
52	- struct dma_buf_import_sync_file_wsi import = {
53	+ struct dma_buf_import_sync_file import = {
54	.flags = DMA_BUF_SYNC_RW,
55	.fd = sync_file_fd,
56	};
57	- int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_IMPORT_SYNC_FILE_WSI, &import);
58	+ int ret = drmIoctl(dma_buf_fd, DMA_BUF_IOCTL_IMPORT_SYNC_FILE, &import);
59	if (ret) {
60	if (errno == ENOTTY \|\| errno == EBADF \|\| errno == ENOSYS) {
61	no_dma_buf_sync_file = true;

Lines 1-44 Link Here

(-)mesa-23/graphics/mesa-dri/files/patch-wayland-1.22 (-44 lines)
1	https://gitlab.freedesktop.org/mesa/mesa/-/commit/ee5d2250fd15
2	https://gitlab.freedesktop.org/mesa/mesa/-/commit/689ce66a4332
3
4	--- src/egl/drivers/dri2/platform_wayland.c.orig 2023-03-08 18:37:09 UTC
5	+++ src/egl/drivers/dri2/platform_wayland.c
6	@@ -2789,10 +2789,10 @@ dri2_teardown_wayland(struct dri2_egl_display *dri2_dp
7	wl_shm_destroy(dri2_dpy->wl_shm);
8	if (dri2_dpy->wl_registry)
9	wl_registry_destroy(dri2_dpy->wl_registry);
10	- if (dri2_dpy->wl_queue)
11	- wl_event_queue_destroy(dri2_dpy->wl_queue);
12	if (dri2_dpy->wl_dpy_wrapper)
13	wl_proxy_wrapper_destroy(dri2_dpy->wl_dpy_wrapper);
14	+ if (dri2_dpy->wl_queue)
15	+ wl_event_queue_destroy(dri2_dpy->wl_queue);
16
17	if (dri2_dpy->own_device)
18	wl_display_disconnect(dri2_dpy->wl_dpy);
19	--- src/vulkan/wsi/wsi_common_wayland.c.orig 2023-03-08 18:37:09 UTC
20	+++ src/vulkan/wsi/wsi_common_wayland.c
21	@@ -1156,17 +1156,17 @@ wsi_wl_surface_destroy(VkIcdSurfaceBase *icd_surface,
22	struct wsi_wl_surface *wsi_wl_surface =
23	wl_container_of((VkIcdSurfaceWayland *)icd_surface, wsi_wl_surface, base);
24
25	- if (wsi_wl_surface->surface)
26	- wl_proxy_wrapper_destroy(wsi_wl_surface->surface);
27	-
28	- if (wsi_wl_surface->display)
29	- wsi_wl_display_destroy(wsi_wl_surface->display);
30	-
31	if (wsi_wl_surface->wl_dmabuf_feedback) {
32	zwp_linux_dmabuf_feedback_v1_destroy(wsi_wl_surface->wl_dmabuf_feedback);
33	dmabuf_feedback_fini(&wsi_wl_surface->dmabuf_feedback);
34	dmabuf_feedback_fini(&wsi_wl_surface->pending_dmabuf_feedback);
35	}
36	+
37	+ if (wsi_wl_surface->surface)
38	+ wl_proxy_wrapper_destroy(wsi_wl_surface->surface);
39	+
40	+ if (wsi_wl_surface->display)
41	+ wsi_wl_display_destroy(wsi_wl_surface->display);
42
43	vk_free2(&instance->alloc, pAllocator, wsi_wl_surface);
44	}

Lines 28-33 MESON_ARGS+= -Ddri-drivers="" \ Link Here

(-)mesa-23/graphics/mesa-gallium-va/Makefile (+3 lines)
28	-Dvideo-codecs="vc1dec,h264dec,h264enc,h265dec,h265enc" \	28	-Dvideo-codecs="vc1dec,h264dec,h264enc,h265dec,h265enc" \
29	-Dgallium-drivers="radeonsi,r600" \	29	-Dgallium-drivers="radeonsi,r600" \
30	-Dvulkan-drivers="" \	30	-Dvulkan-drivers="" \
		31	-Dandroid-libbacktrace=disabled \
31	-Dgallium-vdpau=disabled \	32	-Dgallium-vdpau=disabled \
32	-Dgallium-omx=disabled \	33	-Dgallium-omx=disabled \
33	-Dgallium-xa=disabled \	34	-Dgallium-xa=disabled \
Lines 36-43 MESON_ARGS+= -Ddri-drivers="" \ Link Here
36	-Dgbm=disabled \	37	-Dgbm=disabled \
37	-Dgles1=disabled \	38	-Dgles1=disabled \
38	-Dgles2=disabled \	39	-Dgles2=disabled \
		40	-Dlmsensors=disabled \
39	-Dmicrosoft-clc=disabled \	41	-Dmicrosoft-clc=disabled \
40	-Dosmesa=false \	42	-Dosmesa=false \
		43	-Dvalgrind=disabled \
41	-Dglx=disabled \	44	-Dglx=disabled \
42	-Ddri3=enabled	45	-Ddri3=enabled
43		46

Lines 28-33 X11_USE= xorg=xorgproto,x11,xcb,xdamage Link Here

(-)mesa-23/graphics/mesa-gallium-vdpau/Makefile (+3 lines)
28	MESON_ARGS+= -Ddri-drivers="" \	28	MESON_ARGS+= -Ddri-drivers="" \
29	-Dgallium-drivers="r300,r600,radeonsi" \	29	-Dgallium-drivers="r300,r600,radeonsi" \
30	-Dvulkan-drivers="" \	30	-Dvulkan-drivers="" \
		31	-Dandroid-libbacktrace=disabled \
31	-Dgallium-va=disabled \	32	-Dgallium-va=disabled \
32	-Dgallium-omx=disabled \	33	-Dgallium-omx=disabled \
33	-Dgallium-xa=disabled \	34	-Dgallium-xa=disabled \
Lines 36-43 MESON_ARGS+= -Ddri-drivers="" \ Link Here
36	-Dgbm=disabled \	37	-Dgbm=disabled \
37	-Dgles1=disabled \	38	-Dgles1=disabled \
38	-Dgles2=disabled \	39	-Dgles2=disabled \
		40	-Dlmsensors=disabled \
39	-Dmicrosoft-clc=disabled \	41	-Dmicrosoft-clc=disabled \
40	-Dosmesa=false \	42	-Dosmesa=false \
		43	-Dvalgrind=disabled \
41	-Dglx=disabled \	44	-Dglx=disabled \
42	-Ddri3=enabled	45	-Ddri3=enabled
43		46

Lines 23-28 MESON_ARGS+= -Ddri-drivers="" \ Link Here

(-)mesa-23/graphics/mesa-gallium-xa/Makefile (-1 / +4 lines)
23	-Dgallium-drivers="svga" \	23	-Dgallium-drivers="svga" \
24	-Dvulkan-drivers="" \	24	-Dvulkan-drivers="" \
25	-Dplatforms="" \	25	-Dplatforms="" \
		26	-Dandroid-libbacktrace=disabled \
26	-Dgallium-vdpau=disabled \	27	-Dgallium-vdpau=disabled \
27	-Dgallium-omx=disabled \	28	-Dgallium-omx=disabled \
28	-Dgallium-va=disabled \	29	-Dgallium-va=disabled \
Lines 33-42 MESON_ARGS+= -Ddri-drivers="" \ Link Here
33	-Dgles1=disabled \	34	-Dgles1=disabled \
34	-Dgles2=disabled \	35	-Dgles2=disabled \
35	-Dglx=disabled \	36	-Dglx=disabled \
		37	-Dlmsensors=disabled \
36	-Dmicrosoft-clc=disabled \	38	-Dmicrosoft-clc=disabled \
37	-Dopengl=false \	39	-Dopengl=false \
38	-Dshared-glapi=disabled \	40	-Dshared-glapi=disabled \
39	-Dosmesa=false	41	-Dosmesa=false \
		42	-Dvalgrind=disabled
40		43
41	LDFLAGS_i386= -Wl,-znotext	44	LDFLAGS_i386= -Wl,-znotext
42		45

Lines 1-6 Link Here

(-)mesa-23/graphics/mesa-libs/Makefile (-2 / +4 lines)
1	PORTNAME= mesa-libs	1	PORTNAME= mesa-libs
2	PORTVERSION= ${MESAVERSION}	2	PORTVERSION= ${MESAVERSION}
3	PORTREVISION= 2
4	CATEGORIES= graphics	3	CATEGORIES= graphics
5		4
6	COMMENT= OpenGL libraries that support GLX and EGL clients	5	COMMENT= OpenGL libraries that support GLX and EGL clients
Lines 35-48 USE_LDCONFIG= yes Link Here
35	.include <bsd.port.options.mk>	34	.include <bsd.port.options.mk>
36	.include "${.CURDIR:H:H}/graphics/mesa-dri/Makefile.common"	35	.include "${.CURDIR:H:H}/graphics/mesa-dri/Makefile.common"
37		36
38	MESON_ARGS+= -Dgallium-vdpau=disabled \	37	MESON_ARGS+= -Dandroid-libbacktrace=disabled \
		38	-Dgallium-vdpau=disabled \
39	-Dgallium-omx=disabled \	39	-Dgallium-omx=disabled \
40	-Dgallium-va=disabled \	40	-Dgallium-va=disabled \
41	-Dgallium-xa=disabled \	41	-Dgallium-xa=disabled \
42	-Dgallium-nine=false \	42	-Dgallium-nine=false \
		43	-Dlmsensors=disabled \
43	-Dmicrosoft-clc=disabled \	44	-Dmicrosoft-clc=disabled \
44	-Dosmesa=false \	45	-Dosmesa=false \
45	-Dtools="" \	46	-Dtools="" \
		47	-Dvalgrind=disabled \
46	-Degl=enabled \	48	-Degl=enabled \
47	-Dgbm=enabled \	49	-Dgbm=enabled \
48	-Dvulkan-drivers="" \	50	-Dvulkan-drivers="" \

Lines 25-30 RUN_DEPENDS= libclc>=0.3.0:devel/libclc Link Here

(-)mesa-23/lang/clover/Makefile (+3 lines)
25	MESON_ARGS+= -Ddri-drivers="" \	25	MESON_ARGS+= -Ddri-drivers="" \
26	-Dplatforms="" \	26	-Dplatforms="" \
27	-Dvulkan-drivers="" \	27	-Dvulkan-drivers="" \
		28	-Dandroid-libbacktrace=disabled \
28	-Dgallium-nine=false \	29	-Dgallium-nine=false \
29	-Dgallium-omx=disabled \	30	-Dgallium-omx=disabled \
30	-Dgallium-opencl=disabled \	31	-Dgallium-opencl=disabled \
Lines 33-44 MESON_ARGS+= -Ddri-drivers="" \ Link Here
33	-Dgallium-xa=disabled \	34	-Dgallium-xa=disabled \
34	-Dgles1=disabled \	35	-Dgles1=disabled \
35	-Dgles2=disabled \	36	-Dgles2=disabled \
		37	-Dlmsensors=disabled \
36	-Dmicrosoft-clc=disabled \	38	-Dmicrosoft-clc=disabled \
37	-Dopengl=false \	39	-Dopengl=false \
38	-Dglx=disabled \	40	-Dglx=disabled \
39	-Degl=disabled \	41	-Degl=disabled \
40	-Dgbm=disabled \	42	-Dgbm=disabled \
41	-Dtools="" \	43	-Dtools="" \
		44	-Dvalgrind=disabled \
42	-Dgallium-opencl=icd \	45	-Dgallium-opencl=icd \
43	-Dgallium-drivers=r600,radeonsi	46	-Dgallium-drivers=r600,radeonsi
44		47