FreeBSD Bugzilla – Attachment 119663 Details for
Bug 162280
[PATCH] [MAINTAINER] Update to cad/iverilog
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[patch]
cad.iverilog.update.diff
cad.iverilog.update.diff (text/plain), 1.80 KB, created by
Niclas Zeising
on 2011-11-04 07:00:23 UTC
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Description:
cad.iverilog.update.diff
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Creator:
Niclas Zeising
Created:
2011-11-04 07:00:23 UTC
Size:
1.80 KB
patch
obsolete
>Index: cad/iverilog/Makefile >=================================================================== >RCS file: /home/ncvs/ports/cad/iverilog/Makefile,v >retrieving revision 1.36 >diff -u -d -r1.36 Makefile >--- cad/iverilog/Makefile 30 Oct 2011 12:42:28 -0000 1.36 >+++ cad/iverilog/Makefile 4 Nov 2011 06:48:20 -0000 >@@ -7,7 +7,7 @@ > # > > PORTNAME= iverilog >-PORTVERSION= 0.9.4 >+PORTVERSION= 0.9.5 > CATEGORIES= cad > MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION:C,\.[0-9]$,,}/ \ > ftp://ftp.geda.seul.org/pub/geda/dist/ >@@ -16,6 +16,8 @@ > MAINTAINER= niclas.zeising@gmail.com > COMMENT= A Verilog simulation and synthesis tool > >+LICENSE= GPLv2 >+ > GNU_CONFIGURE= yes > USE_BISON= build > USE_GMAKE= yes >Index: cad/iverilog/distinfo >=================================================================== >RCS file: /home/ncvs/ports/cad/iverilog/distinfo,v >retrieving revision 1.20 >diff -u -d -r1.20 distinfo >--- cad/iverilog/distinfo 30 Oct 2011 12:42:28 -0000 1.20 >+++ cad/iverilog/distinfo 4 Nov 2011 06:48:20 -0000 >@@ -1,2 +1,2 @@ >-SHA256 (verilog-0.9.4.tar.gz) = b4eac7276975cf2d7c2c94246f733dc187feb4d5944034d053c5094279511eb1 >-SIZE (verilog-0.9.4.tar.gz) = 1200614 >+SHA256 (verilog-0.9.5.tar.gz) = c522b8b873f0cf77003db15c3df0f4a15b738ce4b060d1ca387c88e1b2be185d >+SIZE (verilog-0.9.5.tar.gz) = 1212112 >Index: cad/iverilog/pkg-descr >=================================================================== >RCS file: /home/ncvs/ports/cad/iverilog/pkg-descr,v >retrieving revision 1.2 >diff -u -d -r1.2 pkg-descr >--- cad/iverilog/pkg-descr 30 Jul 2010 14:51:36 -0000 1.2 >+++ cad/iverilog/pkg-descr 4 Nov 2011 06:48:20 -0000 >@@ -12,4 +12,4 @@ > year 2000. This is a fairly large and complex standard, so it will > take some time for it to get there, but that's the goal. > >-WWW: http://www.icarus.com/eda/verilog/ >+WWW: http://iverilog.icarus.com/
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bug 162280
: 119663