Attachment 148588 Details for Bug 194562 – dmesg.log

dmesg.log

dmesg.log (text/x-log), 4.58 KB, created by Maxim Filimonov on 2014-10-23 19:26:08 UTC

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Creator: Maxim Filimonov

Created: 2014-10-23 19:26:08 UTC

Size: 4.58 KB

patch

obsolete

>KDB: debugger backends: ddb
>KDB: current backend: ddb
>Copyright (c) 1992-2014 The FreeBSD Project.
>Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
>	The Regents of the University of California. All rights reserved.
>FreeBSD is a registered trademark of The FreeBSD Foundation.
>FreeBSD 11.0-CURRENT #3 r273464M: Thu Oct 23 23:02:27 MSK 2014
>    root@quad:/usr/obj/arm.armv6/usr/src/head/sys/CUBIEBOARD2 arm
>FreeBSD clang version 3.4.1 (tags/RELEASE_34/dot1-final 208032) 20140512
>CPU: Cortex A7 rev 4 (Cortex-A core)
> Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext
> WB disabled EABT branch prediction enabled
>LoUU:2 LoC:2 LoUIS:2 
>Cache level 1: 
> 32KB/64B 4-way data cache WB Read-Alloc Write-Alloc
> 32KB/32B 2-way instruction cache Read-Alloc
>Cache level 2: 
> 256KB/64B 8-way unified cache WB Read-Alloc Write-Alloc
>real memory  = 1073741824 (1024 MB)
>avail memory = 1042259968 (993 MB)
>FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
>random: <Software, Yarrow> initialized
>ofwbus0: <Open Firmware Device Tree>
>simplebus0: <Flattened device tree simple bus> on ofwbus0
>gic0: <ARM Generic Interrupt Controller> mem 0x1c81000-0x1c81fff,0x1c82000-0x1c820ff on simplebus0
>gic0: pn 0x10, arch 0x2, rev 0x1, implementer 0x43b sc->nirqs 160
>a10_sramc0: <Allwinner sramc module> mem 0x1c00000-0x1c00fff on simplebus0
>a20_cpu_cfg0: <A20 CPU Configuration Module> mem 0x1c25c00-0x1c25fff on simplebus0
>a10_ccm0: <Allwinner Clock Control Module> mem 0x1c20000-0x1c203ff on simplebus0
>a10_timer0: <Allwinner A10/A20 timer> mem 0x1c20c00-0x1c20c8f irq 54 on simplebus0
>Event timer "a10_timer Eventtimer" frequency 24000000 Hz quality 1000
>Timecounter "a10_timer timer0" frequency 24000000 Hz quality 1000
>a10wd0: <Allwinner A10 Watchdog> mem 0x1c20c90-0x1c20c9f on simplebus0
>gpio0: <Allwinner GPIO controller> mem 0x1c20800-0x1c20bff irq 60 on simplebus0
>gpioc0: <GPIO controller> on gpio0
>gpiobus0: <GPIO bus> on gpio0
>ehci0: <Allwinner Integrated USB 2.0 controller> mem 0x1c14000-0x1c14fff irq 71 on simplebus0
>usbus0: EHCI version 1.0
>usbus0 on ehci0
>ehci1: <Allwinner Integrated USB 2.0 controller> mem 0x1c1c000-0x1c1cfff irq 72 on simplebus0
>usbus1: EHCI version 1.0
>usbus1 on ehci1
>uart0: <16750 or compatible> mem 0x1c28000-0x1c283ff irq 33 on simplebus0
>uart0: console (115200,n,8,1)
>emac0: <A10/A20 EMAC ethernet controller> mem 0x1c0b000-0x1c0bfff irq 87 on simplebus0
>miibus0: <MII bus> on emac0
>rlphy0: <RTL8201L 10/100 media interface> PHY 1 on miibus0
>rlphy0:  10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
>emac0: Ethernet address: 62:73:64:24:d7:98
>Timecounters tick every 10.000 msec
>usbus0: 480Mbps High Speed USB v2.0
>usbus1: 480Mbps High Speed USB v2.0
>ugen1.1: <Allwinner> at usbus1
>uhub0: <Allwinner EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus1
>ugen0.1: <Allwinner> at usbus0
>uhub1: <Allwinner EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus0
>random: unblocking device.
>Release APs
>uhub_attach: Turning port 1 power on
>uhub_attach: Turning port 1 power on
>uhub0: 1 port with 1 removable, self powered
>uhub1: 1 port with 1 removable, self powered
>Root mount waiting for: usbus0
>Root mount waiting for: usbus0
>ugen0.2: <JetFlash> at usbus0
>umass0: <JetFlash Mass Storage Device, class 0/0, rev 2.00/11.00, addr 2> on usbus0
>umass0:  SCSI over Bulk-Only; quirks = 0x0100
>umass0:0:0: Attached to dsac0b uast0 u
>mass-sim0 bus 0 scbus0 target 0 lun 0
>da0: <JetFlash Transcend 16GB 1100> Removable Direct Access SCSI-4 device 
>da0: Serial Number 15WI8JOG87EBCEL1
>da0: 40.000MB/s transfers
>da0: 15480MB (31703040 512 byte sectors: 255H 63S/T 1973C)
>da0: quirks=0x12<NO_6_BYTE,NO_RC16>
>Trying to mount root from ufs:/dev/da0 []...
>warning: no time-of-day clock registered, system time will not be set accurately
>Spurious interrupt detected
>Spurious interrupt detected
>.
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>
>s interrupt detected
>.
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected
>Spurious interrupt detected

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