FreeBSD Bugzilla – Attachment 158414 Details for
Bug 201227
www/node010: add armv6 to supported achitecture
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[patch]
armv6 fix
www_node010.patch (text/plain), 10.38 KB, created by
Mikael Urankar
on 2015-07-06 11:47:13 UTC
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Description:
armv6 fix
Filename:
MIME Type:
Creator:
Mikael Urankar
Created:
2015-07-06 11:47:13 UTC
Size:
10.38 KB
patch
obsolete
>--- Makefile (revision 390884) >+++ Makefile (working copy) >@@ -20,13 +20,18 @@ > > CONFLICTS= node-0.[02-9][0-9]* node-devel-0.[0-9]* iojs-* > >-ONLY_FOR_ARCHS= i386 amd64 >-CONFIGURE_ARGS= --prefix=${PREFIX_RELDEST} --without-npm --shared-zlib >+ONLY_FOR_ARCHS= i386 amd64 armv6 >+CONFIGURE_ARGS= --prefix=${PREFIX_RELDEST} --without-npm --shared-zlib --debug > PREFIX_RELDEST= ${PREFIX:S,^${DESTDIR},,} > REINPLACE_ARGS= -i '' > MAKE_ENV+= CC.host=${CC} CXX.host=${CXX} LINK.host=${CXX} LINK.target=${CXX} > > .include <bsd.port.pre.mk> >+ >+.if ${ARCH} == "armv6" >+CONFIGURE_ARGS= --openssl-no-asm >+.endif >+ > .if ${COMPILER_TYPE} == clang > MAKE_ENV+= LINK=clang++ > CFLAGS+= -Wno-unused-private-field > > >--- files/patch-deps_v8_src_arm_assembler-arm.cc (revision 0) >+++ files/patch-deps_v8_src_arm_assembler-arm.cc (working copy) >@@ -0,0 +1,47 @@ >+--- deps/v8/src/arm/assembler-arm.cc.orig 2015-06-01 14:03:13 UTC >++++ deps/v8/src/arm/assembler-arm.cc >+@@ -66,6 +66,35 @@ namespace internal { >+ // name space and pid 0 is used to kill the group (see man 2 kill). >+ static const pthread_t kNoThread = (pthread_t) 0; >+ >++#ifdef __arm__ >++ >++bool OS::ArmCpuHasFeature(CpuFeature feature) { >++ return false; >++} >++ >++CpuImplementer OS::GetCpuImplementer() { >++ static bool use_cached_value = false; >++ static CpuImplementer cached_value = UNKNOWN_IMPLEMENTER; >++ if (use_cached_value) { >++ return cached_value; >++ } >++ cached_value = ARM_IMPLEMENTER; >++ >++ use_cached_value = true; >++ return cached_value; >++} >++ >++ >++bool OS::ArmUsingHardFloat() { >++#if defined(__ARM_PCS_VFP) >++ return true; >++#else >++ return false; >++#endif >++} >++ >++#endif // def __arm__ >++ >+ >+ double ceiling(double x) { >+ // Correct as on OS X >+@@ -857,7 +857,7 @@ static bool fits_shifter(uint32_t imm32, >+ Instr* instr) { >+ // imm32 must be unsigned. >+ for (int rot = 0; rot < 16; rot++) { >+- uint32_t imm8 = (imm32 << 2*rot) | (imm32 >> (32 - 2*rot)); >++ uint32_t imm8 = rot == 0 ? imm32 : ((imm32 << 2*rot) | (imm32 >> (32 - 2*rot))); >+ if ((imm8 <= 0xff)) { >+ *rotate_imm = rot; >+ *immed_8 = imm8; > > >--- files/patch-deps_v8_src_arm_cpu-arm.cc (revision 0) >+++ files/patch-deps_v8_src_arm_cpu-arm.cc (working copy) >@@ -0,0 +1,22 @@ >+--- deps/v8/src/arm/cpu-arm.cc.orig 2015-03-02 10:36:52 UTC >++++ deps/v8/src/arm/cpu-arm.cc >+@@ -64,7 +64,7 @@ void CPU::FlushICache(void* start, size_ >+ // None of this code ends up in the snapshot so there are no issues >+ // around whether or not to generate the code when building snapshots. >+ Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size); >+-#else >++#elif defined(__linux__) >+ // Ideally, we would call >+ // syscall(__ARM_NR_cacheflush, start, >+ // reinterpret_cast<intptr_t>(start) + size, 0); >+@@ -103,6 +103,10 @@ void CPU::FlushICache(void* start, size_ >+ : "0" (beg), "r" (end), "r" (flg), "r" (__ARM_NR_cacheflush) >+ : "r3"); >+ #endif >++#elif defined(__FreeBSD__) >++ __clear_cache(start, reinterpret_cast<char*>(start) + size); >++#else >++#error "No cache flush implementation on this platform" >+ #endif >+ } >+ > > > >--- files/patch-deps_v8_src_atomicops.h (revision 0) >+++ files/patch-deps_v8_src_atomicops.h (working copy) >@@ -0,0 +1,14 @@ >+--- deps/v8/src/atomicops.h.orig 2015-06-01 13:24:35 UTC >++++ deps/v8/src/atomicops.h >+@@ -162,8 +162,10 @@ Atomic64 Release_Load(volatile const Ato >+ #elif defined(__GNUC__) && \ >+ (defined(V8_HOST_ARCH_IA32) || defined(V8_HOST_ARCH_X64)) >+ #include "atomicops_internals_x86_gcc.h" >+-#elif defined(__GNUC__) && defined(V8_HOST_ARCH_ARM) >++#elif defined(__GNUC__) && defined(__linux__) && defined(V8_HOST_ARCH_ARM) >+ #include "atomicops_internals_arm_gcc.h" >++#elif defined(__FreeBSD__) && defined(V8_HOST_ARCH_ARM) >++#include "atomicops_internals_generic_gcc.h" >+ #elif defined(__GNUC__) && defined(V8_HOST_ARCH_MIPS) >+ #include "atomicops_internals_mips_gcc.h" >+ #else > > >--- files/patch-deps_v8_src_atomicops__internals__generic__gcc.h (revision 0) >+++ files/patch-deps_v8_src_atomicops__internals__generic__gcc.h (working copy) >@@ -0,0 +1,138 @@ >+--- deps/v8/src/atomicops_internals_generic_gcc.h.orig 2015-06-01 14:05:59 UTC >++++ deps/v8/src/atomicops_internals_generic_gcc.h >+@@ -0,0 +1,135 @@ >++// Copyright 2013 Red Hat Inc. All rights reserved. >++// >++// Redistribution and use in source and binary forms, with or without >++// modification, are permitted provided that the following conditions are >++// met: >++// >++// * Redistributions of source code must retain the above copyright >++// notice, this list of conditions and the following disclaimer. >++// * Redistributions in binary form must reproduce the above >++// copyright notice, this list of conditions and the following disclaimer >++// in the documentation and/or other materials provided with the >++// distribution. >++// * Neither the name of Red Hat Inc. nor the names of its >++// contributors may be used to endorse or promote products derived from >++// this software without specific prior written permission. >++// >++// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS >++// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT >++// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR >++// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT >++// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, >++// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT >++// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, >++// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY >++// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT >++// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE >++// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. >++ >++// This file is an internal atomic implementation, use atomicops.h instead. >++ >++#ifndef V8_ATOMICOPS_INTERNALS_ARM_GCC_H_ >++#define V8_ATOMICOPS_INTERNALS_ARM_GCC_H_ >++ >++namespace v8 { >++namespace internal { >++ >++inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, >++ Atomic32 old_value, >++ Atomic32 new_value) { >++ __atomic_compare_exchange_n(ptr, &old_value, new_value, true, >++ __ATOMIC_RELAXED, __ATOMIC_RELAXED); >++ return old_value; >++} >++ >++inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, >++ Atomic32 new_value) { >++ return __atomic_exchange_n(ptr, new_value, __ATOMIC_RELAXED); >++} >++ >++inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, >++ Atomic32 increment) { >++ return __atomic_add_fetch(ptr, increment, __ATOMIC_RELAXED); >++} >++ >++inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, >++ Atomic32 increment) { >++ return __atomic_add_fetch(ptr, increment, __ATOMIC_SEQ_CST); >++} >++ >++inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, >++ Atomic32 old_value, >++ Atomic32 new_value) { >++ __atomic_compare_exchange(ptr, &old_value, &new_value, true, >++ __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE); >++ return old_value; >++} >++ >++inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr, >++ Atomic32 old_value, >++ Atomic32 new_value) { >++ __atomic_compare_exchange_n(ptr, &old_value, new_value, true, >++ __ATOMIC_RELEASE, __ATOMIC_ACQUIRE); >++ return old_value; >++} >++ >++inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) { >++ __atomic_store_n(ptr, value, __ATOMIC_RELAXED); >++} >++ >++inline void MemoryBarrier() { >++ __sync_synchronize(); >++} >++ >++inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) { >++ __atomic_store_n(ptr, value, __ATOMIC_SEQ_CST); >++} >++ >++inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) { >++ __atomic_store_n(ptr, value, __ATOMIC_RELEASE); >++} >++ >++inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) { >++ return __atomic_load_n(ptr, __ATOMIC_RELAXED); >++} >++ >++inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) { >++ return __atomic_load_n(ptr, __ATOMIC_ACQUIRE); >++} >++ >++inline Atomic32 Release_Load(volatile const Atomic32* ptr) { >++ return __atomic_load_n(ptr, __ATOMIC_SEQ_CST); >++} >++ >++#ifdef __LP64__ >++ >++inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) { >++ __atomic_store_n(ptr, value, __ATOMIC_RELEASE); >++} >++ >++inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) { >++ return __atomic_load_n(ptr, __ATOMIC_ACQUIRE); >++} >++ >++inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr, >++ Atomic64 old_value, >++ Atomic64 new_value) { >++ __atomic_compare_exchange_n(ptr, &old_value, new_value, true, >++ __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE); >++ return old_value; >++} >++ >++inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr, >++ Atomic64 old_value, >++ Atomic64 new_value) { >++ __atomic_compare_exchange_n(ptr, &old_value, new_value, true, >++ __ATOMIC_RELAXED, __ATOMIC_RELAXED); >++ return old_value; >++} >++ >++#endif // defined(__LP64__) >++ >++} // namespace internal >++} // v8 >++ >++#endif // GOOGLE_PROTOBUF_ATOMICOPS_INTERNALS_GENERIC_GCC_H_ > > >--- files/patch-deps_v8_src_platform-freebsd.cc (revision 390884) >+++ files/patch-deps_v8_src_platform-freebsd.cc (working copy) >@@ -27,3 +27,16 @@ > kMmapFd, > kMmapFdOffset) != MAP_FAILED; > } >+@@ -690,9 +690,9 @@ static void ProfilerSignalHandler(int si >+ sample->sp = reinterpret_cast<Address>(mcontext.mc_rsp); >+ sample->fp = reinterpret_cast<Address>(mcontext.mc_rbp); >+ #elif V8_HOST_ARCH_ARM >+- sample->pc = reinterpret_cast<Address>(mcontext.mc_r15); >+- sample->sp = reinterpret_cast<Address>(mcontext.mc_r13); >+- sample->fp = reinterpret_cast<Address>(mcontext.mc_r11); >++ sample->pc = reinterpret_cast<Address>(mcontext.__gregs[_REG_PC]); >++ sample->sp = reinterpret_cast<Address>(mcontext.__gregs[_REG_SP]); >++ sample->fp = reinterpret_cast<Address>(mcontext.__gregs[_REG_FP]); >+ #endif >+ sampler->SampleStack(sample); >+ sampler->Tick(sample);
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bug 201227
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158198
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158412
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158413
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