Attachment 183822 Details for Bug 220297 – v0

[patch] v0

aarch64.diff (text/plain), 2.33 KB, created by Jan Beich on 2017-06-26 23:01:38 UTC

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Creator: Jan Beich

Created: 2017-06-26 23:01:38 UTC

Size: 2.33 KB

patch

obsolete

>Index: share/man/man7/arch.7
>===================================================================
>--- share/man/man7/arch.7	(revision 320326)
>+++ share/man/man7/arch.7	(working copy)
>@@ -95,7 +95,7 @@ architectures, the final release.
> .It arm         Ta 6.0
> .It armeb       Ta 8.0
> .It armv6       Ta 10.0
>-.It arm64       Ta 11.0
>+.It aarch64     Ta 11.0
> .It ia64        Ta 5.0   Ta 10.x
> .It i386        Ta 1.0
> .It mips        Ta 8.0
>@@ -161,7 +161,7 @@ Examples are:
> .It Dv powerpc64   Ta Dv powerpc
> .It Dv mips64*     Ta Dv mips*
> .El
>-.Dv arm64
>+.Dv aarch64
> currently does not support execution of
> .Dv armv6
> binaries, even if the CPU implements
>@@ -192,7 +192,7 @@ Machine-dependent type sizes:
> .It arm         Ta 4 Ta  8 Ta 8
> .It armeb       Ta 4 Ta  8 Ta 8
> .It armv6       Ta 4 Ta  8 Ta 8
>-.It arm64       Ta 8 Ta 16 Ta 8
>+.It aarch64     Ta 8 Ta 16 Ta 8
> .It i386        Ta 4 Ta 12 Ta 4
> .It mips        Ta 4 Ta  8 Ta 8
> .It mipsel      Ta 4 Ta  8 Ta 8
>@@ -221,7 +221,7 @@ variants of powerpc.
> .It arm         Ta little Ta unsigned
> .It armeb       Ta big    Ta unsigned
> .It armv6       Ta little Ta unsigned
>-.It arm64       Ta little Ta unsigned
>+.It aarch64     Ta little Ta unsigned
> .It i386        Ta little Ta   signed
> .It mips        Ta big    Ta   signed
> .It mipsel      Ta little Ta   signed
>@@ -246,7 +246,7 @@ variants of powerpc.
> .It arm         Ta 4K
> .It armeb       Ta 4K
> .It armv6       Ta 4K, 1M
>-.It arm64       Ta 4K, 2M, 1G
>+.It aarch64     Ta 4K, 2M, 1G
> .It i386        Ta 4K, 2M (PAE), 4M
> .It mips        Ta 4K
> .It mipsel      Ta 4K
>@@ -271,7 +271,7 @@ variants of powerpc.
> .It arm         Ta soft Ta soft, double precision
> .It armeb       Ta soft Ta soft, double precision
> .It armv6       Ta hard(1) Ta hard, double precision
>-.It arm64       Ta hard Ta soft, quad precision
>+.It aarch64     Ta hard Ta soft, quad precision
> .It i386        Ta hard Ta hard, 80 bit
> .It mips        Ta soft Ta identical to double
> .It mipsel      Ta soft Ta identical to double
>@@ -323,7 +323,7 @@ Architecture-specific macros:
> .It arm         Ta Dv __arm__
> .It armeb       Ta Dv __arm__
> .It armv6       Ta Dv __arm__, Dv __ARM_ARCH >= 6
>-.It arm64       Ta Dv __aarch64__
>+.It aarch64     Ta Dv __aarch64__
> .It i386        Ta Dv __i386__
> .It mips        Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32
> .It mipsel      Ta Dv __mips__, Dv __mips_o32

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