Attachment 186905 Details for Bug 222634 – ffec: Use RACC[SHIFT16]

[patch] ffec: Use RACC[SHIFT16]

0001-ffec-Use-RACC-SHIFT16.patch (text/plain), 2.77 KB, created by sebastian.huber on 2017-10-04 12:21:41 UTC

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Creator: sebastian.huber

Created: 2017-10-04 12:21:41 UTC

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patch

obsolete

>From 55d7dd7355d53076a9348a57220c1e30e0a8ec6b Mon Sep 17 00:00:00 2001
>From: Sebastian Huber <sebastian.huber@embedded-brains.de>
>Date: Wed, 4 Oct 2017 14:15:59 +0200
>Subject: [PATCH] ffec: Use RACC[SHIFT16]
>
>This avoids the move of entire receive frames to meet the alignment
>requirements of the IP header and so on.
>---
> sys/dev/ffec/if_ffec.c | 43 ++++++++++++++++++++++++++++++-------------
> 1 file changed, 30 insertions(+), 13 deletions(-)
>
>diff --git a/sys/dev/ffec/if_ffec.c b/sys/dev/ffec/if_ffec.c
>index d38ab76d406..37b0f0403fa 100644
>--- a/sys/dev/ffec/if_ffec.c
>+++ b/sys/dev/ffec/if_ffec.c
>@@ -755,14 +755,17 @@ ffec_setup_rxbuf(struct ffec_softc *sc, int idx, struct mbuf * m)
> 	int error, nsegs;
> 	struct bus_dma_segment seg;
> 
>-	/*
>-	 * We need to leave at least ETHER_ALIGN bytes free at the beginning of
>-	 * the buffer to allow the data to be re-aligned after receiving it (by
>-	 * copying it backwards ETHER_ALIGN bytes in the same buffer).  We also
>-	 * have to ensure that the beginning of the buffer is aligned to the
>-	 * hardware's requirements.
>-	 */
>-	m_adj(m, roundup(ETHER_ALIGN, sc->rxbuf_align));
>+	if ((sc->fectype & FECFLAG_AVB) == 0) {
>+		/*
>+		 * The RACC[SHIFT16] feature is not used.  So, we need to leave
>+		 * at least ETHER_ALIGN bytes free at the beginning of the
>+		 * buffer to allow the data to be re-aligned after receiving it
>+		 * (by copying it backwards ETHER_ALIGN bytes in the same
>+		 * buffer).  We also have to ensure that the beginning of the
>+		 * buffer is aligned to the hardware's requirements.
>+		 */
>+		m_adj(m, roundup(ETHER_ALIGN, sc->rxbuf_align));
>+	}
> 
> 	error = bus_dmamap_load_mbuf_sg(sc->rxbuf_tag, sc->rxbuf_map[idx].map,
> 	    m, &seg, &nsegs, 0);
>@@ -795,7 +798,6 @@ ffec_rxfinish_onebuf(struct ffec_softc *sc, int len)
> {
> 	struct mbuf *m, *newmbuf;
> 	struct ffec_bufmap *bmap;
>-	uint8_t *dst, *src;
> 	int error;
> 
> 	/*
>@@ -839,10 +841,17 @@ ffec_rxfinish_onebuf(struct ffec_softc *sc, int len)
> 	m->m_pkthdr.len = len;
> 	m->m_pkthdr.rcvif = sc->ifp;
> 
>-	src = mtod(m, uint8_t*);
>-	dst = src - ETHER_ALIGN;
>-	bcopy(src, dst, len);
>-	m->m_data = dst;
>+	if ((sc->fectype & FECFLAG_AVB)) {
>+		/* We use the RACC[SHIFT16] feature */
>+		m->m_data = mtod(m, uint8_t *) + 2;
>+	} else {
>+		uint8_t *dst, *src;
>+
>+		src = mtod(m, uint8_t*);
>+		dst = src - ETHER_ALIGN;
>+		bcopy(src, dst, len);
>+		m->m_data = dst;
>+	}
> 	sc->ifp->if_input(sc->ifp, m);
> 
> 	FFEC_LOCK(sc);
>@@ -1216,6 +1225,14 @@ ffec_init_locked(struct ffec_softc *sc)
> 	ffec_clear_stats(sc);
> 	WR4(sc, FEC_MIBC_REG, regval & ~FEC_MIBC_DIS);
> 
>+	if ((sc->fectype & FECFLAG_AVB) != 0) {
>+		/*
>+		 * RACC - Receive Accelerator Function Configuration.
>+		 */
>+		regval = RD4(sc, FEC_RACC_REG);
>+		WR4(sc, FEC_RACC_REG, regval | FEC_RACC_SHIFT16);
>+	}
>+
> 	/*
> 	 * ECR - Ethernet control register.
> 	 *
>-- 
>2.12.3
>

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Attachments on bug 222634: 186752 | 186753 | 186754 | 186755 | 186905 | 186906