FreeBSD Bugzilla – Attachment 194974 Details for
Bug 139743
[ichsmb] [patch] ichsmb driver doesn't detects SMB bus on Asus P4B533/P4PE motherboards
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[patch]
sys_dev_pci_pci.c.diff releng/11.2
sys_dev_pci_pci.c.diff_RELENG_11_2 (text/plain), 6.54 KB, created by
takefu
on 2018-07-09 04:09:11 UTC
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Description:
sys_dev_pci_pci.c.diff releng/11.2
Filename:
MIME Type:
Creator:
takefu
Created:
2018-07-09 04:09:11 UTC
Size:
6.54 KB
patch
obsolete
>--- sys/dev/pci/pci.c.orig 2018-07-07 01:12:04.435144000 +0000 >+++ sys/dev/pci/pci.c 2018-07-07 01:21:14.881065000 +0000 >@@ -117,6 +117,7 @@ static void pci_mask_msix(device_t dev, > static void pci_unmask_msix(device_t dev, u_int index); > static int pci_msi_blacklisted(void); > static int pci_msix_blacklisted(void); >+static void pci_fix_asus_smbus(device_t dev); > static void pci_resume_msi(device_t dev); > static void pci_resume_msix(device_t dev); > static int pci_remap_intr_method(device_t bus, device_t dev, >@@ -224,54 +225,56 @@ struct pci_quirk { > #define PCI_QUIRK_UNMAP_REG 4 /* Ignore PCI map register */ > #define PCI_QUIRK_DISABLE_MSIX 5 /* MSI-X doesn't work */ > #define PCI_QUIRK_MSI_INTX_BUG 6 /* PCIM_CMD_INTxDIS disables MSI */ >+#define PCI_QUIRK_FIXUP_ROUTINE 7 /* PCI needs a fix to continue */ > int arg1; > int arg2; >+ void (*fixup_func)(device_t dev); > }; > > static const struct pci_quirk pci_quirks[] = { > /* The Intel 82371AB and 82443MX have a map register at offset 0x90. */ >- { 0x71138086, PCI_QUIRK_MAP_REG, 0x90, 0 }, >- { 0x719b8086, PCI_QUIRK_MAP_REG, 0x90, 0 }, >+ { 0x71138086, PCI_QUIRK_MAP_REG, 0x90, 0, NULL }, >+ { 0x719b8086, PCI_QUIRK_MAP_REG, 0x90, 0, NULL }, > /* As does the Serverworks OSB4 (the SMBus mapping register) */ >- { 0x02001166, PCI_QUIRK_MAP_REG, 0x90, 0 }, >+ { 0x02001166, PCI_QUIRK_MAP_REG, 0x90, 0, NULL }, > > /* > * MSI doesn't work with the ServerWorks CNB20-HE Host Bridge > * or the CMIC-SL (AKA ServerWorks GC_LE). > */ >- { 0x00141166, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >- { 0x00171166, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >+ { 0x00141166, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, >+ { 0x00171166, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, > > /* > * MSI doesn't work on earlier Intel chipsets including > * E7500, E7501, E7505, 845, 865, 875/E7210, and 855. > */ >- { 0x25408086, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >- { 0x254c8086, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >- { 0x25508086, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >- { 0x25608086, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >- { 0x25708086, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >- { 0x25788086, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >- { 0x35808086, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >+ { 0x25408086, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, >+ { 0x254c8086, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, >+ { 0x25508086, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, >+ { 0x25608086, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, >+ { 0x25708086, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, >+ { 0x25788086, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, >+ { 0x35808086, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, > > /* > * MSI doesn't work with devices behind the AMD 8131 HT-PCIX > * bridge. > */ >- { 0x74501022, PCI_QUIRK_DISABLE_MSI, 0, 0 }, >+ { 0x74501022, PCI_QUIRK_DISABLE_MSI, 0, 0, NULL }, > > /* > * MSI-X allocation doesn't work properly for devices passed through > * by VMware up to at least ESXi 5.1. > */ >- { 0x079015ad, PCI_QUIRK_DISABLE_MSIX, 0, 0 }, /* PCI/PCI-X */ >- { 0x07a015ad, PCI_QUIRK_DISABLE_MSIX, 0, 0 }, /* PCIe */ >+ { 0x079015ad, PCI_QUIRK_DISABLE_MSIX, 0, 0, NULL }, /* PCI/PCI-X */ >+ { 0x07a015ad, PCI_QUIRK_DISABLE_MSIX, 0, 0, NULL }, /* PCIe */ > > /* > * Some virtualization environments emulate an older chipset > * but support MSI just fine. QEMU uses the Intel 82440. > */ >- { 0x12378086, PCI_QUIRK_ENABLE_MSI_VM, 0, 0 }, >+ { 0x12378086, PCI_QUIRK_ENABLE_MSI_VM, 0, 0, NULL }, > > /* > * HPET MMIO base address may appear in Bar1 for AMD SB600 SMBus >@@ -281,29 +284,35 @@ static const struct pci_quirk pci_quirks > * For SB600 A21 and later, firmware must set the bit to hide it. > * For SB700 and later, it is unused and hardcoded to zero. > */ >- { 0x43851002, PCI_QUIRK_UNMAP_REG, 0x14, 0 }, >+ { 0x43851002, PCI_QUIRK_UNMAP_REG, 0x14, 0, NULL }, > > /* > * Atheros AR8161/AR8162/E2200/E2400/E2500 Ethernet controllers have > * a bug that MSI interrupt does not assert if PCIM_CMD_INTxDIS bit > * of the command register is set. > */ >- { 0x10911969, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, >- { 0xE0911969, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, >- { 0xE0A11969, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, >- { 0xE0B11969, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, >- { 0x10901969, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, >+ { 0x10911969, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, >+ { 0xE0911969, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, >+ { 0xE0A11969, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, >+ { 0xE0B11969, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, >+ { 0x10901969, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, > > /* > * Broadcom BCM5714(S)/BCM5715(S)/BCM5780(S) Ethernet MACs don't > * issue MSI interrupts with PCIM_CMD_INTxDIS set either. > */ >- { 0x166814e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5714 */ >- { 0x166914e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5714S */ >- { 0x166a14e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5780 */ >- { 0x166b14e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5780S */ >- { 0x167814e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5715 */ >- { 0x167914e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0 }, /* BCM5715S */ >+ { 0x166814e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, /* BCM5714 */ >+ { 0x166914e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, /* BCM5714S */ >+ { 0x166a14e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, /* BCM5780 */ >+ { 0x166b14e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, /* BCM5780S */ >+ { 0x167814e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, /* BCM5715 */ >+ { 0x167914e4, PCI_QUIRK_MSI_INTX_BUG, 0, 0, NULL }, /* BCM5715S */ >+ >+ /* >+ * The ASUS P4B-motherboards needs a hack to enable the Intel 801SMBus >+ */ >+ { 0x24408086, PCI_QUIRK_FIXUP_ROUTINE, 0, 0, &pci_fix_asus_smbus }, >+ { 0x24C08086, PCI_QUIRK_FIXUP_ROUTINE, 0, 0, &pci_fix_asus_smbus }, > > { 0 } > }; >@@ -589,6 +598,27 @@ pci_fixancient(pcicfgregs *cfg) > cfg->hdrtype = PCIM_HDRTYPE_BRIDGE; > } > >+/* asus p4b/p4pe hack */ >+ >+static void >+pci_fix_asus_smbus(device_t dev) >+{ >+ int pmccfg; >+ >+ /* read subsystem vendor-id */ >+ pmccfg = pci_read_config(dev, 0xF2, 2); >+ printf(" [-] pmccfg: %.4x\n",pmccfg); >+ if( pmccfg & 0x8 ){ >+ pmccfg &= ~0x8; >+ pci_write_config(dev, 0xF2, pmccfg, 2); >+ pmccfg = pci_read_config(dev, 0xF2, 2); >+ if( pmccfg & 0x8 ) >+ printf("Could not enable Intel 801SMBus!\n"); >+ else >+ printf("Enabled Intel 801SMBus\n"); >+ } >+} >+ > /* extract header type specific config data */ > > static void >@@ -3955,6 +3985,12 @@ pci_add_resources(device_t bus, device_t > * Skip quirked resources. > */ > for (q = &pci_quirks[0]; q->devid != 0; q++) >+ if (q->devid == ((cfg->device << 16) | cfg->vendor)){ >+ if (q->type == PCI_QUIRK_MAP_REG) >+ pci_add_map(bus, dev, q->arg1, rl, force, 0); >+ else if (q->type == PCI_QUIRK_FIXUP_ROUTINE) >+ q->fixup_func(dev); >+ } > if (q->devid == devid && > q->type == PCI_QUIRK_UNMAP_REG && > q->arg1 == PCIR_BAR(i))
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bug 139743
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242021