FreeBSD Bugzilla – Attachment 204307 Details for
Bug 233863
Various PowerMac G5 models may require kern.smp.disabled=1 and must set usefdt=1 which causes net interface reorder
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[patch]
Patch for aim/mp_cpudep.c that fixes slb-miss problem in cpudep_ap_bootstrap for PPC970/PowerMacG5 contexts
file_233863.txt (text/plain), 3.34 KB, created by
Mark Millard
on 2019-05-10 10:47:25 UTC
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Description:
Patch for aim/mp_cpudep.c that fixes slb-miss problem in cpudep_ap_bootstrap for PPC970/PowerMacG5 contexts
Filename:
MIME Type:
Creator:
Mark Millard
Created:
2019-05-10 10:47:25 UTC
Size:
3.34 KB
patch
obsolete
>Index: /usr/src/sys/powerpc/aim/mp_cpudep.c >=================================================================== >--- /usr/src/sys/powerpc/aim/mp_cpudep.c (revision 345758) >+++ /usr/src/sys/powerpc/aim/mp_cpudep.c (working copy) >@@ -50,7 +50,7 @@ > #include <dev/ofw/openfirm.h> > #include <machine/ofw_machdep.h> > >-void *ap_pcpu; >+void * volatile ap_pcpu; > > static register_t bsp_state[8] __aligned(8); > >@@ -68,6 +68,45 @@ > case IBM970: > case IBM970FX: > case IBM970MP: >+ /* Set HIOR to 0 */ >+ __asm __volatile("mtspr 311,%0" :: "r"(0)); >+ powerpc_sync(); >+ >+ /* >+ * The 970 has strange rules about how to update HID registers. >+ * See Table 2-3, 970MP manual >+ * >+ * Note: HID4 and HID5 restored already in >+ * cpudep_ap_early_bootstrap() >+ */ >+ >+ __asm __volatile("mtasr %0; sync" :: "r"(0)); >+ #ifdef __powerpc64__ >+ __asm __volatile(" \ >+ sync; isync; \ >+ mtspr %1, %0; \ >+ mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ >+ mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ >+ sync; isync" >+ :: "r"(bsp_state[0]), "K"(SPR_HID0)); >+ __asm __volatile("sync; isync; \ >+ mtspr %1, %0; mtspr %1, %0; sync; isync" >+ :: "r"(bsp_state[1]), "K"(SPR_HID1)); >+ #else >+ __asm __volatile(" \ >+ ld %0,0(%2); \ >+ sync; isync; \ >+ mtspr %1, %0; \ >+ mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ >+ mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ >+ sync; isync" >+ : "=r"(reg) : "K"(SPR_HID0), "b"(bsp_state)); >+ __asm __volatile("ld %0, 8(%2); sync; isync; \ >+ mtspr %1, %0; mtspr %1, %0; sync; isync" >+ : "=r"(reg) : "K"(SPR_HID1), "b"(bsp_state)); >+ #endif >+ >+ powerpc_sync(); > /* Restore HID4 and HID5, which are necessary for the MMU */ > > #ifdef __powerpc64__ >@@ -103,6 +142,7 @@ > break; > } > >+powerpc_sync(); > __asm __volatile("mtsprg 0, %0" :: "r"(ap_pcpu)); > powerpc_sync(); > } >@@ -307,45 +347,6 @@ > case IBM970: > case IBM970FX: > case IBM970MP: >- /* Set HIOR to 0 */ >- __asm __volatile("mtspr 311,%0" :: "r"(0)); >- powerpc_sync(); >- >- /* >- * The 970 has strange rules about how to update HID registers. >- * See Table 2-3, 970MP manual >- * >- * Note: HID4 and HID5 restored already in >- * cpudep_ap_early_bootstrap() >- */ >- >- __asm __volatile("mtasr %0; sync" :: "r"(0)); >- #ifdef __powerpc64__ >- __asm __volatile(" \ >- sync; isync; \ >- mtspr %1, %0; \ >- mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ >- mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ >- sync; isync" >- :: "r"(bsp_state[0]), "K"(SPR_HID0)); >- __asm __volatile("sync; isync; \ >- mtspr %1, %0; mtspr %1, %0; sync; isync" >- :: "r"(bsp_state[1]), "K"(SPR_HID1)); >- #else >- __asm __volatile(" \ >- ld %0,0(%2); \ >- sync; isync; \ >- mtspr %1, %0; \ >- mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ >- mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ >- sync; isync" >- : "=r"(reg) : "K"(SPR_HID0), "b"(bsp_state)); >- __asm __volatile("ld %0, 8(%2); sync; isync; \ >- mtspr %1, %0; mtspr %1, %0; sync; isync" >- : "=r"(reg) : "K"(SPR_HID1), "b"(bsp_state)); >- #endif >- >- powerpc_sync(); > break; > case IBMCELLBE: > #ifdef NOTYET /* Causes problems if in instruction stream on 970 */ >@@ -416,5 +417,6 @@ > "suboptimal.\n"); > break; > } >+printf("cpudep_ap_setup: done\n"); > }
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