Attachment 236875 Details for Bug 266657 – staller clearfrog pro dmesg

staller clearfrog pro dmesg

staller_clearfrog_pro.txt (text/plain), 8.36 KB, created by Priit Trees on 2022-09-27 13:23:18 UTC

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Creator: Priit Trees

Created: 2022-09-27 13:23:18 UTC

Size: 8.36 KB

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obsolete

>Using DTB from loaded file 'boot/dtb/armada-388-clearfog.dtb'.
>Kernel entry at 0x38c00200...
>Kernel args: (null)
>SOC: Marvell 88F6828, TClock 250MHz, Frequency 1332MHz
>  Instruction cache prefetch enabled, data cache prefetch disabled
>---<<BOOT>>---
>GDB: debug ports: uart
>GDB: current port: uart
>KDB: debugger backends: ddb gdb
>KDB: current backend: ddb
>Copyright (c) 1992-2022 The FreeBSD Project.
>Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
>        The Regents of the University of California. All rights reserved.
>FreeBSD is a registered trademark of The FreeBSD Foundation.
>FreeBSD 14.0-CURRENT #27 main-n258126-d99d59a79f29-dirty: Tue Sep 27 01:05:20 EEST 2022
>    trees@dh61cr-fbsd:/usr/home/trees/obj/usr/home/trees/freebsd/arm.armv6/sys/ARMADA38X arm
>FreeBSD clang version 14.0.5 (https://github.com/llvm/llvm-project.git llvmorg-14.0.5-0-gc12386ae247c)
>WARNING: WITNESS option enabled, expect reduced performance.
>CPU: ARM Cortex-A9 r4p1 (ECO: 0x00000000)
>CPU Features:
>  Multiprocessing, Thumb2, Security, VMSAv7, Coherent Walk
>Optional instructions:
>  UMULL, SMULL, SIMD(ext)
>LoUU:2 LoC:2 LoUIS:2
>Cache level 1:
> 32KB/32B 4-way data cache WB Read-Alloc Write-Alloc
> 32KB/32B 4-way instruction cache Read-Alloc
>real memory  = 268431360 (255 MB)
>avail memory = 259166208 (247 MB)
>FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
>random: unblocking device.
>random: entropy device external interface
>ofwbus0: <Open Firmware Device Tree>
>simplebus0: <Flattened device tree simple bus> on ofwbus0
>simplebus1: <Flattened device tree simple bus> on simplebus0
>armada38x_coreclk0: <ARMADA38X core-clock> mem 0x18600-0x18603 on simplebus1
>ofw_clkbus0: <OFW clocks bus> on ofwbus0
>clk_fixed0: <Fixed clock> on ofw_clkbus0
>clk_fixed1: <Fixed clock> on ofw_clkbus0
>regfix0: <Fixed Regulator> on ofwbus0
>armada38x_gateclk0: <ARMADA38X gateclk> mem 0x18220-0x18223 on simplebus1
>l2cache0: <PL310 L2 cache controller> mem 0x8000-0x8fff on simplebus1
>l2cache0: cannot allocate IRQ, not using interrupt
>l2cache0: Part number: 0x3, release: 0x9
>l2cache0: L2 Cache enabled: 1024KB/32B 16 ways
>gic0: <ARM Generic Interrupt Controller> mem 0xd000-0xdfff,0xc100-0xc1ff on simplebus1
>gic0: pn 0x39, arch 0x1, rev 0x2, implementer 0x43b irqs 192
>mpic0: <Marvell Integrated Interrupt Controller> mem 0x20a00-0x20ccf,0x21070-0x210c7 irq 17 on simplebus1
>gpio0: <Marvell Integrated GPIO Controller> mem 0x18100-0x1813f,0x181c0-0x181c7 irq 9,10,11,12 on simplebus1
>gpio0: 4 IRQs available
>gpio0: Disable interrupts (offset = 0 + EDGE(0x18)
>gpio0: Disable interrupts (offset = 0 + LEV(0x1C))
>gpio0: Setup intr 0
>gpio0: Setup intr 1
>gpio0: Setup intr 2
>gpio0: Setup intr 3
>gpio0: Clear int status (offset = 0)
>gpiobus0: <GPIO bus> on gpio0
>gpio1: <Marvell Integrated GPIO Controller> mem 0x18140-0x1817f,0x181c8-0x181cf irq 13,14,15,16 on simplebus1
>gpio1: 4 IRQs available
>gpio1: Disable interrupts (offset = 0 + EDGE(0x18)
>gpio1: Disable interrupts (offset = 0 + LEV(0x1C))
>gpio1: Setup intr 0
>gpio1: Setup intr 1
>gpio1: Setup intr 2
>gpio1: Setup intr 3
>gpio1: Clear int status (offset = 0)
>gpiobus1: <GPIO bus> on gpio1
>mp_tmr0: <ARM MPCore Timers> mem 0xc200-0xc21f irq 3 on simplebus1
>Timecounter "MPCore" frequency 666000000 Hz quality 800
>mp_tmr1: <ARM MPCore Timers> mem 0xc600-0xc61f irq 4 on simplebus1
>Event timer "MPCore" frequency 666000000 Hz quality 1000
>twsi0: <Marvell Integrated I2C Bus Controller> mem 0x11000-0x1101f irq 5 on simplebus1
>iicbus0: <OFW I2C bus> on twsi0
>iic0: <I2C generic I/O> on iicbus0
>iicbus0: <unknown card> at addr 0xa6
>iicbus0: <unknown card> at addr 0x40
>iicbus0: <unknown card> at addr 0x98
>iicbus0: <unknown card> at addr 0xa4
>twsi1: <Marvell Integrated I2C Bus Controller> mem 0x11100-0x1111f irq 6 on simplebus1
>iicbus1: <OFW I2C bus> on twsi1
>iic1: <I2C generic I/O> on iicbus1
>uart0: <16550 or compatible> mem 0x12000-0x120ff irq 7 on simplebus1
>uart0: console (847,n,8,1)
>uart1: <16550 or compatible> mem 0x12100-0x121ff irq 8 on simplebus1
>gpioc0: <GPIO controller> on gpio0
>gpioc1: <GPIO controller> on gpio1
>wdt0: <Marvell Watchdog Timer> mem 0x20300-0x20333,0x20704-0x20707,0x18260-0x18263 irq 24,25 on simplebus1
>pmsu0: <Power Management Service Unit> mem 0x22000-0x22fff on simplebus1
>mvneta0: <NETA controller> mem 0x70000-0x73fff irq 26 on simplebus1
>mvneta0: version is 10
>miibus0: <MII bus> on mvneta0
>ukphy0: <Generic IEEE 802.3u media interface> PHY 0 on miibus0
>ukphy0:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
>mvneta0: Ethernet address: 24:ea:aa:83:18:00
>mvneta1: <NETA controller> mem 0x30000-0x33fff irq 27 on simplebus1
>mvneta1: version is 10
>mdio0: <MDIO> on mvneta1
>e6000sw0: <Marvell 88E6176> on mdio0
>e6000sw0: multi-chip addressing mode (0x4)
>e6000sw0: PHY at port 0
>miibus1: <MII bus> on e6000sw0
>ukphy1: <Generic IEEE 802.3u media interface> PHY 0 on miibus1
>ukphy1:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
>e6000sw0: PHY at port 1
>miibus2: <MII bus> on e6000sw0
>ukphy2: <Generic IEEE 802.3u media interface> PHY 1 on miibus2
>ukphy2:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
>e6000sw0: PHY at port 2
>miibus3: <MII bus> on e6000sw0
>ukphy3: <Generic IEEE 802.3u media interface> PHY 2 on miibus3
>ukphy3:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
>e6000sw0: PHY at port 3
>miibus4: <MII bus> on e6000sw0
>ukphy4: <Generic IEEE 802.3u media interface> PHY 3 on miibus4
>ukphy4:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
>e6000sw0: PHY at port 4
>miibus5: <MII bus> on e6000sw0
>ukphy5: <Generic IEEE 802.3u media interface> PHY 4 on miibus5
>ukphy5:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
>e6000sw0: CPU port at 5
>e6000sw0: fixed port at 5
>e6000sw0: fixed port at 6
>e6000sw0: switch is ready.
>etherswitch0: <Switch controller> on e6000sw0
>mvneta1: Ethernet address: 80:ee:17:c9:c2:01
>mvneta2: <NETA controller> mem 0x34000-0x37fff irq 28 on simplebus1
>mvneta2: Use in-band link status.
>mvneta2: version is 10
>mvneta2: Ethernet address: 4c:ab:bb:1c:38:02
>ehci0: <Marvell Integrated USB 2.0 controller> mem 0x58000-0x584ff irq 29 on simplebus1
>usbus0: EHCI version 1.0
>usbus0: stop timeout
>usbus0 on ehci0
>cesa0: <Marvell Cryptographic Engine and Security Accelerator> mem 0x90000-0x9ffff irq 30,31 on simplebus1
>rtc0: <Marvell Integrated RTC> mem 0xa3800-0xa381f,0x184a0-0x184ab irq 32 on simplebus1
>rtc0: registered as a time-of-day clock, resolution 1.000000s
>ahci0: <Marvell AHCI Controller> mem 0xa8000-0xa9fff irq 33 on simplebus1
>ahci0: AHCI v1.00 with 2 6Gbps ports, Port Multiplier supported with FBS
>ahci0: quirks=0x200010<2CH,MRVL_SR_DEL>
>ahcich0: <AHCI channel> at channel 0 on ahci0
>ahcich1: <AHCI channel> at channel 1 on ahci0
>ahci1: <Marvell AHCI Controller> mem 0xe0000-0xe1fff irq 34 on simplebus1
>ahci1: AHCI v1.00 with 2 6Gbps ports, Port Multiplier supported with FBS
>ahci1: quirks=0x200010<2CH,MRVL_SR_DEL>
>ahcich2: <AHCI channel> at channel 0 on ahci1
>ahcich3: <AHCI channel> at channel 1 on ahci1
>armada_thermal0: <Armada380 Thermal Control> mem 0xe4078-0xe407b,0xe4070-0xe4077 on simplebus1
>device_attach: armada_thermal0 attach returned 6
>sdhci_fdt0: <ARMADA38X SDHCI controller> mem 0xd8000-0xd8fff,0xdc000-0xdc0ff,0x18454-0x18457 irq 36 on simplebus1
>sdhci_fdt0: 1 slot(s) allocated
>xhci0: <Generic USB 3.0 controller> mem 0xf0000-0xf3fff,0xf4000-0xf7fff irq 37 on simplebus1
>xhci0: 32 bytes context size, 32-bit DMA
>usbus1 on xhci0
>xhci1: <Generic USB 3.0 controller> mem 0xf8000-0xfbfff,0xfc000-0xfffff irq 38 on simplebus1
>xhci1: 32 bytes context size, 32-bit DMA
>usbus2 on xhci1
>cesa1: <Marvell Cryptographic Engine and Security Accelerator> mem 0x90000-0x9ffff irq 39,40 on simplebus1
>spi0: <Marvell SPI controller> mem 0xf001000000010680-0xf0010000000106cf irq 2 on simplebus0
>pcib_ctrl0: <Marvell Integrated PCIe Bus Controller> on simplebus0
>pcib0: <Marvell Integrated PCI/PCI-E Controller> on pcib_ctrl0
>pci0: <PCI bus> on pcib0
>pcib1: <Marvell Integrated PCI/PCI-E Controller> on pcib_ctrl0
>pci1: <PCI bus> on pcib1
>cpulist0: <Open Firmware CPU Group> on ofwbus0
>cpu0: <Open Firmware CPU> on cpulist0
>cpu1: <Open Firmware CPU> on cpulist0

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Attachments on bug 266657: 236875