Attachment 241908 Details for Bug 271062 – patch v4 for CURRENT and RELENG-13.2

[patch] patch v4 for CURRENT and RELENG-13.2

sys_dev_isp-v4.diff (text/plain), 20.54 KB, created by Joerg Pulz on 2023-05-01 14:40:19 UTC

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Creator: Joerg Pulz

Created: 2023-05-01 14:40:19 UTC

Size: 20.54 KB

patch

obsolete

>diff --git a/share/man/man4/isp.4 b/share/man/man4/isp.4
>index 78d20723f..36fdf3b70 100644
>--- a/share/man/man4/isp.4
>+++ b/share/man/man4/isp.4
>@@ -26,7 +26,7 @@
> .\"
> .\" $FreeBSD$
> .\"
>-.Dd November 19, 2020
>+.Dd April 25, 2023
> .Dt ISP 4
> .Os
> .Sh NAME
>@@ -105,6 +105,14 @@ Optical 16Gb FC/FCoE PCIe cards.
> Optical 16Gb Fibre Channel PCIe cards.
> .It Qlogic 2740/2742/2764 (aka 2722/2714)
> Optical 32Gb Fibre Channel PCIe cards.
>+.It Qlogic QLE2770/QLE2772 (aka 2812)
>+Optical 32Gb Fibre Channel PCIe cards.
>+.It Qlogic QLE2774 (aka 2814)
>+Optical 32Gb Fibre Channel PCIe cards.
>+.It Qlogic QLE2870/QLE2872 (aka 2812)
>+Optical 64Gb Fibre Channel PCIe cards.
>+.It Qlogic QLE2874 (aka 2814)
>+Optical 64Gb Fibre Channel PCIe cards.
> .El
> .Sh CONFIGURATION OPTIONS
> Target mode support for Fibre Channel adapters may be enabled with the
>diff --git a/share/man/man4/ispfw.4 b/share/man/man4/ispfw.4
>index 8353413fe..8cff500b9 100644
>--- a/share/man/man4/ispfw.4
>+++ b/share/man/man4/ispfw.4
>@@ -22,7 +22,7 @@
> .\"
> .\" $FreeBSD$
> .\"
>-.Dd November 19, 2020
>+.Dd April 25, 2023
> .Dt ISPFW 4
> .Os
> .Sh NAME
>@@ -60,3 +60,5 @@ This driver was written by
> .An Matthew Jacob .
> Later improvement was done by
> .An Alexander Motin Aq Mt mav@FreeBSD.org .
>+.Sh BUGS
>+Only firmware for the 24xx and 25xx based cards is included.
>diff --git a/sys/dev/isp/isp.c b/sys/dev/isp/isp.c
>index cc2f5ae23..14a9c1f48 100644
>--- a/sys/dev/isp/isp.c
>+++ b/sys/dev/isp/isp.c
>@@ -123,6 +123,14 @@ static int isp_read_nvram_2400(ispsoftc_t *);
> static void isp_rd_2400_nvram(ispsoftc_t *, uint32_t, uint32_t *);
> static void isp_parse_nvram_2400(ispsoftc_t *, uint8_t *);
> 
>+static int isp_read_flthdr_28xx(ispsoftc_t *);
>+static void isp_rd_28xx_flthdr(ispsoftc_t *, uint32_t, uint32_t *);
>+static void isp_parse_flthdr_28xx(ispsoftc_t *, uint8_t *);
>+
>+static int isp_read_flt_28xx(ispsoftc_t *);
>+static void isp_rd_28xx_flt(ispsoftc_t *, uint32_t, uint32_t *);
>+static int isp_parse_flt_28xx(ispsoftc_t *, uint8_t *);
>+
> static void
> isp_change_fw_state(ispsoftc_t *isp, int chan, int state)
> {
>@@ -179,6 +187,9 @@ isp_reset(ispsoftc_t *isp, int do_load_defaults)
> 	case ISP_HA_FC_2700:
> 		btype = "2700";
> 		break;
>+	case ISP_HA_FC_2800:
>+		btype = "2800";
>+		break;
> 	default:
> 		break;
> 	}
>@@ -710,8 +721,11 @@ isp_init(ispsoftc_t *isp)
> 	icbp->icb_version = ICB_VERSION1;
> 	icbp->icb_maxfrmlen = DEFAULT_FRAMESIZE(isp);
> 	if (icbp->icb_maxfrmlen < ICB_MIN_FRMLEN || icbp->icb_maxfrmlen > ICB_MAX_FRMLEN) {
>-		isp_prt(isp, ISP_LOGERR, "bad frame length (%d) from NVRAM- using %d", DEFAULT_FRAMESIZE(isp), ICB_DFLT_FRMLEN);
> 		icbp->icb_maxfrmlen = ICB_DFLT_FRMLEN;
>+		if (IS_28XX(isp))
>+			icbp->icb_maxfrmlen = ICB_DFLT_FRMLEN_28XX;
>+
>+		isp_prt(isp, ISP_LOGERR, "bad frame length (%d) from NVRAM - using %d", DEFAULT_FRAMESIZE(isp), icbp->icb_maxfrmlen);
> 	}
> 
> 	if (!IS_26XX(isp))
>@@ -822,12 +836,16 @@ isp_init(ispsoftc_t *isp)
> 	} else if (isp->isp_confopts & ISP_CFG_32GB) {
> 		icbp->icb_fwoptions3 &= ~ICB2400_OPT3_RATE_MASK;
> 		icbp->icb_fwoptions3 |= ICB2400_OPT3_RATE_32GB;
>+	} else if (isp->isp_confopts & ISP_CFG_64GB) {
>+		icbp->icb_fwoptions3 &= ~ICB2400_OPT3_RATE_MASK;
>+		icbp->icb_fwoptions3 |= ICB2400_OPT3_RATE_64GB;
> 	} else {
> 		switch (icbp->icb_fwoptions3 & ICB2400_OPT3_RATE_MASK) {
> 		case ICB2400_OPT3_RATE_4GB:
> 		case ICB2400_OPT3_RATE_8GB:
> 		case ICB2400_OPT3_RATE_16GB:
> 		case ICB2400_OPT3_RATE_32GB:
>+		case ICB2400_OPT3_RATE_64GB:
> 		case ICB2400_OPT3_RATE_AUTO:
> 			break;
> 		case ICB2400_OPT3_RATE_2GB:
>@@ -1537,6 +1555,8 @@ isp_fclink_test(ispsoftc_t *isp, int chan, int usdelay)
> 	if (mbs.param[0] == MBOX_COMMAND_COMPLETE) {
> 		if (mbs.param[1] == MBGSD_10GB)
> 			fcp->isp_gbspeed = 10;
>+		else if (mbs.param[1] == MBGSD_64GB)
>+			fcp->isp_gbspeed = 64;
> 		else if (mbs.param[1] == MBGSD_32GB)
> 			fcp->isp_gbspeed = 32;
> 		else if (mbs.param[1] == MBGSD_16GB)
>@@ -4322,18 +4342,36 @@ isp_reinit(ispsoftc_t *isp, int do_load_defaults)
> static int
> isp_read_nvram(ispsoftc_t *isp, int bus)
> {
>+	if (IS_28XX(isp)) {
>+		fcparam *fcp = FCPARAM(isp, 0);
>+		int r = 0;
> 
>+		fcp->flash_data_addr = ISP28XX_BASE_ADDR;
>+		fcp->flt_length = 0;
>+		r = isp_read_flthdr_28xx(isp);
>+		if (r == 0) {
>+			isp_read_flt_28xx(isp);
>+		} else {
>+			fcp->flt_region_nvram =
>+			    (0x300000 + ISP2400_NVRAM_PORT_ADDR(isp->isp_port));
>+		}
>+	}
> 	return (isp_read_nvram_2400(isp));
> }
> 
> static int
> isp_read_nvram_2400(ispsoftc_t *isp)
> {
>+	fcparam *fcp = FCPARAM(isp, 0);
> 	int retval = 0;
> 	uint32_t addr, csum, lwrds, *dptr;
> 	uint8_t nvram_data[ISP2400_NVRAM_SIZE];
> 
>-	addr = ISP2400_NVRAM_PORT_ADDR(isp->isp_port);
>+	if (IS_28XX(isp)) {
>+		addr = fcp->flt_region_nvram;
>+	} else {
>+		addr = ISP2400_NVRAM_PORT_ADDR(isp->isp_port);
>+	}
> 	dptr = (uint32_t *) nvram_data;
> 	for (lwrds = 0; lwrds < ISP2400_NVRAM_SIZE >> 2; lwrds++) {
> 		isp_rd_2400_nvram(isp, addr++, dptr++);
>@@ -4368,7 +4406,12 @@ isp_rd_2400_nvram(ispsoftc_t *isp, uint32_t addr, uint32_t *rp)
> 	uint32_t base = 0x7ffe0000;
> 	uint32_t tmp = 0;
> 
>-	if (IS_26XX(isp)) {
>+	if (IS_28XX(isp)) {
>+//		base = 0x7fad0000;	/* 0x7f7d0000 + 0x300000 */
>+		fcparam *fcp = FCPARAM(isp, 0);
>+		base = fcp->flash_data_addr + addr;
>+		addr = 0;
>+	} else if (IS_26XX(isp)) {
> 		base = 0x7fe7c000;	/* XXX: Observation, may be wrong. */
> 	} else if (IS_25XX(isp)) {
> 		base = 0x7ff00000 | 0x48000;
>@@ -4435,3 +4478,267 @@ isp_parse_nvram_2400(ispsoftc_t *isp, uint8_t *nvram_data)
> 	fcp->isp_xfwoptions = ISP2400_NVRAM_FIRMWARE_OPTIONS2(nvram_data);
> 	fcp->isp_zfwoptions = ISP2400_NVRAM_FIRMWARE_OPTIONS3(nvram_data);
> }
>+
>+static int
>+isp_read_flthdr_28xx(ispsoftc_t *isp)
>+{
>+	int retval = 0;
>+	uint32_t addr, lwrds, *dptr;
>+	uint16_t csum;
>+	uint8_t flthdr_data[FLT_HEADER_SIZE];
>+
>+	addr = ISP28XX_FLT_ADDR;
>+	dptr = (uint32_t *) flthdr_data;
>+
>+	isp_prt(isp, ISP_LOGDEBUG0,
>+	    "FLTL[DEF]: 0x%x", ISP28XX_FLT_ADDR);
>+	for (lwrds = 0; lwrds < FLT_HEADER_SIZE >> 2; lwrds++) {
>+		isp_rd_28xx_flthdr(isp, addr++, dptr++);
>+	}
>+	dptr = (uint32_t *) flthdr_data;
>+	for (csum = 0, lwrds = 0; lwrds < FLT_HEADER_SIZE >> 4; lwrds++) {
>+		uint16_t tmp;
>+		ISP_IOXGET_16(isp, &dptr[lwrds], tmp);
>+		csum += tmp;
>+	}
>+	if (csum != 0) {
>+		retval = -1;
>+		goto out;
>+	}
>+	isp_parse_flthdr_28xx(isp, flthdr_data);
>+out:
>+	return (retval);
>+}
>+
>+static void
>+isp_rd_28xx_flthdr(ispsoftc_t *isp, uint32_t addr, uint32_t *rp)
>+{
>+	fcparam *fcp = FCPARAM(isp, 0);
>+	int loops = 0;
>+	uint32_t base = fcp->flash_data_addr;
>+	uint32_t tmp = 0;
>+
>+	ISP_WRITE(isp, BIU2400_FLASH_ADDR, base | addr);
>+	for (loops = 0; loops < 5000; loops++) {
>+		ISP_DELAY(10);
>+		tmp = ISP_READ(isp, BIU2400_FLASH_ADDR);
>+		if ((tmp & (1U << 31)) != 0) {
>+			break;
>+		}
>+	}
>+	if (tmp & (1U << 31)) {
>+		*rp = ISP_READ(isp, BIU2400_FLASH_DATA);
>+		ISP_SWIZZLE_NVRAM_LONG(isp, rp);
>+	} else {
>+		*rp = 0xffffffff;
>+	}
>+}
>+
>+static void
>+isp_parse_flthdr_28xx(ispsoftc_t *isp, uint8_t *flthdr_data)
>+{
>+	fcparam *fcp = FCPARAM(isp, 0);
>+	uint16_t ver, csum;
>+
>+	ver = le16toh((uint16_t) (ISP28XX_FLT_VERSION(flthdr_data)));
>+	fcp->flt_length = le16toh((uint16_t) (ISP28XX_FLT_LENGTH(flthdr_data)));
>+	csum = le16toh((uint16_t) (ISP28XX_FLT_CSUM(flthdr_data)));
>+
>+	if ((fcp->flt_length == 0 ) ||
>+	    (fcp->flt_length > (FLT_HEADER_SIZE + FLT_REGIONS_SIZE))) {
>+		isp_prt(isp, ISP_LOGWARN,
>+		    "FLT[DEF]: Invalid length=0x%x(%d)",
>+		    fcp->flt_length, fcp->flt_length);
>+	}
>+	isp_prt(isp, ISP_LOGDEBUG0,
>+	    "FLT[DEF]: version=0x%x length=0x%x(%d) checksum=0x%x",
>+	    ver, fcp->flt_length, fcp->flt_length, csum);
>+}
>+
>+static int
>+isp_read_flt_28xx(ispsoftc_t *isp)
>+{
>+	fcparam *fcp = FCPARAM(isp, 0);
>+	int retval = 0;
>+	int len = fcp->flt_length - FLT_HEADER_SIZE;
>+	uint32_t addr, lwrds, *dptr;
>+	uint8_t flt_data[len];
>+	fcp->flt_region_entries = len / FLT_REGION_SIZE;
>+
>+	addr = ISP28XX_FLT_ADDR + (FLT_HEADER_SIZE >> 2);
>+	dptr = (uint32_t *) flt_data;
>+	isp_prt(isp, ISP_LOGDEBUG0, "FLT[DEF]: regions=%d",
>+	    fcp->flt_region_entries);
>+	for (lwrds = 0; lwrds < len >> 2; lwrds++) {
>+		isp_rd_28xx_flt(isp, addr++, dptr++);
>+	}
>+	retval = isp_parse_flt_28xx(isp, flt_data);
>+	return (retval);
>+}
>+
>+static void
>+isp_rd_28xx_flt(ispsoftc_t *isp, uint32_t addr, uint32_t *rp)
>+{
>+	fcparam *fcp = FCPARAM(isp, 0);
>+	int loops = 0;
>+	uint32_t base = fcp->flash_data_addr;
>+	uint32_t tmp = 0;
>+
>+	ISP_WRITE(isp, BIU2400_FLASH_ADDR, base | addr);
>+	for (loops = 0; loops < 5000; loops++) {
>+		ISP_DELAY(10);
>+		tmp = ISP_READ(isp, BIU2400_FLASH_ADDR);
>+		if ((tmp & (1U << 31)) != 0) {
>+			break;
>+		}
>+	}
>+	if (tmp & (1U << 31)) {
>+		*rp = ISP_READ(isp, BIU2400_FLASH_DATA);
>+		ISP_SWIZZLE_NVRAM_LONG(isp, rp);
>+	} else {
>+		*rp = 0xffffffff;
>+	}
>+}
>+
>+static int
>+isp_parse_flt_28xx(ispsoftc_t *isp, uint8_t *flt_data)
>+{
>+	fcparam *fcp = FCPARAM(isp, 0);
>+	int count;
>+	struct flt_region region[fcp->flt_region_entries];
>+
>+	for (count = 0; count < fcp->flt_region_entries; count++) {
>+		region[count].code =
>+		    le16toh((uint16_t) (ISP28XX_FLT_REG_CODE(flt_data, count)));
>+		region[count].attribute =
>+		    (uint8_t) (ISP28XX_FLT_REG_ATTR(flt_data, count));
>+		region[count].reserved =
>+		    (uint8_t) (ISP28XX_FLT_REG_RES(flt_data, count));
>+		region[count].size =
>+		    le32toh((uint32_t) (ISP28XX_FLT_REG_SIZE(flt_data, count)) >> 2);
>+		region[count].start =
>+		    le32toh((uint32_t) (ISP28XX_FLT_REG_START(flt_data, count)) >> 2);
>+		region[count].end =
>+		    le32toh((uint32_t) (ISP28XX_FLT_REG_END(flt_data, count)) >> 2);
>+
>+		isp_prt(isp, ISP_LOGDEBUG0,
>+		    "FLT[0x%x]: start=0x%x end=0x%x size=0x%x attribute=0x%x",
>+		    region[count].code, region[count].start, region[count].end,
>+		    region[count].size, region[count].attribute);
>+
>+		switch(region[count].code) {
>+		case FLT_REG_FW:
>+			fcp->flt_region_fw = region[count].start;
>+			break;
>+		case FLT_REG_BOOT_CODE:
>+			fcp->flt_region_boot = region[count].start;
>+			break;
>+		case FLT_REG_VPD_0:
>+			fcp->flt_region_vpd_nvram = region[count].start;
>+			if (isp->isp_port == 0)
>+				fcp->flt_region_vpd = region[count].start;
>+			break;
>+		case FLT_REG_VPD_1:
>+			if (isp->isp_port == 1)
>+				fcp->flt_region_vpd = region[count].start;
>+			break;
>+		case FLT_REG_VPD_2:
>+			if (isp->isp_port == 2)
>+				fcp->flt_region_vpd = region[count].start;
>+			break;
>+		case FLT_REG_VPD_3:
>+			if (isp->isp_port == 3)
>+				fcp->flt_region_vpd = region[count].start;
>+			break;
>+		case FLT_REG_NVRAM_0:
>+			if (isp->isp_port == 0)
>+				fcp->flt_region_nvram = region[count].start;
>+			break;
>+		case FLT_REG_NVRAM_1:
>+			if (isp->isp_port == 1)
>+				fcp->flt_region_nvram = region[count].start;
>+			break;
>+		case FLT_REG_NVRAM_2:
>+			if (isp->isp_port == 2)
>+				fcp->flt_region_nvram = region[count].start;
>+			break;
>+		case FLT_REG_NVRAM_3:
>+			if (isp->isp_port == 3)
>+				fcp->flt_region_nvram = region[count].start;
>+			break;
>+		case FLT_REG_FDT:
>+			fcp->flt_region_fdt = region[count].start;
>+			break;
>+		case FLT_REG_FLT:
>+			fcp->flt_region_flt = region[count].start;
>+			break;
>+		case FLT_REG_NPIV_CONF_0:
>+			if (isp->isp_port == 0)
>+				fcp->flt_region_npiv_conf = region[count].start;
>+			break;
>+		case FLT_REG_NPIV_CONF_1:
>+			if (isp->isp_port == 1)
>+				fcp->flt_region_npiv_conf = region[count].start;
>+			break;
>+		case FLT_REG_GOLD_FW:
>+			fcp->flt_region_gold_fw = region[count].start;
>+			break;
>+		case FLT_REG_FCP_PRIO_0:
>+			if (isp->isp_port == 0)
>+				fcp->flt_region_fcp_prio = region[count].start;
>+			break;
>+		case FLT_REG_FCP_PRIO_1:
>+			if (isp->isp_port == 1)
>+				fcp->flt_region_fcp_prio = region[count].start;
>+			break;
>+		case FLT_REG_AUX_IMG_PRI_28XX:
>+			fcp->flt_region_aux_img_status_pri = region[count].start;
>+			break;
>+		case FLT_REG_AUX_IMG_SEC_28XX:
>+			fcp->flt_region_aux_img_status_sec = region[count].start;
>+			break;
>+		case FLT_REG_NVRAM_SEC_28XX_0:
>+			if (isp->isp_port == 0)
>+				fcp->flt_region_nvram_sec = region[count].start;
>+			break;
>+		case FLT_REG_NVRAM_SEC_28XX_1:
>+			if (isp->isp_port == 1)
>+				fcp->flt_region_nvram_sec = region[count].start;
>+			break;
>+		case FLT_REG_NVRAM_SEC_28XX_2:
>+			if (isp->isp_port == 2)
>+				fcp->flt_region_nvram_sec = region[count].start;
>+			break;
>+		case FLT_REG_NVRAM_SEC_28XX_3:
>+			if (isp->isp_port == 3)
>+				fcp->flt_region_nvram_sec = region[count].start;
>+			break;
>+		case FLT_REG_VPD_SEC_28XX_0:
>+			fcp->flt_region_vpd_nvram_sec = region[count].start;
>+			if (isp->isp_port == 0)
>+				fcp->flt_region_vpd_sec = region[count].start;
>+			break;
>+		case FLT_REG_VPD_SEC_28XX_1:
>+			if (isp->isp_port == 1)
>+				fcp->flt_region_vpd_sec = region[count].start;
>+			break;
>+		case FLT_REG_VPD_SEC_28XX_2:
>+			if (isp->isp_port == 2)
>+				fcp->flt_region_vpd_sec = region[count].start;
>+			break;
>+		case FLT_REG_VPD_SEC_28XX_3:
>+			if (isp->isp_port == 3)
>+				fcp->flt_region_vpd_sec = region[count].start;
>+			break;
>+		}
>+	}
>+	isp_prt(isp, ISP_LOGDEBUG0,
>+	    "FLT[FLT]: boot=0x%x fw=0x%x vpd_nvram=0x%x vpd=0x%x nvram 0x%x "
>+	    "fdt=0x%x flt=0x%x npiv=0x%x fcp_prif_cfg=0x%x",
>+	    fcp->flt_region_boot, fcp->flt_region_fw, fcp->flt_region_vpd_nvram,
>+	    fcp->flt_region_vpd, fcp->flt_region_nvram, fcp->flt_region_fdt,
>+	    fcp->flt_region_flt, fcp->flt_region_npiv_conf,
>+	    fcp->flt_region_fcp_prio);
>+
>+	return (0);
>+}
>diff --git a/sys/dev/isp/isp_pci.c b/sys/dev/isp/isp_pci.c
>index 01028ae14..a78486785 100644
>--- a/sys/dev/isp/isp_pci.c
>+++ b/sys/dev/isp/isp_pci.c
>@@ -99,6 +99,16 @@ static struct ispmdvec mdvec_2700 = {
> 	NULL
> };
> 
>+static struct ispmdvec mdvec_2800 = {
>+	isp_pci_run_isr_2400,
>+	isp_pci_rd_reg_2600,
>+	isp_pci_wr_reg_2600,
>+	isp_pci_mbxdma,
>+	isp_send_cmd,
>+	isp_pci_irqsetup,
>+	NULL
>+};
>+
> #ifndef	PCIM_CMD_INVEN
> #define	PCIM_CMD_INVEN			0x10
> #endif
>@@ -143,6 +153,8 @@ static struct ispmdvec mdvec_2700 = {
> #define	PCI_PRODUCT_QLOGIC_ISP2692	0x2b61
> #define	PCI_PRODUCT_QLOGIC_ISP2714	0x2071
> #define	PCI_PRODUCT_QLOGIC_ISP2722	0x2261
>+#define	PCI_PRODUCT_QLOGIC_ISP2812	0x2281
>+#define	PCI_PRODUCT_QLOGIC_ISP2814	0x2081
> 
> #define	PCI_QLOGIC_ISP2422	\
> 	((PCI_PRODUCT_QLOGIC_ISP2422 << 16) | PCI_VENDOR_QLOGIC)
>@@ -164,6 +176,10 @@ static struct ispmdvec mdvec_2700 = {
> 	((PCI_PRODUCT_QLOGIC_ISP2714 << 16) | PCI_VENDOR_QLOGIC)
> #define	PCI_QLOGIC_ISP2722	\
> 	((PCI_PRODUCT_QLOGIC_ISP2722 << 16) | PCI_VENDOR_QLOGIC)
>+#define	PCI_QLOGIC_ISP2812	\
>+	((PCI_PRODUCT_QLOGIC_ISP2812 << 16) | PCI_VENDOR_QLOGIC)
>+#define	PCI_QLOGIC_ISP2814	\
>+	((PCI_PRODUCT_QLOGIC_ISP2814 << 16) | PCI_VENDOR_QLOGIC)
> 
> #define	PCI_DFLT_LTNCY	0x40
> #define	PCI_DFLT_LNSZ	0x10
>@@ -245,6 +261,12 @@ isp_pci_probe(device_t dev)
> 	case PCI_QLOGIC_ISP2722:
> 		device_set_desc(dev, "Qlogic ISP 2722 PCI FC Adapter");
> 		break;
>+	case PCI_QLOGIC_ISP2812:
>+		device_set_desc(dev, "Qlogic ISP 2812 PCI FC Adapter");
>+		break;
>+	case PCI_QLOGIC_ISP2814:
>+		device_set_desc(dev, "Qlogic ISP 2814 PCI FC Adapter");
>+		break;
> 	default:
> 		return (ENXIO);
> 	}
>@@ -493,6 +515,12 @@ isp_pci_attach(device_t dev)
> 		isp->isp_mdvec = &mdvec_2700;
> 		isp->isp_type = ISP_HA_FC_2700;
> 		break;
>+	case PCI_QLOGIC_ISP2812:
>+	case PCI_QLOGIC_ISP2814:
>+		did = 0x2800;
>+		isp->isp_mdvec = &mdvec_2800;
>+		isp->isp_type = ISP_HA_FC_2800;
>+		break;
> 	default:
> 		device_printf(dev, "unknown device type\n");
> 		goto bad;
>diff --git a/sys/dev/isp/ispmbox.h b/sys/dev/isp/ispmbox.h
>index 88bfa8f68..80def0c3c 100644
>--- a/sys/dev/isp/ispmbox.h
>+++ b/sys/dev/isp/ispmbox.h
>@@ -179,6 +179,7 @@
> #define		MBGSD_8GB	0x04		/* 25XX only */
> #define		MBGSD_16GB	0x05		/* 26XX only */
> #define		MBGSD_32GB	0x06		/* 27XX only */
>+#define		MBGSD_64GB	0x07		/* 28XX only */
> #define		MBGSD_10GB	0x13		/* 26XX only */
> #define	MBOX_SEND_RNFT			0x005e
> #define	MBOX_INIT_FIRMWARE		0x0060
>@@ -647,6 +648,7 @@ typedef struct {
> #define	ICB2400_OPT3_RATE_8GB		0x00008000
> #define	ICB2400_OPT3_RATE_16GB		0x0000A000
> #define	ICB2400_OPT3_RATE_32GB		0x0000C000
>+#define	ICB2400_OPT3_RATE_64GB		0x0000E000
> #define	ICB2400_OPT3_ENA_OOF_XFRDY	0x00000200
> #define	ICB2400_OPT3_NO_N2N_LOGI	0x00000100
> #define	ICB2400_OPT3_NO_LOCAL_PLOGI	0x00000080
>@@ -661,6 +663,7 @@ typedef struct {
> #define	ICB_MIN_FRMLEN		256
> #define	ICB_MAX_FRMLEN		2112
> #define	ICB_DFLT_FRMLEN		1024
>+#define	ICB_DFLT_FRMLEN_28XX	2048
> #define	ICB_DFLT_RDELAY		5
> #define	ICB_DFLT_RCOUNT		3
> 
>diff --git a/sys/dev/isp/ispreg.h b/sys/dev/isp/ispreg.h
>index 98b9a6c0b..2d35c430f 100644
>--- a/sys/dev/isp/ispreg.h
>+++ b/sys/dev/isp/ispreg.h
>@@ -252,4 +252,85 @@ typedef struct {
> #define	ISP2400_NVRAM_FIRMWARE_OPTIONS3(c)	\
> 	((c)[52] | ((c)[53] << 8) | ((c)[54] << 16) | ((c)[55] << 24))
> 
>+/*
>+ * Qlogic FLT
>+ */
>+#define ISP24XX_BASE_ADDR	0x7ff00000
>+#define ISP24XX_FLT_ADDR	0x11400
>+
>+#define ISP25XX_BASE_ADDR	ISP24XX_BASE_ADDR
>+#define ISP25XX_FLT_ADDR	0x50400
>+
>+#define ISP27XX_BASE_ADDR	0x7f800000
>+#define ISP27XX_FLT_ADDR	(0x3F1000/4)
>+
>+#define ISP28XX_BASE_ADDR	0x7f7d0000
>+#define ISP28XX_FLT_ADDR	(0x11000/4)
>+
>+#define FLT_HEADER_SIZE		8
>+#define FLT_REGION_SIZE		16
>+#define FLT_MAX_REGIONS		0xFF
>+#define FLT_REGIONS_SIZE	(FLT_REGION_SIZE * FLT_MAX_REGIONS)
>+
>+#define ISP28XX_FLT_VERSION(c)		((c)[0] | ((c)[1] << 8))
>+#define ISP28XX_FLT_LENGTH(c)		((c)[2] | ((c)[3] << 8))
>+#define ISP28XX_FLT_CSUM(c)		((c)[4] | ((c)[5] << 8))
>+#define ISP28XX_FLT_REG_CODE(c, o)	\
>+	((c)[0 + FLT_REGION_SIZE * o] | ((c)[1 + FLT_REGION_SIZE * o] << 8))
>+#define ISP28XX_FLT_REG_ATTR(c, o)	((c)[2 + FLT_REGION_SIZE * o])
>+#define ISP28XX_FLT_REG_RES(c, o)	((c)[3 + FLT_REGION_SIZE * o])
>+#define ISP28XX_FLT_REG_SIZE(c, o)	(\
>+		((uint32_t)(c)[4 + FLT_REGION_SIZE * o] << 0) | \
>+		((uint32_t)(c)[5 + FLT_REGION_SIZE * o] << 8) | \
>+		((uint32_t)(c)[6 + FLT_REGION_SIZE * o] << 16) | \
>+		((uint32_t)(c)[7 + FLT_REGION_SIZE * o] << 24))
>+#define ISP28XX_FLT_REG_START(c, o)	(\
>+		((uint32_t)(c)[8 + FLT_REGION_SIZE * o] << 0) | \
>+		((uint32_t)(c)[9 + FLT_REGION_SIZE * o] << 8) | \
>+		((uint32_t)(c)[10 + FLT_REGION_SIZE * o] << 16) | \
>+		((uint32_t)(c)[11 + FLT_REGION_SIZE * o] << 24))
>+#define ISP28XX_FLT_REG_END(c, o)	(\
>+		((uint32_t)(c)[12 + FLT_REGION_SIZE * o] << 0) | \
>+		((uint32_t)(c)[13 + FLT_REGION_SIZE * o] << 8) | \
>+		((uint32_t)(c)[14 + FLT_REGION_SIZE * o] << 16) | \
>+		((uint32_t)(c)[15 + FLT_REGION_SIZE * o] << 24))
>+
>+struct flt_region {
>+	uint16_t  code;
>+	uint8_t attribute;
>+	uint8_t reserved;
>+	uint32_t size;
>+	uint32_t start;
>+	uint32_t end;
>+};
>+
>+#define FLT_REG_FW		0x01
>+#define FLT_REG_BOOT_CODE	0x07
>+#define FLT_REG_VPD_0		0x14
>+#define FLT_REG_NVRAM_0		0x15
>+#define FLT_REG_VPD_1		0x16
>+#define FLT_REG_NVRAM_1		0x17
>+#define FLT_REG_VPD_2		0xd4
>+#define FLT_REG_NVRAM_2		0xd5
>+#define FLT_REG_VPD_3		0xd6
>+#define FLT_REG_NVRAM_3		0xd7
>+#define FLT_REG_FDT		0x1a
>+#define FLT_REG_FLT		0x1c
>+#define FLT_REG_NPIV_CONF_0	0x29
>+#define FLT_REG_NPIV_CONF_1	0x2a
>+#define FLT_REG_GOLD_FW		0x2f
>+#define FLT_REG_FCP_PRIO_0	0x87
>+#define FLT_REG_FCP_PRIO_1	0x88
>+
>+#define FLT_REG_AUX_IMG_PRI_28XX	0x125
>+#define FLT_REG_AUX_IMG_SEC_28XX	0x126
>+#define FLT_REG_NVRAM_SEC_28XX_0	0x10d
>+#define FLT_REG_NVRAM_SEC_28XX_1	0x10f
>+#define FLT_REG_NVRAM_SEC_28XX_2	0x111
>+#define FLT_REG_NVRAM_SEC_28XX_3	0x113
>+#define FLT_REG_VPD_SEC_28XX_0		0x10c
>+#define FLT_REG_VPD_SEC_28XX_1		0x10e
>+#define FLT_REG_VPD_SEC_28XX_2		0x110
>+#define FLT_REG_VPD_SEC_28XX_3		0x112
>+
> #endif	/* _ISPREG_H */
>diff --git a/sys/dev/isp/ispvar.h b/sys/dev/isp/ispvar.h
>index eae81f6ac..536168f58 100644
>--- a/sys/dev/isp/ispvar.h
>+++ b/sys/dev/isp/ispvar.h
>@@ -369,6 +369,28 @@ typedef struct {
> 	int			isp_use_gft_id;		/* Use GFT_ID */
> 	int			isp_use_gff_id;		/* Use GFF_ID */
> 
>+	uint32_t		flash_data_addr;
>+	/*
>+	 * FLT
>+	 */
>+	uint16_t		flt_length;
>+	uint32_t		flt_region_entries;
>+	uint32_t		flt_region_aux_img_status_pri;
>+	uint32_t		flt_region_aux_img_status_sec;
>+	uint32_t		flt_region_boot;
>+	uint32_t		flt_region_fcp_prio;
>+	uint32_t		flt_region_fdt;
>+	uint32_t		flt_region_flt;
>+	uint32_t		flt_region_fw;
>+	uint32_t		flt_region_gold_fw;
>+	uint32_t		flt_region_npiv_conf;
>+	uint32_t		flt_region_nvram;
>+	uint32_t		flt_region_nvram_sec;
>+	uint32_t		flt_region_vpd;
>+	uint32_t		flt_region_vpd_nvram;
>+	uint32_t		flt_region_vpd_nvram_sec;
>+	uint32_t		flt_region_vpd_sec;
>+
> 	/*
> 	 * Current active WWNN/WWPN
> 	 */
>@@ -539,6 +561,7 @@ struct ispsoftc {
> #define	ISP_CFG_8GB		0x4000	/* force 8Gb connection (25XX only) */
> #define	ISP_CFG_16GB		0x8000	/* force 16Gb connection (26XX only) */
> #define	ISP_CFG_32GB		0x10000	/* force 32Gb connection (27XX only) */
>+#define	ISP_CFG_64GB		0x20000	/* force 64Gb connection (28XX only) */
> 
> /*
>  * For each channel, the outer layers should know what role that channel
>@@ -607,10 +630,12 @@ struct ispsoftc {
> #define	ISP_HA_FC_2500		0x05
> #define	ISP_HA_FC_2600		0x06
> #define	ISP_HA_FC_2700		0x07
>+#define	ISP_HA_FC_2800		0x08
> 
> #define	IS_25XX(isp)	((isp)->isp_type >= ISP_HA_FC_2500)
> #define	IS_26XX(isp)	((isp)->isp_type >= ISP_HA_FC_2600)
> #define	IS_27XX(isp)	((isp)->isp_type >= ISP_HA_FC_2700)
>+#define	IS_28XX(isp)	((isp)->isp_type >= ISP_HA_FC_2800)
> 
> /*
>  * DMA related macros

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Attachments on bug 271062: 241735 | 241743 | 241807 | 241908 | 241948 | 241964