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(-)sys/isa/fd.c (-8 / +14 lines)
Lines 563-575 Link Here
563
			return fdc_err(fdc, "Enable FIFO failed\n");
563
			return fdc_err(fdc, "Enable FIFO failed\n");
564
		
564
		
565
		/* If command is invalid, return */
565
		/* If command is invalid, return */
566
		j = 100000;
566
		j = FDSTS_TIMEOUT;
567
		while ((i = fdsts_rd(fdc) & (NE7_DIO | NE7_RQM))
567
		while ((i = fdsts_rd(fdc) & (NE7_DIO | NE7_RQM))
568
		       != NE7_RQM && j-- > 0)
568
		       != NE7_RQM && j-- > 0) {
569
			if (i == (NE7_DIO | NE7_RQM)) {
569
			if (i == (NE7_DIO | NE7_RQM)) {
570
				fdc_reset(fdc);
570
				fdc_reset(fdc);
571
				return FD_FAILED;
571
				return FD_FAILED;
572
			}
572
			}
573
			DELAY(1);
574
		}
573
		if (j<0 || 
575
		if (j<0 || 
574
		    fd_cmd(fdc, 3,
576
		    fd_cmd(fdc, 3,
575
			   0, (fifo_threshold - 1) & 0xf, 0, 0) < 0) {
577
			   0, (fifo_threshold - 1) & 0xf, 0, 0) < 0) {
Lines 1473-1483 Link Here
1473
static int
1475
static int
1474
fd_in(struct fdc_data *fdc, int *ptr)
1476
fd_in(struct fdc_data *fdc, int *ptr)
1475
{
1477
{
1476
	int i, j = 100000;
1478
	int i, j = FDSTS_TIMEOUT;
1477
	while ((i = fdsts_rd(fdc) & (NE7_DIO|NE7_RQM))
1479
	while ((i = fdsts_rd(fdc) & (NE7_DIO|NE7_RQM))
1478
		!= (NE7_DIO|NE7_RQM) && j-- > 0)
1480
		!= (NE7_DIO|NE7_RQM) && j-- > 0) {
1479
		if (i == NE7_RQM)
1481
		if (i == NE7_RQM)
1480
			return fdc_err(fdc, "ready for output in input\n");
1482
			return fdc_err(fdc, "ready for output in input\n");
1483
		DELAY(1);
1484
	}
1481
	if (j <= 0)
1485
	if (j <= 0)
1482
		return fdc_err(fdc, bootverbose? "input ready timeout\n": 0);
1486
		return fdc_err(fdc, bootverbose? "input ready timeout\n": 0);
1483
#ifdef	FDC_DEBUG
1487
#ifdef	FDC_DEBUG
Lines 1499-1511 Link Here
1499
	int i;
1503
	int i;
1500
1504
1501
	/* Check that the direction bit is set */
1505
	/* Check that the direction bit is set */
1502
	i = 100000;
1506
	i = FDSTS_TIMEOUT;
1503
	while ((fdsts_rd(fdc) & NE7_DIO) && i-- > 0);
1507
	while ((fdsts_rd(fdc) & NE7_DIO) && i-- > 0)
1508
		DELAY(1);
1504
	if (i <= 0) return fdc_err(fdc, "direction bit not set\n");
1509
	if (i <= 0) return fdc_err(fdc, "direction bit not set\n");
1505
1510
1506
	/* Check that the floppy controller is ready for a command */
1511
	/* Check that the floppy controller is ready for a command */
1507
	i = 100000;
1512
	i = FDSTS_TIMEOUT;
1508
	while ((fdsts_rd(fdc) & NE7_RQM) == 0 && i-- > 0);
1513
	while ((fdsts_rd(fdc) & NE7_RQM) == 0 && i-- > 0)
1514
		DELAY(1);
1509
	if (i <= 0)
1515
	if (i <= 0)
1510
		return fdc_err(fdc, bootverbose? "output ready timeout\n": 0);
1516
		return fdc_err(fdc, bootverbose? "output ready timeout\n": 0);
1511
1517
(-)sys/isa/fdreg.h (+1 lines)
Lines 69-71 Link Here
69
#define	FDI_DCHG	0x80	/* diskette has been changed */
69
#define	FDI_DCHG	0x80	/* diskette has been changed */
70
				/* requires drive and motor being selected */
70
				/* requires drive and motor being selected */
71
				/* is cleared by any step pulse to drive */
71
				/* is cleared by any step pulse to drive */
72
#define	FDSTS_TIMEOUT	200	/* fdsts_rd() timeout */

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