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(-)b/sys/arm/conf/OPENRD-CL (+81 lines)
Added Link Here
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#
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# Custom kernel for OpenRD Client/Ultimate devices.
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#
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# $FreeBSD$
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#
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ident		OPENRD-CL
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include		"../mv/kirkwood/std.sheevaplug"
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options 	SOC_MV_KIRKWOOD
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makeoptions	MODULES_OVERRIDE=""
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makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
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makeoptions	WERROR="-Werror"
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makeoptions     INVARIANTS
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options 	SCHED_4BSD		#4BSD scheduler
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options 	INET			#InterNETworking
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options 	INET6			#IPv6 communications protocols
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options 	FFS			#Berkeley Fast Filesystem
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options 	NFSCL			#New Network Filesystem Client
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options 	NFSLOCKD		#Network Lock Manager
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options 	NFS_ROOT		#NFS usable as /, requires NFSCL
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options 	BOOTP
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options 	BOOTP_NFSROOT
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options 	BOOTP_NFSV3
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options 	BOOTP_WIRED_TO=mge0
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# Root fs on USB device
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#options 	ROOTDEVNAME=\"ufs:/dev/da0a\"
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options 	SYSVSHM			#SYSV-style shared memory
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options 	SYSVMSG			#SYSV-style message queues
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options 	SYSVSEM			#SYSV-style semaphores
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options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
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options 	MUTEX_NOINLINE
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options 	RWLOCK_NOINLINE
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options 	NO_FFS_SNAPSHOT
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options 	NO_SWAPPING
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# Debugging
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options 	ALT_BREAK_TO_DEBUGGER
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options 	DDB
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options 	KDB
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# Pseudo devices
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device		random
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device		pty
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device		loop
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# Serial ports
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device		uart
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# Networking
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device		ether
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device		mge			# Marvell Gigabit Ethernet controller
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device		mii
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device		e1000phy
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device		bpf
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options		HZ=1000
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options		DEVICE_POLLING
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device		vlan
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device		cesa			# Marvell security engine
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device		crypto
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device		cryptodev
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# USB
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options 	USB_DEBUG	# enable debug msgs
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device		usb
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device		ehci
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device		umass
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device		scbus
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device		pass
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device		da
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# Flattened Device Tree
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options 	FDT
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options		FDT_DTB_STATIC
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makeoptions	FDT_DTS_FILE=openrd-cl.dts
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(-)b/sys/boot/fdt/dts/openrd-cl.dts (+340 lines)
Added Link Here
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/*
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 * Copyright (c) 2009-2010 The FreeBSD Foundation
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 * All rights reserved.
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 *
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 * This software was developed by Semihalf under sponsorship from
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 * the FreeBSD Foundation.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * 1. Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in the
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 *    documentation and/or other materials provided with the distribution.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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 * SUCH DAMAGE.
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 *
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 * OpenRD-Client/Ultimate Device Tree Source.
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 *
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 * $FreeBSD$
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 */
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/dts-v1/;
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/ {
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	model = "mrvl,OpenRD-CL";
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	compatible = "OpenRD-CL";
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	#address-cells = <1>;
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	#size-cells = <1>;
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	aliases {
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		ethernet0 = &enet0;
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		ethernet1 = &enet1;
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		mpp = &MPP;
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		pci0 = &pci0;
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		serial0 = &serial0;
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		serial1 = &serial1;
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		soc = &SOC;
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		sram = &SRAM;
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	};
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	cpus {
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		#address-cells = <1>;
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		#size-cells = <0>;
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		cpu@0 {
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			device_type = "cpu";
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			compatible = "ARM,88FR131";
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			reg = <0x0>;
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			d-cache-line-size = <32>;	// 32 bytes
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			i-cache-line-size = <32>;	// 32 bytes
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			d-cache-size = <0x4000>;	// L1, 16K
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			i-cache-size = <0x4000>;	// L1, 16K
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			timebase-frequency = <0>;
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			bus-frequency = <0>;
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			clock-frequency = <0>;
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		};
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	};
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	memory {
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		device_type = "memory";
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		reg = <0x0 0x20000000>;		// 512M at 0x0
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	};
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	localbus@f1000000 {
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		#address-cells = <2>;
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		#size-cells = <1>;
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		compatible = "mrvl,lbc";
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		/* This reflects CPU decode windows setup. */
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		ranges = <0x0 0x0f 0xf9300000 0x00100000
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			  0x1 0x1e 0xfa000000 0x00100000
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			  0x2 0x1d 0xfa100000 0x02000000
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			  0x3 0x1b 0xfc100000 0x00000400>;
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		nor@0,0 {
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			#address-cells = <1>;
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			#size-cells = <1>;
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			compatible = "cfi-flash";
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			reg = <0x0 0x0 0x00100000>;
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			bank-width = <2>;
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			device-width = <1>;
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		};
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		led@1,0 {
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			#address-cells = <1>;
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			#size-cells = <1>;
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			compatible = "led";
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			reg = <0x1 0x0 0x00100000>;
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		};
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		nor@2,0 {
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			#address-cells = <1>;
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			#size-cells = <1>;
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			compatible = "cfi-flash";
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			reg = <0x2 0x0 0x02000000>;
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			bank-width = <2>;
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			device-width = <1>;
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		};
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		nand@3,0 {
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			#address-cells = <1>;
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			#size-cells = <1>;
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			reg = <0x3 0x0 0x00100000>;
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			bank-width = <2>;
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			device-width = <1>;
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		};
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	};
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	SOC: soc88f6281@f1000000 {
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		#address-cells = <1>;
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		#size-cells = <1>;
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		compatible = "simple-bus";
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		ranges = <0x0 0xf1000000 0x00100000>;
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		bus-frequency = <0>;
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		PIC: pic@20200 {
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			interrupt-controller;
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			#address-cells = <0>;
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			#interrupt-cells = <1>;
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			reg = <0x20200 0x3c>;
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			compatible = "mrvl,pic";
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		};
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		timer@20300 {
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			compatible = "mrvl,timer";
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			reg = <0x20300 0x30>;
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			interrupts = <1>;
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			interrupt-parent = <&PIC>;
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			mrvl,has-wdt;
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		};
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		MPP: mpp@10000 {
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			#pin-cells = <2>;
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			compatible = "mrvl,mpp";
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			reg = <0x10000 0x34>;
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			pin-count = <50>;
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			pin-map = <
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				0  1		/* MPP[0]:  NF_IO[2] */
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				1  1		/* MPP[1]:  NF_IO[3] */
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				2  1		/* MPP[2]:  NF_IO[4] */
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				3  1		/* MPP[3]:  NF_IO[5] */
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				4  1		/* MPP[4]:  NF_IO[6] */
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				5  1		/* MPP[5]:  NF_IO[7] */
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				6  1		/* MPP[6]:  SYSRST_OUTn */
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				8  2		/* MPP[8]:  UA0_RTS */
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				9  2		/* MPP[9]:  UA0_CTS */
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				10 3		/* MPP[10]: UA0_TXD */
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				11 3		/* MPP[11]: UA0_RXD */
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				12 1		/* MPP[12]: SD_CLK */
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				13 1		/* MPP[13]: SD_CMD */
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				14 1		/* MPP[14]: SD_D[0] */
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				15 1		/* MPP[15]: SD_D[1] */
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				16 1		/* MPP[16]: SD_D[2] */
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				17 1		/* MPP[17]: SD_D[3] */
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				20 3            /* MPP[20]: GE1_CPU_RX0 */
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				21 3            /* MPP[21]: GE1_CPU_RX1 */
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				22 3            /* MPP[22]: GE1_CPU_RX2 */
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				23 3            /* MPP[23]: GE1_CPU_RX3 */
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				24 3            /* MPP[24]: GE1_CPU_TX0 */
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				25 3            /* MPP[25]: GE1_CPU_TX1 */
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				26 3            /* MPP[26]: GE1_CPU_TX2 */
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				27 3            /* MPP[27]: GE1_CPU_RD3 */
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				28 0            /* MPP[28]: GPIO */
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				29 0            /* MPP[29]: GPIO */
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				30 3            /* GE1_RXCTL */
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				31 3            /* GE1_RXCLK */
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				32 3            /* GE1_TXCLK */
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				33 3            /* GE1_TXCTL */
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				34 0 >;         /* MPP[34]: GPIO */
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		};
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		GPIO: gpio@10100 {
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			#gpio-cells = <3>;
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			compatible = "mrvl,gpio";
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			reg = <0x10100 0x20>;
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			gpio-controller;
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			interrupts = <35 36 37 38 39 40 41>;
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			interrupt-parent = <&PIC>;
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		};
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		rtc@10300 {
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			compatible = "mrvl,rtc";
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			reg = <0x10300 0x08>;
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		};
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		twsi@11000 {
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			#address-cells = <1>;
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			#size-cells = <0>;
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			compatible = "mrvl,twsi";
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			reg = <0x11000 0x20>;
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			interrupts = <43>;
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			interrupt-parent = <&PIC>;
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		};
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		enet0: ethernet@72000 {
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			#address-cells = <1>;
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			#size-cells = <1>;
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			model = "V2";
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			compatible = "mrvl,ge";
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			reg = <0x72000 0x2000>;
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			ranges = <0x0 0x72000 0x2000>;
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			local-mac-address = [ 00 00 00 00 00 00 ];
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			interrupts = <12 13 14 11 46>;
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			interrupt-parent = <&PIC>;
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			phy-handle = <&phy0>;
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			mdio@0 {
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				#address-cells = <1>;
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				#size-cells = <0>;
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				compatible = "mrvl,mdio";
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				phy0: ethernet-phy@0 {
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					reg = <0x0>;
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				};
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				phy1: ethernet-phy@1 {
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					reg = <0x1>;
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				};
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			};
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		};
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		enet1: ethernet@76000 {
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			#address-cells = <1>;
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			#size-cells = <1>;
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			model = "V2";
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			compatible = "mrvl,ge";
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			reg = <0x76000 0x2000>;
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			ranges = <0x0 0x76000 0x2000>;
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			local-mac-address = [ 00 00 00 00 00 00 ];
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			interrupts = <16 17 18 15 47>;
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			interrupt-parent = <&PIC>;
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			phy-handle = <&phy1>;
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		};
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		serial0: serial@12000 {
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			compatible = "ns16550";
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			reg = <0x12000 0x20>;
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			reg-shift = <2>;
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			clock-frequency = <0>;
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			interrupts = <33>;
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			interrupt-parent = <&PIC>;
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		};
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		serial1: serial@12100 {
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			compatible = "ns16550";
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			reg = <0x12100 0x20>;
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			reg-shift = <2>;
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			clock-frequency = <0>;
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			interrupts = <34>;
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			interrupt-parent = <&PIC>;
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		};
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		crypto@30000 {
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			compatible = "mrvl,cesa";
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			reg = <0x30000 0x10000>;
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			interrupts = <22>;
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			interrupt-parent = <&PIC>;
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			sram-handle = <&SRAM>;
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		};
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		usb@50000 {
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			compatible = "mrvl,usb-ehci", "usb-ehci";
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			reg = <0x50000 0x1000>;
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			interrupts = <48 19>;
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			interrupt-parent = <&PIC>;
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		};
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		xor@60000 {
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			compatible = "mrvl,xor";
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			reg = <0x60000 0x1000>;
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			interrupts = <5 6 7 8>;
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			interrupt-parent = <&PIC>;
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		};
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		sata@80000 {
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			compatible = "mrvl,sata";
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			reg = <0x80000 0x6000>;
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			interrupts = <21>;
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			interrupt-parent = <&PIC>;
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		};
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	};
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	SRAM: sram@fd000000 {
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		compatible = "mrvl,cesa-sram";
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		reg = <0xfd000000 0x00100000>;
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	};
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	chosen {
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		stdin  = "serial0";
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		stdout = "serial0";
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	};
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	pci0: pcie@f1040000 {
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		compatible = "mrvl,pcie";
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		device_type = "pci";
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		#interrupt-cells = <1>;
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		#size-cells = <2>;
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		#address-cells = <3>;
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		reg = <0xf1040000 0x2000>;
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		bus-range = <0 255>;
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		ranges = <0x02000000 0x0 0xf4000000 0xf4000000 0x0 0x04000000
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			  0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>;
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		clock-frequency = <33333333>;
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		interrupt-parent = <&PIC>;
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		interrupts = <44>;
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		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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		interrupt-map = <
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			/* IDSEL 0x1 */
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			0x0800 0x0 0x0 0x1 &PIC 0x9
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			0x0800 0x0 0x0 0x2 &PIC 0x9
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			0x0800 0x0 0x0 0x3 &PIC 0x9
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			0x0800 0x0 0x0 0x4 &PIC 0x9
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			>;
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		pcie@0 {
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			reg = <0x0 0x0 0x0 0x0 0x0>;
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			#size-cells = <2>;
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			#address-cells = <3>;
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			device_type = "pci";
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			ranges = <0x02000000 0x0 0xf4000000
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				  0x02000000 0x0 0xf4000000
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				  0x0 0x04040000
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				  0x01000000 0x0 0x0
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				  0x01000000 0x0 0x0
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				  0x0 0x00100000>;
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		};
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	};
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};
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