FreeBSD Bugzilla – Attachment 119039 Details for
Bug 161498
[patch] ARM RAS code can fail to restart an atomic sequence.
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[patch]
ras-current.diff
ras-current.diff (text/plain), 3.81 KB, created by
Ian Lepore
on 2011-10-11 18:50:02 UTC
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Description:
ras-current.diff
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Creator:
Ian Lepore
Created:
2011-10-11 18:50:02 UTC
Size:
3.81 KB
patch
obsolete
>Index: sys/arm/include/asmacros.h >=================================================================== >RCS file: /local/base/FreeBSD-CVS/src/sys/arm/include/asmacros.h,v >retrieving revision 1.8 >diff -u -p -r1.8 asmacros.h >--- sys/arm/include/asmacros.h 5 Feb 2008 10:22:33 -0000 1.8 >+++ sys/arm/include/asmacros.h 11 Oct 2011 17:02:52 -0000 >@@ -71,9 +71,8 @@ > ldr r0, =ARM_RAS_START; \ > mov r1, #0; \ > str r1, [r0]; \ >- ldr r0, =ARM_RAS_END; \ > mov r1, #0xffffffff; \ >- str r1, [r0]; >+ str r1, [r0, #4]; > > /* > * PULLFRAME - macro to pull a trap frame from the stack in the current mode >@@ -118,23 +117,22 @@ > stmia sp, {r0-r12}; /* Push the user mode registers */ \ > add r0, sp, #(4*13); /* Adjust the stack pointer */ \ > stmia r0, {r13-r14}^; /* Push the user mode registers */ \ >- mov r0, r0; /* NOP for previous instruction */ \ >- ldr r5, =ARM_RAS_START; /* Check if there's any RAS */ \ >- ldr r3, [r5]; \ >- cmp r3, #0; /* Is the update needed ? */ \ >- ldrgt lr, [r0, #16]; \ >- ldrgt r1, =ARM_RAS_END; \ >- ldrgt r4, [r1]; /* Get the end of the RAS */ \ >- movgt r2, #0; /* Reset the magic addresses */ \ >- strgt r2, [r5]; \ >- movgt r2, #0xffffffff; \ >- strgt r2, [r1]; \ >- cmpgt lr, r3; /* Were we in the RAS ? */ \ >- cmpgt r4, lr; \ >- strgt r3, [r0, #16]; /* Yes, update the pc */ \ >- mrs r0, spsr_all; /* Put the SPSR on the stack */ \ >- str r0, [sp, #-4]! >- >+ mov r0, r0; /* NOP for previous instruction */ \ >+ ldr r5, =ARM_RAS_START; /* Retrieve global RAS_END and */ \ >+ ldr r4, [r5, #4]; /* reset it to point at the */ \ >+ cmp r4, #0xffffffff; /* end of memory if necessary; */ \ >+ movne r1, #0xffffffff; /* leave value in r4 for later */ \ >+ strne r1, [r5, #4]; /* comparision against PC. */ \ >+ ldr r3, [r5]; /* Retrieve global RAS_START */ \ >+ cmp r3, #0; /* and reset it if non-zero. */ \ >+ movne r1, #0; /* If non-zero RAS_START and */ \ >+ strne r1, [r5]; /* PC was lower than RAS_END, */ \ >+ ldrne r1, [r0, #16]; /* adjust the saved PC so that */ \ >+ cmpne r4, r1; /* execution later resumes at */ \ >+ strhi r3, [r0, #16]; /* the RAS_START location. */ \ >+ mrs r0, spsr_all; \ >+ str r0, [sp, #-4]! >+ > /* > * PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack > * in SVC32 mode and restore the saved processor mode and PC. > >Index: sys/arm/include/sysarch.h >=================================================================== RCS file: >/local/base/FreeBSD-CVS/src/sys/arm/include/sysarch.h,v retrieving revision 1.6 >diff -u -p -r1.6 sysarch.h >--- sys/arm/include/sysarch.h 12 Feb 2009 23:23:30 -0000 1.6 >+++ sys/arm/include/sysarch.h 11 Oct 2011 17:02:56 -0000 >@@ -42,9 +42,13 @@ > * The ARM_TP_ADDRESS points to a special purpose page, which is used as local > * store for the ARM per-thread data and Restartable Atomic Sequences support. > * Put it just above the "high" vectors' page. >- * the cpu_switch() code assumes ARM_RAS_START is ARM_TP_ADDRESS + 4, and >+ * The cpu_switch() code assumes ARM_RAS_START is ARM_TP_ADDRESS + 4, and > * ARM_RAS_END is ARM_TP_ADDRESS + 8, so if that ever changes, be sure to > * update the cpu_switch() (and cpu_throw()) code as well. >+ * In addition, code in arm/include/atomic.h and arm/include/asmacros.h >+ * assumes that ARM_RAS_END is at ARM_RAS_START+4, so be sure to update those >+ * if ARM_RAS_END moves in relation to ARM_RAS_START (look for occurrances >+ * of ldr/str rm,[rn, #4]). > */ > #define ARM_TP_ADDRESS (ARM_VECTORS_HIGH + 0x1000) > #define ARM_RAS_START (ARM_TP_ADDRESS + 4)
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bug 161498
: 119039