Attachment #133819 for bug #178357

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Lines 109-114 Link Here

(-)amd64/amd64/identcpu.c (+16 lines)
109	SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD,	109	SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD,
110	&hw_clockrate, 0, "CPU instruction clock rate");	110	&hw_clockrate, 0, "CPU instruction clock rate");
111		111
		112	SYSCTL_UINT(_machdep, OID_AUTO, cpu_physical_address_bits, CTLFLAG_RD,
		113	&cpu_pma_bits, 0, "CPU physical address bits");
		114
		115	SYSCTL_UINT(_machdep, OID_AUTO, cpu_virtual_address_bits, CTLFLAG_RD,
		116	&cpu_vma_bits, 0, "CPU virtual address bits");
		117
112	static eventhandler_tag tsc_post_tag;	118	static eventhandler_tag tsc_post_tag;
113		119
114	static char cpu_brand[48];	120	static char cpu_brand[48];
Lines 516-521 Link Here
516	cpu_feature = regs[3];	522	cpu_feature = regs[3];
517	cpu_feature2 = regs[2];	523	cpu_feature2 = regs[2];
518		524
		525	/* Intel CPUID Specification chapter 5.2.7
		526	* eax=0x80000008
		527	* */
		528	do_cpuid(0x80000008, regs);
		529
		530	/* upper bits are virtual size */
		531	cpu_vma_bits = ((regs[0] >> 8) & 0xFF);
		532	/* lower bits are physical size */
		533	cpu_pma_bits = (regs[0] & 0xFF);
		534
519	/*	535	/*
520	* Clear "Limit CPUID Maxval" bit and get the largest standard CPUID	536	* Clear "Limit CPUID Maxval" bit and get the largest standard CPUID
521	* function number again if it is set from BIOS. It is necessary	537	* function number again if it is set from BIOS. It is necessary




u_int	cpu_high;		/* Highest arg to CPUID */
u_int	cpu_exthigh;		/* Highest arg to extended CPUID */
u_int	cpu_id;			/* Stepping ID */
u_int	cpu_pma_bits;		/* CPU physical address bits */
u_int	cpu_procinfo;		/* HyperThreading Info / Brand Index / CLFUSH */
u_int	cpu_procinfo2;		/* Multicore info */
char	cpu_vendor[20];		/* CPU Origin code */
u_int	cpu_vendor_id;		/* CPU vendor ID */
u_int	cpu_vma_bits;		/* CPU virtual address bits */
u_int	cpu_fxsr;		/* SSE enabled */
u_int	cpu_mxcsr_mask;		/* Valid bits in mxcsr */
u_int	cpu_clflush_line_size = 32;




extern	u_int	cpu_id;
extern	u_int	cpu_max_ext_state_size;
extern	u_int	cpu_mxcsr_mask;
extern u_int	cpu_pma_bits;
extern	u_int	cpu_procinfo;
extern	u_int	cpu_procinfo2;
extern	char	cpu_vendor[];
extern	u_int	cpu_vendor_id;
extern u_int	cpu_vma_bits;
extern	char	ctx_switch_xsave[];
extern	char	kstack[];
extern	char	sigcode[];

Lines 310-315 Link Here

(-)compat/linprocfs/linprocfs.c (+6 lines)
310	fqmhz, fqkhz, fqmhz, fqkhz);	310	fqmhz, fqkhz, fqmhz, fqkhz);
311	}	311	}
312		312
		313	if (cpu_vma_bits != 0 && cpu_vma_bits != 0) {
		314	sbuf_printf(sb,
		315	"address sizes\t: %u bits physical, %u bits virtual\n",
		316	cpu_pma_bits, cpu_vma_bits);
		317	}
		318
313	return (0);	319	return (0);
314	}	320	}
315	#endif /* __i386__ \|\| __amd64__ */	321	#endif /* __i386__ \|\| __amd64__ */

Return to bug 178357

Lines 66-75 Link Here

(-)amd64/amd64/initcpu.c (+2 lines)
66	u_int cpu_high; /* Highest arg to CPUID */	66	u_int cpu_high; /* Highest arg to CPUID */
67	u_int cpu_exthigh; /* Highest arg to extended CPUID */	67	u_int cpu_exthigh; /* Highest arg to extended CPUID */
68	u_int cpu_id; /* Stepping ID */	68	u_int cpu_id; /* Stepping ID */
		69	u_int cpu_pma_bits; /* CPU physical address bits */
69	u_int cpu_procinfo; /* HyperThreading Info / Brand Index / CLFUSH */	70	u_int cpu_procinfo; /* HyperThreading Info / Brand Index / CLFUSH */
70	u_int cpu_procinfo2; /* Multicore info */	71	u_int cpu_procinfo2; /* Multicore info */
71	char cpu_vendor[20]; /* CPU Origin code */	72	char cpu_vendor[20]; /* CPU Origin code */
72	u_int cpu_vendor_id; /* CPU vendor ID */	73	u_int cpu_vendor_id; /* CPU vendor ID */
		74	u_int cpu_vma_bits; /* CPU virtual address bits */
73	u_int cpu_fxsr; /* SSE enabled */	75	u_int cpu_fxsr; /* SSE enabled */
74	u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */	76	u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */
75	u_int cpu_clflush_line_size = 32;	77	u_int cpu_clflush_line_size = 32;

Lines 54-63 Link Here

(-)amd64/include/md_var.h (+2 lines)
54	extern u_int cpu_id;	54	extern u_int cpu_id;
55	extern u_int cpu_max_ext_state_size;	55	extern u_int cpu_max_ext_state_size;
56	extern u_int cpu_mxcsr_mask;	56	extern u_int cpu_mxcsr_mask;
		57	extern u_int cpu_pma_bits;
57	extern u_int cpu_procinfo;	58	extern u_int cpu_procinfo;
58	extern u_int cpu_procinfo2;	59	extern u_int cpu_procinfo2;
59	extern char cpu_vendor[];	60	extern char cpu_vendor[];
60	extern u_int cpu_vendor_id;	61	extern u_int cpu_vendor_id;
		62	extern u_int cpu_vma_bits;
61	extern char ctx_switch_xsave[];	63	extern char ctx_switch_xsave[];
62	extern char kstack[];	64	extern char kstack[];
63	extern char sigcode[];	65	extern char sigcode[];