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Lines 24-46
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| 24 |
int |
24 |
int |
| 25 |
gsl_ieee_set_mode (int precision, int rounding, int exception_mask) |
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gsl_ieee_set_mode (int precision, int rounding, int exception_mask) |
| 26 |
{ |
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{ |
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#ifndef __ppc__ |
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fp_prec_t prec = 0 ; |
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fp_prec_t prec = 0 ; |
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#endif |
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fp_except_t mode = 0 ; |
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fp_except_t mode = 0 ; |
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fp_rnd_t rnd = 0 ; |
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fp_rnd_t rnd = 0 ; |
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switch (precision) |
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switch (precision) |
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{ |
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{ |
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case GSL_IEEE_SINGLE_PRECISION: |
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case GSL_IEEE_SINGLE_PRECISION: |
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#ifdef __ppc__ |
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GSL_ERROR ("powerpc only supports default precision rounding", GSL_EUNSUP); |
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#else |
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prec = FP_PS; |
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prec = FP_PS; |
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fpsetprec(prec); |
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fpsetprec(prec); |
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#endif |
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break ; |
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break ; |
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case GSL_IEEE_DOUBLE_PRECISION: |
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case GSL_IEEE_DOUBLE_PRECISION: |
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#ifdef __ppc__ |
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GSL_ERROR ("powerpc only supports default precision rounding", GSL_EUNSUP); |
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#else |
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prec = FP_PD; |
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prec = FP_PD; |
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fpsetprec(prec); |
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fpsetprec(prec); |
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#endif |
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break ; |
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break ; |
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case GSL_IEEE_EXTENDED_PRECISION: |
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case GSL_IEEE_EXTENDED_PRECISION: |
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#ifdef __ppc__ |
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GSL_ERROR ("powerpc only supports default precision rounding", GSL_EUNSUP); |
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#else |
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prec = FP_PE; |
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prec = FP_PE; |
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fpsetprec(prec); |
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fpsetprec(prec); |
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#endif |
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break ; |
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break ; |
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} |
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} |
| 46 |
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Lines 69-81
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| 69 |
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| 70 |
/* Turn on all the exceptions apart from 'inexact' */ |
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/* Turn on all the exceptions apart from 'inexact' */ |
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mode = FP_X_INV | FP_X_DNML | FP_X_DZ | FP_X_OFL | FP_X_UFL ; |
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mode = FP_X_INV | FP_X_DZ | FP_X_OFL | FP_X_UFL ; |
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#ifndef __ppc__ |
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mode |= FP_X_DNML; |
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#endif |
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if (exception_mask & GSL_IEEE_MASK_INVALID) |
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if (exception_mask & GSL_IEEE_MASK_INVALID) |
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mode &= ~ FP_X_INV ; |
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mode &= ~ FP_X_INV ; |
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if (exception_mask & GSL_IEEE_MASK_DENORMALIZED) |
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if (exception_mask & GSL_IEEE_MASK_DENORMALIZED) |
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#ifdef __ppc__ |
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{ |
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/* Do nothing */ |
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} |
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else |
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{ |
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GSL_ERROR ("powerpc does not support the denormalized operand exception. " |
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"Use 'mask-denormalized' to work around this.", GSL_EUNSUP) ; |
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} |
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#else |
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mode &= ~ FP_X_DNML ; |
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mode &= ~ FP_X_DNML ; |
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#endif |
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if (exception_mask & GSL_IEEE_MASK_DIVISION_BY_ZERO) |
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if (exception_mask & GSL_IEEE_MASK_DIVISION_BY_ZERO) |
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mode &= ~ FP_X_DZ ; |
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mode &= ~ FP_X_DZ ; |
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Lines 88-94
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| 88 |
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| 89 |
if (exception_mask & GSL_IEEE_TRAP_INEXACT) |
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if (exception_mask & GSL_IEEE_TRAP_INEXACT) |
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{ |
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{ |
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#ifdef __ppc__ |
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GSL_ERROR ("powerpc does not support traps for inexact operations", GSL_EUNSUP) ; |
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#else |
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mode |= FP_X_IMP ; |
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mode |= FP_X_IMP ; |
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#endif |
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} |
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} |
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else |
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else |
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{ |
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{ |