Attachment #152860 for bug #197265




{
	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
	int reg, speed, gig, anar;
	int bmcr, bmsr;

	switch (cmd) {
	case MII_POLLSTAT:

		 */
		if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 &&
		    sc->mii_mpd_rev >= 2) {
			bmcr = PHY_READ(sc, RGEPHY_MII_BMCR);
			/* A side effect is to update the link status. */
			bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
			if ((bmcr & RGEPHY_BMCR_AUTOEN) == 0 ||
			    (bmsr & RGEPHY_BMSR_ACOMP) == RGEPHY_BMSR_ACOMP) {
				/* The previous read updated the link status. */
				bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
				if ((bmsr & RGEPHY_BMSR_LINK)
				    == RGEPHY_BMSR_LINK) {
					sc->mii_ticks = 0;
					break;
				}
			}
		} else {
			reg = PHY_READ(sc, RL_GMEDIASTAT);

rgephy_status(struct mii_softc *sc)
{
	struct mii_data *mii = sc->mii_pdata;
	int bmcr, bmsr;
	uint16_t ssr;

	mii->mii_media_status = IFM_AVALID;
	mii->mii_media_active = IFM_ETHER;

	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) {
		ssr = PHY_READ(sc, RGEPHY_MII_SSR);
		if (ssr & RGEPHY_SSR_LINK)
			mii->mii_media_status |= IFM_ACTIVE;
	} else {
		bmsr = PHY_READ(sc, RL_GMEDIASTAT);
		if (bmsr & RL_GMEDIASTAT_LINK)
			mii->mii_media_status |= IFM_ACTIVE;
	}

	bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);

	bmcr = PHY_READ(sc, RGEPHY_MII_BMCR);
	if (bmcr & RGEPHY_BMCR_ISO) {
		mii->mii_media_active |= IFM_NONE;

	if (bmcr & RGEPHY_BMCR_LOOP)
		mii->mii_media_active |= IFM_LOOP;

	/* A side effect is to update the link status. */
	bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
	if (bmcr & RGEPHY_BMCR_AUTOEN) {
		if ((bmsr & RGEPHY_BMSR_ACOMP) == 0) {
			/* Erg, still trying, I guess... */

	}

	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) {
		/* The previous read updated the link status. */
		bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
		if ((bmsr & RGEPHY_BMSR_LINK) == RGEPHY_BMSR_LINK)
			mii->mii_media_status |= IFM_ACTIVE;
	} else {
		bmsr = PHY_READ(sc, RL_GMEDIASTAT);
		if (bmsr & RL_GMEDIASTAT_LINK)
			mii->mii_media_status |= IFM_ACTIVE;
	}

	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) {
		if (sc->mii_mpd_rev == 6) {
			/* RTL8211F */
			ssr = PHY_READ(sc, RGEPHY_F_MII_SSR);
			switch (ssr & RGEPHY_F_SSR_SPD_MASK) {
			case RGEPHY_F_SSR_S1000:
				mii->mii_media_active |= IFM_1000_T;
				break;
			case RGEPHY_F_SSR_S100:
				mii->mii_media_active |= IFM_100_TX;
				break;
			case RGEPHY_F_SSR_S10:
				mii->mii_media_active |= IFM_10_T;
				break;
			default:
				mii->mii_media_active |= IFM_NONE;
				break;
			}
			if (ssr & RGEPHY_F_SSR_FDX)
				mii->mii_media_active |= IFM_FDX;
			else
				mii->mii_media_active |= IFM_HDX;
		} else {
			ssr = PHY_READ(sc, RGEPHY_MII_SSR);
			switch (ssr & RGEPHY_SSR_SPD_MASK) {
			case RGEPHY_SSR_S1000:
				mii->mii_media_active |= IFM_1000_T;
				break;
			case RGEPHY_SSR_S100:
				mii->mii_media_active |= IFM_100_TX;
				break;
			case RGEPHY_SSR_S10:
				mii->mii_media_active |= IFM_10_T;
				break;
			default:
				mii->mii_media_active |= IFM_NONE;
				break;
			}
			if (ssr & RGEPHY_SSR_FDX)
				mii->mii_media_active |= IFM_FDX;
			else
				mii->mii_media_active |= IFM_HDX;
		}
		if (ssr & RGEPHY_SSR_FDX)
			mii->mii_media_active |= IFM_FDX;
		else
			mii->mii_media_active |= IFM_HDX;
	} else {
		bmsr = PHY_READ(sc, RL_GMEDIASTAT);
		if (bmsr & RL_GMEDIASTAT_1000MBPS)

	}

	if (sc->mii_mpd_rev >= 2) {
		if (sc->mii_mpd_rev == 6) {
			/* RTL8211F */
			pcr = PHY_READ(sc, RGEPHY_F_MII_PCR1);
			if ((pcr & RGEPHY_F_PCR1_MDI_MM)
			     == RGEPHY_F_PCR1_MDI_MM) {
				pcr &= ~RGEPHY_F_PCR1_MDI_MM;
				PHY_WRITE(sc, RGEPHY_F_MII_PCR1, pcr);
			}
		} else {
			pcr = PHY_READ(sc, RGEPHY_MII_PCR);
			if ((pcr & RGEPHY_PCR_MDIX_AUTO) == 0) {
				pcr &= ~RGEPHY_PCR_MDI_MASK;
				pcr |= RGEPHY_PCR_MDIX_AUTO;
				PHY_WRITE(sc, RGEPHY_MII_PCR, pcr);
			}
		}
	}





#define	RGEPHY_SSR_ALDPS	0x0008	/* RTL8211C(L) only */
#define	RGEPHY_SSR_JABBER	0x0001	/* Jabber */

/* RTL8211F */
#define RGEPHY_F_MII_PCR1	0x18	/* PHY Specific control register */
#define	RGEPHY_F_PCR1_MDI_MM	0x0200	/* MDI / MDIX Manual Mode */
#define	RGEPHY_F_PCR1_MDI_MODE	0x0100	/* MDI Mode (0=MDIX,1=MDI) */
#define	RGEPHY_F_PCR1_ALDPS_EN	0x0004	/* Link Down Power Saving Enable */

/* RTL8211F */
#define RGEPHY_F_MII_SSR	0x1a	/* PHY Specific status register */
#define	RGEPHY_F_SSR_S1000	0x0020	/* 1000Mbps */
#define	RGEPHY_F_SSR_S100	0x0010	/* 100Mbps */
#define	RGEPHY_F_SSR_S10	0x0000	/* 10Mbps */
#define	RGEPHY_F_SSR_SPD_MASK	0x0030
#define	RGEPHY_F_SSR_FDX	0x0008	/* full duplex */
#define	RGEPHY_F_SSR_LINK	0x0004	/* link up */
#define	RGEPHY_F_SSR_JABBER	0x0001	/* Jabber */

#endif /* _DEV_RGEPHY_MIIREG_H_ */
------------------------------------------------------------------------
------------------------------------------------------------------------

Return to bug 197265

Lines 148-153 Link Here

(-)sys/dev/mii/rgephy.c (-41 / +83 lines)
148	{	148	{
149	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;	149	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
150	int reg, speed, gig, anar;	150	int reg, speed, gig, anar;
		151	int bmcr, bmsr;
151		152
152	switch (cmd) {	153	switch (cmd) {
153	case MII_POLLSTAT:	154	case MII_POLLSTAT:
Lines 239-249 Link Here
239	*/	240	*/
240	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 &&	241	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 &&
241	sc->mii_mpd_rev >= 2) {	242	sc->mii_mpd_rev >= 2) {
242	/* RTL8211B(L) */	243	bmcr = PHY_READ(sc, RGEPHY_MII_BMCR);
243	reg = PHY_READ(sc, RGEPHY_MII_SSR);	244	/* A side effect is to update the link status. */
244	if (reg & RGEPHY_SSR_LINK) {	245	bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
245	sc->mii_ticks = 0;	246	if ((bmcr & RGEPHY_BMCR_AUTOEN) == 0 \|\|
246	break;	247	(bmsr & RGEPHY_BMSR_ACOMP) == RGEPHY_BMSR_ACOMP) {
		248	/* The previous read updated the link status. */
		249	bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
		250	if ((bmsr & RGEPHY_BMSR_LINK)
		251	== RGEPHY_BMSR_LINK) {
		252	sc->mii_ticks = 0;
		253	break;
		254	}
247	}	255	}
248	} else {	256	} else {
249	reg = PHY_READ(sc, RL_GMEDIASTAT);	257	reg = PHY_READ(sc, RL_GMEDIASTAT);
Lines 287-310 Link Here
287	rgephy_status(struct mii_softc *sc)	295	rgephy_status(struct mii_softc *sc)
288	{	296	{
289	struct mii_data *mii = sc->mii_pdata;	297	struct mii_data *mii = sc->mii_pdata;
290	int bmsr, bmcr;	298	int bmcr, bmsr;
291	uint16_t ssr;	299	uint16_t ssr;
292		300
293	mii->mii_media_status = IFM_AVALID;	301	mii->mii_media_status = IFM_AVALID;
294	mii->mii_media_active = IFM_ETHER;	302	mii->mii_media_active = IFM_ETHER;
295		303
296	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) {
297	ssr = PHY_READ(sc, RGEPHY_MII_SSR);
298	if (ssr & RGEPHY_SSR_LINK)
299	mii->mii_media_status \|= IFM_ACTIVE;
300	} else {
301	bmsr = PHY_READ(sc, RL_GMEDIASTAT);
302	if (bmsr & RL_GMEDIASTAT_LINK)
303	mii->mii_media_status \|= IFM_ACTIVE;
304	}
305
306	bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
307
308	bmcr = PHY_READ(sc, RGEPHY_MII_BMCR);	304	bmcr = PHY_READ(sc, RGEPHY_MII_BMCR);
309	if (bmcr & RGEPHY_BMCR_ISO) {	305	if (bmcr & RGEPHY_BMCR_ISO) {
310	mii->mii_media_active \|= IFM_NONE;	306	mii->mii_media_active \|= IFM_NONE;
Lines 315-320 Link Here
315	if (bmcr & RGEPHY_BMCR_LOOP)	311	if (bmcr & RGEPHY_BMCR_LOOP)
316	mii->mii_media_active \|= IFM_LOOP;	312	mii->mii_media_active \|= IFM_LOOP;
317		313
		314	/* A side effect is to update the link status. */
		315	bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
318	if (bmcr & RGEPHY_BMCR_AUTOEN) {	316	if (bmcr & RGEPHY_BMCR_AUTOEN) {
319	if ((bmsr & RGEPHY_BMSR_ACOMP) == 0) {	317	if ((bmsr & RGEPHY_BMSR_ACOMP) == 0) {
320	/* Erg, still trying, I guess... */	318	/* Erg, still trying, I guess... */
Lines 324-348 Link Here
324	}	322	}
325		323
326	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) {	324	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) {
327	ssr = PHY_READ(sc, RGEPHY_MII_SSR);	325	/* The previous read updated the link status. */
328	switch (ssr & RGEPHY_SSR_SPD_MASK) {	326	bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
329	case RGEPHY_SSR_S1000:	327	if ((bmsr & RGEPHY_BMSR_LINK) == RGEPHY_BMSR_LINK)
330	mii->mii_media_active \|= IFM_1000_T;	328	mii->mii_media_status \|= IFM_ACTIVE;
331	break;	329	} else {
332	case RGEPHY_SSR_S100:	330	bmsr = PHY_READ(sc, RL_GMEDIASTAT);
333	mii->mii_media_active \|= IFM_100_TX;	331	if (bmsr & RL_GMEDIASTAT_LINK)
334	break;	332	mii->mii_media_status \|= IFM_ACTIVE;
335	case RGEPHY_SSR_S10:	333	}
336	mii->mii_media_active \|= IFM_10_T;	334
337	break;	335	if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) {
338	default:	336	if (sc->mii_mpd_rev == 6) {
339	mii->mii_media_active \|= IFM_NONE;	337	/* RTL8211F */
340	break;	338	ssr = PHY_READ(sc, RGEPHY_F_MII_SSR);
		339	switch (ssr & RGEPHY_F_SSR_SPD_MASK) {
		340	case RGEPHY_F_SSR_S1000:
		341	mii->mii_media_active \|= IFM_1000_T;
		342	break;
		343	case RGEPHY_F_SSR_S100:
		344	mii->mii_media_active \|= IFM_100_TX;
		345	break;
		346	case RGEPHY_F_SSR_S10:
		347	mii->mii_media_active \|= IFM_10_T;
		348	break;
		349	default:
		350	mii->mii_media_active \|= IFM_NONE;
		351	break;
		352	}
		353	if (ssr & RGEPHY_F_SSR_FDX)
		354	mii->mii_media_active \|= IFM_FDX;
		355	else
		356	mii->mii_media_active \|= IFM_HDX;
		357	} else {
		358	ssr = PHY_READ(sc, RGEPHY_MII_SSR);
		359	switch (ssr & RGEPHY_SSR_SPD_MASK) {
		360	case RGEPHY_SSR_S1000:
		361	mii->mii_media_active \|= IFM_1000_T;
		362	break;
		363	case RGEPHY_SSR_S100:
		364	mii->mii_media_active \|= IFM_100_TX;
		365	break;
		366	case RGEPHY_SSR_S10:
		367	mii->mii_media_active \|= IFM_10_T;
		368	break;
		369	default:
		370	mii->mii_media_active \|= IFM_NONE;
		371	break;
		372	}
		373	if (ssr & RGEPHY_SSR_FDX)
		374	mii->mii_media_active \|= IFM_FDX;
		375	else
		376	mii->mii_media_active \|= IFM_HDX;
341	}	377	}
342	if (ssr & RGEPHY_SSR_FDX)
343	mii->mii_media_active \|= IFM_FDX;
344	else
345	mii->mii_media_active \|= IFM_HDX;
346	} else {	378	} else {
347	bmsr = PHY_READ(sc, RL_GMEDIASTAT);	379	bmsr = PHY_READ(sc, RL_GMEDIASTAT);
348	if (bmsr & RL_GMEDIASTAT_1000MBPS)	380	if (bmsr & RL_GMEDIASTAT_1000MBPS)
Lines 491-501 Link Here
491	}	523	}
492		524
493	if (sc->mii_mpd_rev >= 2) {	525	if (sc->mii_mpd_rev >= 2) {
494	pcr = PHY_READ(sc, RGEPHY_MII_PCR);	526	if (sc->mii_mpd_rev == 6) {
495	if ((pcr & RGEPHY_PCR_MDIX_AUTO) == 0) {	527	/* RTL8211F */
496	pcr &= ~RGEPHY_PCR_MDI_MASK;	528	pcr = PHY_READ(sc, RGEPHY_F_MII_PCR1);
497	pcr \|= RGEPHY_PCR_MDIX_AUTO;	529	if ((pcr & RGEPHY_F_PCR1_MDI_MM)
498	PHY_WRITE(sc, RGEPHY_MII_PCR, pcr);	530	== RGEPHY_F_PCR1_MDI_MM) {
		531	pcr &= ~RGEPHY_F_PCR1_MDI_MM;
		532	PHY_WRITE(sc, RGEPHY_F_MII_PCR1, pcr);
		533	}
		534	} else {
		535	pcr = PHY_READ(sc, RGEPHY_MII_PCR);
		536	if ((pcr & RGEPHY_PCR_MDIX_AUTO) == 0) {
		537	pcr &= ~RGEPHY_PCR_MDI_MASK;
		538	pcr \|= RGEPHY_PCR_MDIX_AUTO;
		539	PHY_WRITE(sc, RGEPHY_MII_PCR, pcr);
		540	}
499	}	541	}
500	}	542	}
501		543

Lines 162-165 Link Here

(-)sys/dev/mii/rgephyreg.h (-2 / +16 lines)
162	#define RGEPHY_SSR_ALDPS 0x0008 /* RTL8211C(L) only */	162	#define RGEPHY_SSR_ALDPS 0x0008 /* RTL8211C(L) only */
163	#define RGEPHY_SSR_JABBER 0x0001 /* Jabber */	163	#define RGEPHY_SSR_JABBER 0x0001 /* Jabber */
164		164
		165	/* RTL8211F */
		166	#define RGEPHY_F_MII_PCR1 0x18 /* PHY Specific control register */
		167	#define RGEPHY_F_PCR1_MDI_MM 0x0200 /* MDI / MDIX Manual Mode */
		168	#define RGEPHY_F_PCR1_MDI_MODE 0x0100 /* MDI Mode (0=MDIX,1=MDI) */
		169	#define RGEPHY_F_PCR1_ALDPS_EN 0x0004 /* Link Down Power Saving Enable */
		170
		171	/* RTL8211F */
		172	#define RGEPHY_F_MII_SSR 0x1a /* PHY Specific status register */
		173	#define RGEPHY_F_SSR_S1000 0x0020 /* 1000Mbps */
		174	#define RGEPHY_F_SSR_S100 0x0010 /* 100Mbps */
		175	#define RGEPHY_F_SSR_S10 0x0000 /* 10Mbps */
		176	#define RGEPHY_F_SSR_SPD_MASK 0x0030
		177	#define RGEPHY_F_SSR_FDX 0x0008 /* full duplex */
		178	#define RGEPHY_F_SSR_LINK 0x0004 /* link up */
		179	#define RGEPHY_F_SSR_JABBER 0x0001 /* Jabber */
		180
165	#endif /* _DEV_RGEPHY_MIIREG_H_ */	181	#endif /* _DEV_RGEPHY_MIIREG_H_ */
166	------------------------------------------------------------------------
167	------------------------------------------------------------------------