FreeBSD Bugzilla – Attachment 160143 Details for
Bug 202517
PCI PF memory decode disable when sizing VF BARs
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[patch]
Patch to prevent disabling of PF during VF bar sizing
sriov_vfbar_patch (text/plain), 2.49 KB, created by
Eric Badger
on 2015-08-20 13:18:36 UTC
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Description:
Patch to prevent disabling of PF during VF bar sizing
Filename:
MIME Type:
Creator:
Eric Badger
Created:
2015-08-20 13:18:36 UTC
Size:
2.49 KB
patch
obsolete
>diff --git sys/dev/pci/pci.c sys/dev/pci/pci.c >index 722db59..b4e0a88 100755 >--- sys/dev/pci/pci.c >+++ sys/dev/pci/pci.c >@@ -36,6 +36,7 @@ __FBSDID("$FreeBSD$"); > #include <sys/malloc.h> > #include <sys/module.h> > #include <sys/linker.h> >+#include <sys/nv.h> > #include <sys/fcntl.h> > #include <sys/conf.h> > #include <sys/kernel.h> >@@ -61,6 +62,7 @@ __FBSDID("$FreeBSD$"); > #include <dev/pci/pcireg.h> > #include <dev/pci/pcivar.h> > #include <dev/pci/pci_private.h> >+#include <dev/pci/pci_iov_private.h> > > #include <dev/usb/controller/xhcireg.h> > #include <dev/usb/controller/ehcireg.h> >@@ -74,6 +76,11 @@ __FBSDID("$FreeBSD$"); > (((cfg)->hdrtype == PCIM_HDRTYPE_NORMAL && reg == PCIR_BIOS) || \ > ((cfg)->hdrtype == PCIM_HDRTYPE_BRIDGE && reg == PCIR_BIOS_1)) > >+#define PCIR_IS_IOV(cfg, reg) \ >+ (((cfg)->iov != NULL) && \ >+ ((reg) >= (cfg)->iov->iov_pos + PCIR_SRIOV_BAR(0)) && \ >+ ((reg) <= (cfg)->iov->iov_pos + PCIR_SRIOV_BAR(PCIR_MAX_BAR_0))) >+ > static int pci_has_quirk(uint32_t devid, int quirk); > static pci_addr_t pci_mapbase(uint64_t mapreg); > static const char *pci_maptype(uint64_t mapreg); >@@ -2597,7 +2604,8 @@ pci_read_bar(device_t dev, int reg, pci_addr_t *mapp, pci_addr_t *testvalp, > struct pci_devinfo *dinfo; > pci_addr_t map, testval; > int ln2range; >- uint16_t cmd; >+ uint32_t restore_reg; >+ uint16_t cmd, mask; > > /* > * The device ROM BAR is special. It is always a 32-bit >@@ -2627,9 +2635,18 @@ pci_read_bar(device_t dev, int reg, pci_addr_t *mapp, pci_addr_t *testvalp, > * determining the BAR's length since we will be placing it in > * a weird state. > */ >- cmd = pci_read_config(dev, PCIR_COMMAND, 2); >- pci_write_config(dev, PCIR_COMMAND, >- cmd & ~(PCI_BAR_MEM(map) ? PCIM_CMD_MEMEN : PCIM_CMD_PORTEN), 2); >+#ifdef PCI_IOV >+ if (PCIR_IS_IOV(&dinfo->cfg, reg)) { >+ restore_reg = dinfo->cfg.iov->iov_pos + PCIR_SRIOV_CTL; >+ mask = PCIM_SRIOV_VF_MSE; >+ } else >+#endif >+ { >+ restore_reg = PCIR_COMMAND; >+ mask = PCI_BAR_MEM(map) ? PCIM_CMD_MEMEN : PCIM_CMD_PORTEN; >+ } >+ cmd = pci_read_config(dev, restore_reg, 2); >+ pci_write_config(dev, restore_reg, cmd & ~mask, 2); > > /* > * Determine the BAR's length by writing all 1's. The bottom >@@ -2651,7 +2668,7 @@ pci_read_bar(device_t dev, int reg, pci_addr_t *mapp, pci_addr_t *testvalp, > pci_write_config(dev, reg, map, 4); > if (ln2range == 64) > pci_write_config(dev, reg + 4, map >> 32, 4); >- pci_write_config(dev, PCIR_COMMAND, cmd, 2); >+ pci_write_config(dev, restore_reg, cmd, 2); > > *mapp = map; > *testvalp = testval;
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Attachments on
bug 202517
: 160143