Attachment 161135 Details for Bug 203165 – Patch to ichwd.c and ichwd.h

Patch to ichwd.c and ichwd.h

patch-sys__dev__ichwd__ichwd.txt (text/plain), 2.20 KB, created by t_uemura on 2015-09-17 00:00:29 UTC

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Creator: t_uemura

Created: 2015-09-17 00:00:29 UTC

Size: 2.20 KB

patch

obsolete

>--- ./sys/dev/ichwd/ichwd.c.orig	2015-07-28 05:04:55.000000000 +0900
>+++ ./sys/dev/ichwd/ichwd.c	2015-08-03 15:26:32.131742000 +0900
>@@ -127,2 +127,3 @@
> 	{ DEVICEID_3450,     "Intel 3450 watchdog timer",       10 },
>+	{ DEVICEID_2955U,    "Intel Celeron 2955U watchdog timer",      10 },
> 	{ DEVICEID_CPT0,     "Intel Cougar Point watchdog timer",	10 },
>@@ -230,2 +231,3 @@
> 	{ DEVICEID_COLETOCRK_LPC, "Intel Coleto Creek watchdog timer",  10 },
>+	{ DEVICEID_AVO0,     "Intel Bay Trail-D watchdog timer",	11 },
> 	{ 0, NULL, 0 },
>@@ -409,7 +411,10 @@
> 	} else {
>+		uint32_t no_reboot;
>+		no_reboot = (sc->ich_version >= 11) 
>+		    ? AVO_GCS_NO_REBOOT : ICH_GCS_NO_REBOOT;
> 		status = ichwd_read_gcs_4(sc, 0);
>-		status &= ~ICH_GCS_NO_REBOOT;
>+		status &= ~no_reboot;
> 		ichwd_write_gcs_4(sc, 0, status);
> 		status = ichwd_read_gcs_4(sc, 0);
>-		if (status & ICH_GCS_NO_REBOOT)
>+		if (status & no_reboot)
> 			rc = EIO;
>@@ -500,6 +505,23 @@
> 	if (id_p->version >= 6) {
>+		int r, m, o, s;
>+		if (id_p->version >= 11) {
>+			/* enable PMC space. */
>+			uint8_t a = pci_read_config(ich, AVO_BASE, 1);
>+			pci_write_config(ich, AVO_BASE, a | 0x2, 1);
>+
>+			r = AVO_BASE;
>+			m = 0xfffffe00;
>+			o = AVO_GCS_OFFSET;
>+			s = AVO_GCS_SIZE;
>+		} else {
>+			r = ICH_RCBA;
>+			m = 0xffffc000;
>+			o = ICH_GCS_OFFSET;
>+			s = ICH_GCS_SIZE;
>+		}
>+
> 		/* get RCBA (root complex base address) */
>-		rcba = pci_read_config(ich, ICH_RCBA, 4);
>-		rc = bus_set_resource(ich, SYS_RES_MEMORY, 0,
>-		    (rcba & 0xffffc000) + ICH_GCS_OFFSET, ICH_GCS_SIZE);
>+		rcba = pci_read_config(ich, r, 4);
>+		rc = bus_set_resource(
>+		    ich, SYS_RES_MEMORY, 0, (rcba & m) + o, s);
> 		if (rc)
>--- ./sys/dev/ichwd/ichwd.h.orig	2015-06-02 13:36:47.000000000 +0900
>+++ ./sys/dev/ichwd/ichwd.h	2015-08-03 15:26:32.135474000 +0900
>@@ -61,2 +61,3 @@
> #define VENDORID_INTEL		0x8086
>+#define DEVICEID_AVO0		0x0f1c
> #define DEVICEID_CPT0		0x1c40
>@@ -215,2 +216,3 @@
> #define DEVICEID_WCPT6		0x8cc6
>+#define DEVICEID_2955U		0x9c45
> 
>@@ -228,2 +230,8 @@
> 
>+/* Avoton and newer (incl. BayTrail) Chipset Configuration Registers */
>+#define AVO_BASE		0x44
>+#define AVO_GCS_OFFSET		0x08
>+#define AVO_GCS_SIZE		0x4
>+#define AVO_GCS_NO_REBOOT	0x10
>+
> /* register names and locations (relative to PMBASE) */

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Attachments on bug 203165: 161135