Attachment 172095 Details for Bug 210736 – DWC OTG patch

[patch] DWC OTG patch

dwc_otg.diff (text/plain), 2.16 KB, created by Hans Petter Selasky on 2016-07-04 10:17:35 UTC

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Creator: Hans Petter Selasky

Created: 2016-07-04 10:17:35 UTC

Size: 2.16 KB

patch

obsolete

>Index: sys/dev/usb/controller/dwc_otg.c
>===================================================================
>--- sys/dev/usb/controller/dwc_otg.c	(revision 302306)
>+++ sys/dev/usb/controller/dwc_otg.c	(working copy)
>@@ -93,17 +93,6 @@
> #define	DWC_OTG_PC2UDEV(pc) \
>    (USB_DMATAG_TO_XROOT((pc)->tag_parent)->udev)
> 
>-#define	DWC_OTG_MSK_GINT_ENABLED	\
>-   (GINTMSK_ENUMDONEMSK |		\
>-   GINTMSK_USBRSTMSK |			\
>-   GINTMSK_USBSUSPMSK |			\
>-   GINTMSK_IEPINTMSK |			\
>-   GINTMSK_SESSREQINTMSK |		\
>-   GINTMSK_RXFLVLMSK |			\
>-   GINTMSK_HCHINTMSK |			\
>-   GINTMSK_OTGINTMSK |			\
>-   GINTMSK_PRTINTMSK)
>-
> #define	DWC_OTG_MSK_GINT_THREAD_IRQ				\
>    (GINTSTS_USBRST | GINTSTS_ENUMDONE | GINTSTS_PRTINT |	\
>    GINTSTS_WKUPINT | GINTSTS_USBSUSP | GINTMSK_OTGINTMSK |	\
>@@ -376,6 +365,11 @@
> 		/* enable all host channel interrupts */
> 		DWC_OTG_WRITE_4(sc, DOTG_HAINTMSK,
> 		    (1U << sc->sc_host_ch_max) - 1U);
>+
>+		/* enable proper host channel interrupts */
>+		sc->sc_irq_mask |= GINTMSK_HCHINTMSK;
>+		sc->sc_irq_mask &= ~GINTMSK_IEPINTMSK;
>+		DWC_OTG_WRITE_4(sc, DOTG_GINTMSK, sc->sc_irq_mask);
> 	}
> 
> 	if (mode == DWC_MODE_DEVICE) {
>@@ -436,6 +430,11 @@
> 		    pf->usb.max_in_frame_size,
> 		    pf->usb.max_out_frame_size);
> 	    }
>+
>+	    /* enable proper device channel interrupts */
>+	    sc->sc_irq_mask &= ~GINTMSK_HCHINTMSK;
>+	    sc->sc_irq_mask |= GINTMSK_IEPINTMSK;
>+	    DWC_OTG_WRITE_4(sc, DOTG_GINTMSK, sc->sc_irq_mask);
> 	}
> 
> 	/* reset RX FIFO */
>@@ -2870,10 +2869,13 @@
> 
> 		for (x = 0; x != sc->sc_dev_in_ep_max; x++) {
> 			temp = DWC_OTG_READ_4(sc, DOTG_DIEPINT(x));
>-			if (temp & DIEPMSK_XFERCOMPLMSK) {
>-				DWC_OTG_WRITE_4(sc, DOTG_DIEPINT(x),
>-				    DIEPMSK_XFERCOMPLMSK);
>-			}
>+			/*
>+			 * NOTE: Need to clear all interrupt bits,
>+			 * because some appears to be unmaskable and
>+			 * can cause an interrupt loop:
>+			 */
>+			if (temp != 0)
>+				DWC_OTG_WRITE_4(sc, DOTG_DIEPINT(x), temp);
> 		}
> 	}
> 
>@@ -3980,7 +3982,7 @@
> 	}
> 
> 	/* enable interrupts */
>-	sc->sc_irq_mask = DWC_OTG_MSK_GINT_ENABLED;
>+	sc->sc_irq_mask |= DWC_OTG_MSK_GINT_THREAD_IRQ;
> 	DWC_OTG_WRITE_4(sc, DOTG_GINTMSK, sc->sc_irq_mask);
> 
> 	if (sc->sc_mode == DWC_MODE_OTG || sc->sc_mode == DWC_MODE_DEVICE) {

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Attachments on bug 210736: 172054 | 172056 | 172095