Lines 197-202
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"TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \ |
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"TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \ |
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"Th2H", "Tm0P", "Ts0P", "Ts0S" } |
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"Th2H", "Tm0P", "Ts0P", "Ts0S" } |
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#define ASMC_MBP9_TEMPS { "Ts0P", "Ts0S", "TA0P", "TB1T", "TB2T", \ |
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"TB0T", "TC1C", "TC2C", "TC0E", "TC0F", \ |
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"TC0J", "TC0P", "TCFC", "TCGC", "TCSA", \ |
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"TCTD", "TCXC", "TG1D", "TM0P", "TM0S", \ |
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"TPCD", NULL } |
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#define ASMC_MBP9_TEMPNAMES { "Ts0P", "Ts0S", "TA0P", "TB1T", "TB2T", \ |
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"TB0T", "TC1C", "TC2C", "TC0E", "TC0F", \ |
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"TC0J", "TC0P", "TCFC", "TCGC", "TCSA", \ |
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"TCTD", "TCXC", "TG1D", "TM0P", "TM0S", \ |
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"TPCD" } |
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#define ASMC_MBP9_TEMPDESCS { "Palm Rest", "Memory Proximity", "Airflow 1", "Battery 1", "Battery 2", \ |
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"Battery TS_MAX", "CPU Core 1", "CPU Core 2", "CPU1", "CPU1", \ |
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"TC0J", "CPU 1 Proximity", "TCFC", "PECI GPU", "PECI SA", \ |
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"TCTD", "PECI CPU", "GPU Die", "Memory Bank A1", "Memory Module A1", \ |
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"PCH Die" } |
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#define ASMC_MBP11_TEMPS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ |
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#define ASMC_MBP11_TEMPS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ |
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"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \ |
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"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \ |
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"TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \ |
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"TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \ |