Index: sys/powerpc/ofw/ofw_machdep.c
===================================================================
--- sys/powerpc/ofw/ofw_machdep.c	(revision 312083)
+++ sys/powerpc/ofw/ofw_machdep.c	(working copy)
@@ -111,6 +111,15 @@
 	 * Assume that interrupt are disabled at this point, or
 	 * SPRG1-3 could be trashed
 	 */
+#ifdef __powerpc64__
+	__asm __volatile("mtsprg1 %1\n\t"
+	    		 "mtsprg2 %2\n\t"
+			 "mtsprg3 %3\n\t"
+			 :
+			 : "r"(ofmsr[2]),
+			 "r"(ofmsr[3]),
+			 "r"(ofmsr[4]));
+#else
 	__asm __volatile("mfsprg0 %0\n\t"
 			 "mtsprg0 %1\n\t"
 	    		 "mtsprg1 %2\n\t"
@@ -121,6 +130,7 @@
 			 "r"(ofmsr[2]),
 			 "r"(ofmsr[3]),
 			 "r"(ofmsr[4]));
+#endif
 }
 
 static __inline void
@@ -136,7 +146,9 @@
 	 *
 	 * PCPU data cannot be used until this routine is called !
 	 */
+#ifndef __powerpc64__
 	__asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save));
+#endif
 }
 #endif
 
@@ -344,8 +356,9 @@
 	ofmsr[0] = mfmsr();
 	#ifdef __powerpc64__
 	ofmsr[0] &= ~PSL_SF;
+	#else
+	__asm __volatile("mfsprg0 %0" : "=&r"(ofmsr[1]));
 	#endif
-	__asm __volatile("mfsprg0 %0" : "=&r"(ofmsr[1]));
 	__asm __volatile("mfsprg1 %0" : "=&r"(ofmsr[2]));
 	__asm __volatile("mfsprg2 %0" : "=&r"(ofmsr[3]));
 	__asm __volatile("mfsprg3 %0" : "=&r"(ofmsr[4]));