Attachment #180448 for bug #217505




			 asmc_mbp_sysctl_light_control

struct asmc_model asmc_models[] = {
	{ 
	  "MacBook1,1", "Apple SMC MacBook Core Duo",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,
	  ASMC_MB_TEMPS, ASMC_MB_TEMPNAMES, ASMC_MB_TEMPDESCS
	},

	{ 
	  "MacBook2,1", "Apple SMC MacBook Core 2 Duo",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,
	  ASMC_MB_TEMPS, ASMC_MB_TEMPNAMES, ASMC_MB_TEMPDESCS

	  ASMC_MB31_TEMPS, ASMC_MB31_TEMPNAMES, ASMC_MB31_TEMPDESCS
	},

	{ 
	  "MacBookPro1,1", "Apple SMC MacBook Pro Core Duo (15-inch)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
	},

	{ 
	  "MacBookPro1,2", "Apple SMC MacBook Pro Core Duo (17-inch)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
	},

	{ 
	  "MacBookPro2,1", "Apple SMC MacBook Pro Core 2 Duo (17-inch)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
	},

	{ 
	  "MacBookPro2,2", "Apple SMC MacBook Pro Core 2 Duo (15-inch)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
	},

	{ 
	  "MacBookPro3,1", "Apple SMC MacBook Pro Core 2 Duo (15-inch LED)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
	},

	{ 
	  "MacBookPro3,2", "Apple SMC MacBook Pro Core 2 Duo (17-inch HD)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
	},
	
	{ 
	  "MacBookPro4,1", "Apple SMC MacBook Pro Core 2 Duo (Penryn)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP4_TEMPS, ASMC_MBP4_TEMPNAMES, ASMC_MBP4_TEMPDESCS
	},

	{ 
	  "MacBookPro5,1", "Apple SMC MacBook Pro Core 2 Duo (2008/2009)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP5_TEMPS, ASMC_MBP5_TEMPNAMES, ASMC_MBP5_TEMPDESCS
	},

	{ 
	  "MacBookPro8,1", "Apple SMC MacBook Pro (early 2011, 13-inch)",
	  ASMC_SMS_FUNCS_DISABLED, ASMC_FAN_FUNCS2, ASMC_LIGHT_FUNCS,
	  ASMC_MBP81_TEMPS, ASMC_MBP81_TEMPNAMES, ASMC_MBP81_TEMPDESCS
	},

	{
	  "MacBookPro8,2", "Apple SMC MacBook Pro (early 2011)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP8_TEMPS, ASMC_MBP8_TEMPNAMES, ASMC_MBP8_TEMPDESCS
	},

	{ 
	  "MacBookPro11,3", "Apple SMC MacBook Pro Retina Core i7 (2013/2014)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
	  ASMC_MBP11_TEMPS, ASMC_MBP11_TEMPNAMES, ASMC_MBP11_TEMPDESCS
	},
	
	/* The Mac Mini has no SMS */
	{ 
	  "Macmini1,1", "Apple SMC Mac Mini",
	  NULL, NULL, NULL,
	  ASMC_FAN_FUNCS,

	},

	/* The Mac Mini 3,1 has no SMS */
	{ 
	  "Macmini3,1", "Apple SMC Mac Mini 3,1",
	  NULL, NULL, NULL,
	  ASMC_FAN_FUNCS,

	  "MacBookAir1,1", "Apple SMC MacBook Air",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,
	  ASMC_MBA_TEMPS, ASMC_MBA_TEMPNAMES, ASMC_MBA_TEMPDESCS
	},	

	{
	  "MacBookAir3,1", "Apple SMC MacBook Air Core 2 Duo (Late 2010)",
	  ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,
	  ASMC_MBA3_TEMPS, ASMC_MBA3_TEMPNAMES, ASMC_MBA3_TEMPDESCS
	},	

	{
	  "MacBookAir5,1", "Apple SMC MacBook Air 11-inch (Mid 2012)",
	  ASMC_SMS_FUNCS_DISABLED,
	  ASMC_FAN_FUNCS2, 
	  ASMC_LIGHT_FUNCS,
	  ASMC_MBA5_TEMPS, ASMC_MBA5_TEMPNAMES, ASMC_MBA5_TEMPDESCS
	},	

	{
	  "MacBookAir5,2", "Apple SMC MacBook Air 13-inch (Mid 2012)",
	  ASMC_SMS_FUNCS_DISABLED,
	  ASMC_FAN_FUNCS2, 
	  ASMC_LIGHT_FUNCS,
	  ASMC_MBA5_TEMPS, ASMC_MBA5_TEMPNAMES, ASMC_MBA5_TEMPDESCS
	},	


	
	{ NULL, NULL }
};


#ifdef DEBUG
#define ASMC_DPRINTF(str)	device_printf(dev, str)
#else
#define ASMC_DPRINTF(str)	
#endif

/* NB: can't be const */

		return (ENXIO);
	if (ACPI_ID_PROBE(device_get_parent(dev), dev, asmc_ids) == NULL)
		return (ENXIO);
	
	model = asmc_match(dev);
	if (!model) {
		device_printf(dev, "model not recognized\n");

		device_printf(dev, "unable to allocate IO port\n");
		return (ENOMEM);
	}
	
	sysctlctx  = device_get_sysctl_ctx(dev);
	sysctlnode = device_get_sysctl_tree(dev);
	
	model = asmc_match(dev);

	mtx_init(&sc->sc_mtx, "asmc", NULL, MTX_SPIN);

		sc->sc_light_tree = SYSCTL_ADD_NODE(sysctlctx,
		    SYSCTL_CHILDREN(sysctlnode), OID_AUTO, "light",
		    CTLFLAG_RD, 0, "Keyboard backlight sensors");
		
		SYSCTL_ADD_PROC(sysctlctx,
		    SYSCTL_CHILDREN(sc->sc_light_tree),
		    OID_AUTO, "left", CTLTYPE_INT | CTLFLAG_RD,
		    dev, 0, model->smc_light_left, "I",
		    "Keyboard backlight left sensor");
	
		SYSCTL_ADD_PROC(sysctlctx,
		    SYSCTL_CHILDREN(sc->sc_light_tree),
		    OID_AUTO, "right", CTLTYPE_INT | CTLFLAG_RD,

		goto err2;
	}

	ret = bus_setup_intr(dev, sc->sc_irq, 
	          INTR_TYPE_MISC | INTR_MPSAFE,
#ifdef INTR_FILTER
	    asmc_sms_intrfast, asmc_sms_handler,

	asmc_key_write(dev, ASMC_KEY_INTOK, buf, 1);
	DELAY(50);

	/* 
	 * Initiate the polling intervals.
	 */
	buf[0] = 20; /* msecs */

	DELAY(100);

	sc->sc_sms_intr_works = 0;
	
	/*
	 * Retry SMS initialization 1000 times
	 * (takes approx. 2 seconds in worst case)
	 */
	for (i = 0; i < 1000; i++) {
		if (asmc_key_read(dev, ASMC_KEY_SMS, buf, 2) == 0 && 
		    (buf[0] == ASMC_SMS_INIT1 && buf[1] == ASMC_SMS_INIT2)) {
			error = 0;
			sc->sc_sms_intr_works = 1;

		 */
		asmc_key_read(dev, ASMC_NKEYS, buf, 4);
		device_printf(dev, "number of keys: %d\n", ntohl(*(uint32_t*)buf));
	}	      

#ifdef DEBUG
	asmc_dumpall(dev);

#ifdef DEBUG
	device_printf(dev, "%s failed: 0x%x, 0x%x\n", __func__, val,
	    ASMC_CMDPORT_READ(sc));
#endif	
	return (1);
}
	
/*
 * Send the given command, retrying up to 10 times if
 * the acknowledgement fails.

		maxlen = type[0];
		type[0] = ' ';
		type[5] = 0;
		if (maxlen > sizeof(v)) {	
			device_printf(dev,
			    "WARNING: cropping maxlen from %d to %zu\n",
			    maxlen, sizeof(v));

	uint8_t buf[2];
	int error;

	/* no need to do locking here as asmc_key_read() already does it */ 
	switch (key[3]) {
	case 'X':
	case 'Y':

asmc_sms_handler(void *arg)
{
	struct asmc_softc *sc = device_get_softc(arg);
	
	asmc_sms_task(sc, 0);
}
#endif

	}

	snprintf(notify, sizeof(notify), " notify=0x%x", type);
	devctl_notify("ACPI", "asmc", "SMS", notify); 
}

static int

	uint8_t buf[6];
	int error;
	int32_t v;
	
	asmc_key_read(dev, ASMC_KEY_LIGHTRIGHT, buf, sizeof buf);
	v = buf[2];
	error = sysctl_handle_int(oidp, &v, 0, req);
	
	return (error);
}







/* Number of keys */
#define ASMC_NKEYS		"#KEY"	/* RO; 4 bytes */ 

/*
 * Fan control via SMC.

#define ASMC_MB31_TEMPDESCS	{ "Enclosure Bottomside", \
				  "Northbridge Point 1", \
				  "Heatsink 1","Heatsink 2" \
				  "Memory Bank A", } 

#define ASMC_MBP_TEMPS		{ "TB0T", "Th0H", "Th1H", "Tm0P",	\
				  "TG0H", "TG0P", "TG0T", NULL }

				  "Heatsink 1", "Heatsink 2", \
				  "Memory Controller", \
				  "Graphics Chip", "Graphics Heatsink", \
				  "Unknown", } 

#define ASMC_MBP4_TEMPS		{ "TB0T", "Th0H", "Th1H", "Th2H", "Tm0P", \
				  "TG0H", "TG0D", "TC0D", "TC0P", "Ts0P", \

				  "Graphics Chip Diode", \
				  "CPU Temperature Diode", "CPU Point 2", \
				  "Unknown", "Unknown", \
				  "Wireless Module", } 

#define ASMC_MBP5_TEMPS		{ "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", \
				  "TC0F", "TC0P", "TG0D", "TG0F", "TG0H", \
				  "TG0P", "TG0T", "TG1H", "TN0D", "TN0P", \
				  "TTF0", "Th2H", "Tm0P", "Ts0P", "Ts0S", \
				  NULL } 

#define ASMC_MBP5_TEMPNAMES	{ "enclosure_bottom_0", "enclosure_bottom_1", \
				  "enclosure_bottom_2", "enclosure_bottom_3", \

				  "gpu_2_heatsink", "northbridge_diode", \
				  "northbridge_pin", "unknown", \
				  "heatsink_2", "memory_controller", \
				  "pci_express_slot_pin", "pci_express_slot_unk" } 

#define ASMC_MBP5_TEMPDESCS	{ "Enclosure Bottom 0", "Enclosure Bottom 1", \
				  "Enclosure Bottom 2", "Enclosure Bottom 3", \

				  "GPU 2 Heatsink", "Northbridge Diode", \
				  "Northbridge Pin", "Unknown", \
				  "Heatsink 2", "Memory Controller", \
				  "PCI Express Slot Pin", "PCI Express Slot (unk)" } 

#define ASMC_MBP81_TEMPS		{ "TB0T", "TB1T", "TB2T", "TC0C", "TC0D", \
				  "TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
			      "TCFC", "TCGC", "TCSA", "TM0S", "TMBS", \
                  "TP0P", "TPCD", "TW0P", "Th1H", "Ts0P", \
                  "Ts0S", NULL }

#define ASMC_MBP81_TEMPNAMES	{ "enclosure", "TB1T", "TB2T", "TC0C", "TC0D", \
				  "TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
				  "TCFC", "TCGC", "TCSA", "TM0S", "TMBS", \
                  "TP0P", "TPCD", "wireless", "Th1H", "Ts0P", \
                  "Ts0S" }

#define ASMC_MBP81_TEMPDESCS	{ "Enclosure Bottomside", "TB1T", "TB2T", "TC0C", "TC0D", \
				  "TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
				  "TCFC", "TCGC", "TCSA", "TM0S", "TMBS", \
                  "TP0P", "TPCD", "TW0P", "Th1H", "Ts0P", \
                  "Ts0S" }

#define ASMC_MBP8_TEMPS		{ "TB0T", "TB1T", "TB2T", "TC0C", "TC0D", \
				  "TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
				  "TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \
				  "TCTD", "TG0D", "TG0P", "THSP", "TM0S", \
				  "TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \
				  "Th2H", "Tm0P", "Ts0P", "Ts0S", NULL } 

#define ASMC_MBP8_TEMPNAMES	{ "enclosure", "TB1T", "TB2T", "TC0C", "TC0D", \
				  "TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
				  "TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \
				  "TCTD", "graphics", "TG0P", "THSP", "TM0S", \
				  "TMBS", "TP0P", "TPCD", "wireless", "Th1H", \
				  "Th2H", "memory", "Ts0P", "Ts0S" } 

#define ASMC_MBP8_TEMPDESCS	{ "Enclosure Bottomside", "TB1T", "TB2T", "TC0C", "TC0D", \
				  "TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
				  "TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \
				  "TCTD", "TG0D", "TG0P", "THSP", "TM0S", \
				  "TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \
				  "Th2H", "Tm0P", "Ts0P", "Ts0S" } 

#define ASMC_MBP11_TEMPS	{ "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
				  "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \

				  "TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
				  "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
				  "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
				  "Ts1S", NULL } 

#define ASMC_MBP11_TEMPNAMES	{ "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
				  "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \

				  "TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
				  "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
				  "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
				  "Ts1S" } 

#define ASMC_MBP11_TEMPDESCS	{ "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
				  "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \

				  "TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
				  "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
				  "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
				  "Ts1S" } 

#define ASMC_MM_TEMPS		{ "TN0P", "TN1P", NULL }
#define ASMC_MM_TEMPNAMES	{ "northbridge1", "northbridge2" }

Return to bug 217505

Lines 155-167 Link Here

(-)asmc.c.orig (-49 / +43 lines)
155	asmc_mbp_sysctl_light_control	155	asmc_mbp_sysctl_light_control
156		156
157	struct asmc_model asmc_models[] = {	157	struct asmc_model asmc_models[] = {
158	{	158	{
159	"MacBook1,1", "Apple SMC MacBook Core Duo",	159	"MacBook1,1", "Apple SMC MacBook Core Duo",
160	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,	160	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,
161	ASMC_MB_TEMPS, ASMC_MB_TEMPNAMES, ASMC_MB_TEMPDESCS	161	ASMC_MB_TEMPS, ASMC_MB_TEMPNAMES, ASMC_MB_TEMPDESCS
162	},	162	},
163		163
164	{	164	{
165	"MacBook2,1", "Apple SMC MacBook Core 2 Duo",	165	"MacBook2,1", "Apple SMC MacBook Core 2 Duo",
166	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,	166	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,
167	ASMC_MB_TEMPS, ASMC_MB_TEMPNAMES, ASMC_MB_TEMPDESCS	167	ASMC_MB_TEMPS, ASMC_MB_TEMPNAMES, ASMC_MB_TEMPDESCS
Lines 173-246 Link Here
173	ASMC_MB31_TEMPS, ASMC_MB31_TEMPNAMES, ASMC_MB31_TEMPDESCS	173	ASMC_MB31_TEMPS, ASMC_MB31_TEMPNAMES, ASMC_MB31_TEMPDESCS
174	},	174	},
175		175
176	{	176	{
177	"MacBookPro1,1", "Apple SMC MacBook Pro Core Duo (15-inch)",	177	"MacBookPro1,1", "Apple SMC MacBook Pro Core Duo (15-inch)",
178	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	178	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
179	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS	179	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
180	},	180	},
181		181
182	{	182	{
183	"MacBookPro1,2", "Apple SMC MacBook Pro Core Duo (17-inch)",	183	"MacBookPro1,2", "Apple SMC MacBook Pro Core Duo (17-inch)",
184	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	184	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
185	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS	185	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
186	},	186	},
187		187
188	{	188	{
189	"MacBookPro2,1", "Apple SMC MacBook Pro Core 2 Duo (17-inch)",	189	"MacBookPro2,1", "Apple SMC MacBook Pro Core 2 Duo (17-inch)",
190	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	190	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
191	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS	191	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
192	},	192	},
193		193
194	{	194	{
195	"MacBookPro2,2", "Apple SMC MacBook Pro Core 2 Duo (15-inch)",	195	"MacBookPro2,2", "Apple SMC MacBook Pro Core 2 Duo (15-inch)",
196	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	196	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
197	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS	197	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
198	},	198	},
199		199
200	{	200	{
201	"MacBookPro3,1", "Apple SMC MacBook Pro Core 2 Duo (15-inch LED)",	201	"MacBookPro3,1", "Apple SMC MacBook Pro Core 2 Duo (15-inch LED)",
202	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	202	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
203	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS	203	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
204	},	204	},
205		205
206	{	206	{
207	"MacBookPro3,2", "Apple SMC MacBook Pro Core 2 Duo (17-inch HD)",	207	"MacBookPro3,2", "Apple SMC MacBook Pro Core 2 Duo (17-inch HD)",
208	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	208	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
209	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS	209	ASMC_MBP_TEMPS, ASMC_MBP_TEMPNAMES, ASMC_MBP_TEMPDESCS
210	},	210	},
211		211
212	{	212	{
213	"MacBookPro4,1", "Apple SMC MacBook Pro Core 2 Duo (Penryn)",	213	"MacBookPro4,1", "Apple SMC MacBook Pro Core 2 Duo (Penryn)",
214	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	214	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
215	ASMC_MBP4_TEMPS, ASMC_MBP4_TEMPNAMES, ASMC_MBP4_TEMPDESCS	215	ASMC_MBP4_TEMPS, ASMC_MBP4_TEMPNAMES, ASMC_MBP4_TEMPDESCS
216	},	216	},
217		217
218	{	218	{
219	"MacBookPro5,1", "Apple SMC MacBook Pro Core 2 Duo (2008/2009)",	219	"MacBookPro5,1", "Apple SMC MacBook Pro Core 2 Duo (2008/2009)",
220	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	220	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
221	ASMC_MBP5_TEMPS, ASMC_MBP5_TEMPNAMES, ASMC_MBP5_TEMPDESCS	221	ASMC_MBP5_TEMPS, ASMC_MBP5_TEMPNAMES, ASMC_MBP5_TEMPDESCS
222	},	222	},
223		223
224	{	224	{
225	"MacBookPro8,1", "Apple SMC MacBook Pro (early 2011, 13-inch)",
226	ASMC_SMS_FUNCS_DISABLED, ASMC_FAN_FUNCS2, ASMC_LIGHT_FUNCS,
227	ASMC_MBP81_TEMPS, ASMC_MBP81_TEMPNAMES, ASMC_MBP81_TEMPDESCS
228	},
229
230	{
231	"MacBookPro8,2", "Apple SMC MacBook Pro (early 2011)",	225	"MacBookPro8,2", "Apple SMC MacBook Pro (early 2011)",
232	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	226	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
233	ASMC_MBP82_TEMPS, ASMC_MBP82_TEMPNAMES, ASMC_MBP82_TEMPDESCS	227	ASMC_MBP8_TEMPS, ASMC_MBP8_TEMPNAMES, ASMC_MBP8_TEMPDESCS
234	},	228	},
235		229
236	{	230	{
237	"MacBookPro11,3", "Apple SMC MacBook Pro Retina Core i7 (2013/2014)",	231	"MacBookPro11,3", "Apple SMC MacBook Pro Retina Core i7 (2013/2014)",
238	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,	232	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, ASMC_LIGHT_FUNCS,
239	ASMC_MBP11_TEMPS, ASMC_MBP11_TEMPNAMES, ASMC_MBP11_TEMPDESCS	233	ASMC_MBP11_TEMPS, ASMC_MBP11_TEMPNAMES, ASMC_MBP11_TEMPDESCS
240	},	234	},
241		235
242	/* The Mac Mini has no SMS */	236	/* The Mac Mini has no SMS */
243	{	237	{
244	"Macmini1,1", "Apple SMC Mac Mini",	238	"Macmini1,1", "Apple SMC Mac Mini",
245	NULL, NULL, NULL,	239	NULL, NULL, NULL,
246	ASMC_FAN_FUNCS,	240	ASMC_FAN_FUNCS,
Lines 249-255 Link Here
249	},	243	},
250		244
251	/* The Mac Mini 3,1 has no SMS */	245	/* The Mac Mini 3,1 has no SMS */
252	{	246	{
253	"Macmini3,1", "Apple SMC Mac Mini 3,1",	247	"Macmini3,1", "Apple SMC Mac Mini 3,1",
254	NULL, NULL, NULL,	248	NULL, NULL, NULL,
255	ASMC_FAN_FUNCS,	249	ASMC_FAN_FUNCS,
Lines 279-309 Link Here
279	"MacBookAir1,1", "Apple SMC MacBook Air",	273	"MacBookAir1,1", "Apple SMC MacBook Air",
280	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,	274	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,
281	ASMC_MBA_TEMPS, ASMC_MBA_TEMPNAMES, ASMC_MBA_TEMPDESCS	275	ASMC_MBA_TEMPS, ASMC_MBA_TEMPNAMES, ASMC_MBA_TEMPDESCS
282	},	276	},
283		277
284	{	278	{
285	"MacBookAir3,1", "Apple SMC MacBook Air Core 2 Duo (Late 2010)",	279	"MacBookAir3,1", "Apple SMC MacBook Air Core 2 Duo (Late 2010)",
286	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,	280	ASMC_SMS_FUNCS, ASMC_FAN_FUNCS, NULL, NULL, NULL,
287	ASMC_MBA3_TEMPS, ASMC_MBA3_TEMPNAMES, ASMC_MBA3_TEMPDESCS	281	ASMC_MBA3_TEMPS, ASMC_MBA3_TEMPNAMES, ASMC_MBA3_TEMPDESCS
288	},	282	},
289		283
290	{	284	{
291	"MacBookAir5,1", "Apple SMC MacBook Air 11-inch (Mid 2012)",	285	"MacBookAir5,1", "Apple SMC MacBook Air 11-inch (Mid 2012)",
292	ASMC_SMS_FUNCS_DISABLED,	286	ASMC_SMS_FUNCS_DISABLED,
293	ASMC_FAN_FUNCS2,	287	ASMC_FAN_FUNCS2,
294	ASMC_LIGHT_FUNCS,	288	ASMC_LIGHT_FUNCS,
295	ASMC_MBA5_TEMPS, ASMC_MBA5_TEMPNAMES, ASMC_MBA5_TEMPDESCS	289	ASMC_MBA5_TEMPS, ASMC_MBA5_TEMPNAMES, ASMC_MBA5_TEMPDESCS
296	},	290	},
297		291
298	{	292	{
299	"MacBookAir5,2", "Apple SMC MacBook Air 13-inch (Mid 2012)",	293	"MacBookAir5,2", "Apple SMC MacBook Air 13-inch (Mid 2012)",
300	ASMC_SMS_FUNCS_DISABLED,	294	ASMC_SMS_FUNCS_DISABLED,
301	ASMC_FAN_FUNCS2,	295	ASMC_FAN_FUNCS2,
302	ASMC_LIGHT_FUNCS,	296	ASMC_LIGHT_FUNCS,
303	ASMC_MBA5_TEMPS, ASMC_MBA5_TEMPNAMES, ASMC_MBA5_TEMPDESCS	297	ASMC_MBA5_TEMPS, ASMC_MBA5_TEMPNAMES, ASMC_MBA5_TEMPDESCS
304	},	298	},
305
306		299
		300
307	{ NULL, NULL }	301	{ NULL, NULL }
308	};	302	};
309		303
Lines 339-345 Link Here
339	#ifdef DEBUG	333	#ifdef DEBUG
340	#define ASMC_DPRINTF(str) device_printf(dev, str)	334	#define ASMC_DPRINTF(str) device_printf(dev, str)
341	#else	335	#else
342	#define ASMC_DPRINTF(str)	336	#define ASMC_DPRINTF(str)
343	#endif	337	#endif
344		338
345	/* NB: can't be const */	339	/* NB: can't be const */
Lines 382-388 Link Here
382	return (ENXIO);	376	return (ENXIO);
383	if (ACPI_ID_PROBE(device_get_parent(dev), dev, asmc_ids) == NULL)	377	if (ACPI_ID_PROBE(device_get_parent(dev), dev, asmc_ids) == NULL)
384	return (ENXIO);	378	return (ENXIO);
385		379
386	model = asmc_match(dev);	380	model = asmc_match(dev);
387	if (!model) {	381	if (!model) {
388	device_printf(dev, "model not recognized\n");	382	device_printf(dev, "model not recognized\n");
Lines 410-419 Link Here
410	device_printf(dev, "unable to allocate IO port\n");	404	device_printf(dev, "unable to allocate IO port\n");
411	return (ENOMEM);	405	return (ENOMEM);
412	}	406	}
413		407
414	sysctlctx = device_get_sysctl_ctx(dev);	408	sysctlctx = device_get_sysctl_ctx(dev);
415	sysctlnode = device_get_sysctl_tree(dev);	409	sysctlnode = device_get_sysctl_tree(dev);
416		410
417	model = asmc_match(dev);	411	model = asmc_match(dev);
418		412
419	mtx_init(&sc->sc_mtx, "asmc", NULL, MTX_SPIN);	413	mtx_init(&sc->sc_mtx, "asmc", NULL, MTX_SPIN);
Lines 501-513 Link Here
501	sc->sc_light_tree = SYSCTL_ADD_NODE(sysctlctx,	495	sc->sc_light_tree = SYSCTL_ADD_NODE(sysctlctx,
502	SYSCTL_CHILDREN(sysctlnode), OID_AUTO, "light",	496	SYSCTL_CHILDREN(sysctlnode), OID_AUTO, "light",
503	CTLFLAG_RD, 0, "Keyboard backlight sensors");	497	CTLFLAG_RD, 0, "Keyboard backlight sensors");
504		498
505	SYSCTL_ADD_PROC(sysctlctx,	499	SYSCTL_ADD_PROC(sysctlctx,
506	SYSCTL_CHILDREN(sc->sc_light_tree),	500	SYSCTL_CHILDREN(sc->sc_light_tree),
507	OID_AUTO, "left", CTLTYPE_INT \| CTLFLAG_RD,	501	OID_AUTO, "left", CTLTYPE_INT \| CTLFLAG_RD,
508	dev, 0, model->smc_light_left, "I",	502	dev, 0, model->smc_light_left, "I",
509	"Keyboard backlight left sensor");	503	"Keyboard backlight left sensor");
510		504
511	SYSCTL_ADD_PROC(sysctlctx,	505	SYSCTL_ADD_PROC(sysctlctx,
512	SYSCTL_CHILDREN(sc->sc_light_tree),	506	SYSCTL_CHILDREN(sc->sc_light_tree),
513	OID_AUTO, "right", CTLTYPE_INT \| CTLFLAG_RD,	507	OID_AUTO, "right", CTLTYPE_INT \| CTLFLAG_RD,
Lines 580-586 Link Here
580	goto err2;	574	goto err2;
581	}	575	}
582		576
583	ret = bus_setup_intr(dev, sc->sc_irq,	577	ret = bus_setup_intr(dev, sc->sc_irq,
584	INTR_TYPE_MISC \| INTR_MPSAFE,	578	INTR_TYPE_MISC \| INTR_MPSAFE,
585	#ifdef INTR_FILTER	579	#ifdef INTR_FILTER
586	asmc_sms_intrfast, asmc_sms_handler,	580	asmc_sms_intrfast, asmc_sms_handler,
Lines 669-675 Link Here
669	asmc_key_write(dev, ASMC_KEY_INTOK, buf, 1);	663	asmc_key_write(dev, ASMC_KEY_INTOK, buf, 1);
670	DELAY(50);	664	DELAY(50);
671		665
672	/*	666	/*
673	* Initiate the polling intervals.	667	* Initiate the polling intervals.
674	*/	668	*/
675	buf[0] = 20; /* msecs */	669	buf[0] = 20; /* msecs */
Lines 704-716 Link Here
704	DELAY(100);	698	DELAY(100);
705		699
706	sc->sc_sms_intr_works = 0;	700	sc->sc_sms_intr_works = 0;
707		701
708	/*	702	/*
709	* Retry SMS initialization 1000 times	703	* Retry SMS initialization 1000 times
710	* (takes approx. 2 seconds in worst case)	704	* (takes approx. 2 seconds in worst case)
711	*/	705	*/
712	for (i = 0; i < 1000; i++) {	706	for (i = 0; i < 1000; i++) {
713	if (asmc_key_read(dev, ASMC_KEY_SMS, buf, 2) == 0 &&	707	if (asmc_key_read(dev, ASMC_KEY_SMS, buf, 2) == 0 &&
714	(buf[0] == ASMC_SMS_INIT1 && buf[1] == ASMC_SMS_INIT2)) {	708	(buf[0] == ASMC_SMS_INIT1 && buf[1] == ASMC_SMS_INIT2)) {
715	error = 0;	709	error = 0;
716	sc->sc_sms_intr_works = 1;	710	sc->sc_sms_intr_works = 1;
Lines 740-746 Link Here
740	*/	734	*/
741	asmc_key_read(dev, ASMC_NKEYS, buf, 4);	735	asmc_key_read(dev, ASMC_NKEYS, buf, 4);
742	device_printf(dev, "number of keys: %d\n", ntohl((uint32_t)buf));	736	device_printf(dev, "number of keys: %d\n", ntohl((uint32_t)buf));
743	}	737	}
744		738
745	#ifdef DEBUG	739	#ifdef DEBUG
746	asmc_dumpall(dev);	740	asmc_dumpall(dev);
Lines 788-797 Link Here
788	#ifdef DEBUG	782	#ifdef DEBUG
789	device_printf(dev, "%s failed: 0x%x, 0x%x\n", __func__, val,	783	device_printf(dev, "%s failed: 0x%x, 0x%x\n", __func__, val,
790	ASMC_CMDPORT_READ(sc));	784	ASMC_CMDPORT_READ(sc));
791	#endif	785	#endif
792	return (1);	786	return (1);
793	}	787	}
794		788
795	/*	789	/*
796	* Send the given command, retrying up to 10 times if	790	* Send the given command, retrying up to 10 times if
797	* the acknowledgement fails.	791	* the acknowledgement fails.
Lines 925-931 Link Here
925	maxlen = type[0];	919	maxlen = type[0];
926	type[0] = ' ';	920	type[0] = ' ';
927	type[5] = 0;	921	type[5] = 0;
928	if (maxlen > sizeof(v)) {	922	if (maxlen > sizeof(v)) {
929	device_printf(dev,	923	device_printf(dev,
930	"WARNING: cropping maxlen from %d to %zu\n",	924	"WARNING: cropping maxlen from %d to %zu\n",
931	maxlen, sizeof(v));	925	maxlen, sizeof(v));
Lines 1195-1201 Link Here
1195	uint8_t buf[2];	1189	uint8_t buf[2];
1196	int error;	1190	int error;
1197		1191
1198	/* no need to do locking here as asmc_key_read() already does it */	1192	/* no need to do locking here as asmc_key_read() already does it */
1199	switch (key[3]) {	1193	switch (key[3]) {
1200	case 'X':	1194	case 'X':
1201	case 'Y':	1195	case 'Y':
Lines 1252-1258 Link Here
1252	asmc_sms_handler(void *arg)	1246	asmc_sms_handler(void *arg)
1253	{	1247	{
1254	struct asmc_softc *sc = device_get_softc(arg);	1248	struct asmc_softc *sc = device_get_softc(arg);
1255		1249
1256	asmc_sms_task(sc, 0);	1250	asmc_sms_task(sc, 0);
1257	}	1251	}
1258	#endif	1252	#endif
Lines 1299-1305 Link Here
1299	}	1293	}
1300		1294
1301	snprintf(notify, sizeof(notify), " notify=0x%x", type);	1295	snprintf(notify, sizeof(notify), " notify=0x%x", type);
1302	devctl_notify("ACPI", "asmc", "SMS", notify);	1296	devctl_notify("ACPI", "asmc", "SMS", notify);
1303	}	1297	}
1304		1298
1305	static int	1299	static int
Lines 1369-1379 Link Here
1369	uint8_t buf[6];	1363	uint8_t buf[6];
1370	int error;	1364	int error;
1371	int32_t v;	1365	int32_t v;
1372		1366
1373	asmc_key_read(dev, ASMC_KEY_LIGHTRIGHT, buf, sizeof buf);	1367	asmc_key_read(dev, ASMC_KEY_LIGHTRIGHT, buf, sizeof buf);
1374	v = buf[2];	1368	v = buf[2];
1375	error = sysctl_handle_int(oidp, &v, 0, req);	1369	error = sysctl_handle_int(oidp, &v, 0, req);
1376		1370
1377	return (error);	1371	return (error);
1378	}	1372	}
1379		1373

Lines 76-82 Link Here

(-)asmcvar.h.orig (-34 / +16 lines)
76		76
77		77
78	/* Number of keys */	78	/* Number of keys */
79	#define ASMC_NKEYS "#KEY" /* RO; 4 bytes */	79	#define ASMC_NKEYS "#KEY" /* RO; 4 bytes */
80		80
81	/*	81	/*
82	* Fan control via SMC.	82	* Fan control via SMC.
Lines 154-160 Link Here
154	#define ASMC_MB31_TEMPDESCS { "Enclosure Bottomside", \	154	#define ASMC_MB31_TEMPDESCS { "Enclosure Bottomside", \
155	"Northbridge Point 1", \	155	"Northbridge Point 1", \
156	"Heatsink 1","Heatsink 2" \	156	"Heatsink 1","Heatsink 2" \
157	"Memory Bank A", }	157	"Memory Bank A", }
158		158
159	#define ASMC_MBP_TEMPS { "TB0T", "Th0H", "Th1H", "Tm0P", \	159	#define ASMC_MBP_TEMPS { "TB0T", "Th0H", "Th1H", "Tm0P", \
160	"TG0H", "TG0P", "TG0T", NULL }	160	"TG0H", "TG0P", "TG0T", NULL }
Lines 167-173 Link Here
167	"Heatsink 1", "Heatsink 2", \	167	"Heatsink 1", "Heatsink 2", \
168	"Memory Controller", \	168	"Memory Controller", \
169	"Graphics Chip", "Graphics Heatsink", \	169	"Graphics Chip", "Graphics Heatsink", \
170	"Unknown", }	170	"Unknown", }
171		171
172	#define ASMC_MBP4_TEMPS { "TB0T", "Th0H", "Th1H", "Th2H", "Tm0P", \	172	#define ASMC_MBP4_TEMPS { "TB0T", "Th0H", "Th1H", "Th2H", "Tm0P", \
173	"TG0H", "TG0D", "TC0D", "TC0P", "Ts0P", \	173	"TG0H", "TG0D", "TC0D", "TC0P", "Ts0P", \
Lines 186-198 Link Here
186	"Graphics Chip Diode", \	186	"Graphics Chip Diode", \
187	"CPU Temperature Diode", "CPU Point 2", \	187	"CPU Temperature Diode", "CPU Point 2", \
188	"Unknown", "Unknown", \	188	"Unknown", "Unknown", \
189	"Wireless Module", }	189	"Wireless Module", }
190		190
191	#define ASMC_MBP5_TEMPS { "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", \	191	#define ASMC_MBP5_TEMPS { "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", \
192	"TC0F", "TC0P", "TG0D", "TG0F", "TG0H", \	192	"TC0F", "TC0P", "TG0D", "TG0F", "TG0H", \
193	"TG0P", "TG0T", "TG1H", "TN0D", "TN0P", \	193	"TG0P", "TG0T", "TG1H", "TN0D", "TN0P", \
194	"TTF0", "Th2H", "Tm0P", "Ts0P", "Ts0S", \	194	"TTF0", "Th2H", "Tm0P", "Ts0P", "Ts0S", \
195	NULL }	195	NULL }
196		196
197	#define ASMC_MBP5_TEMPNAMES { "enclosure_bottom_0", "enclosure_bottom_1", \	197	#define ASMC_MBP5_TEMPNAMES { "enclosure_bottom_0", "enclosure_bottom_1", \
198	"enclosure_bottom_2", "enclosure_bottom_3", \	198	"enclosure_bottom_2", "enclosure_bottom_3", \
Lines 203-209 Link Here
203	"gpu_2_heatsink", "northbridge_diode", \	203	"gpu_2_heatsink", "northbridge_diode", \
204	"northbridge_pin", "unknown", \	204	"northbridge_pin", "unknown", \
205	"heatsink_2", "memory_controller", \	205	"heatsink_2", "memory_controller", \
206	"pci_express_slot_pin", "pci_express_slot_unk" }	206	"pci_express_slot_pin", "pci_express_slot_unk" }
207		207
208	#define ASMC_MBP5_TEMPDESCS { "Enclosure Bottom 0", "Enclosure Bottom 1", \	208	#define ASMC_MBP5_TEMPDESCS { "Enclosure Bottom 0", "Enclosure Bottom 1", \
209	"Enclosure Bottom 2", "Enclosure Bottom 3", \	209	"Enclosure Bottom 2", "Enclosure Bottom 3", \
Lines 214-259 Link Here
214	"GPU 2 Heatsink", "Northbridge Diode", \	214	"GPU 2 Heatsink", "Northbridge Diode", \
215	"Northbridge Pin", "Unknown", \	215	"Northbridge Pin", "Unknown", \
216	"Heatsink 2", "Memory Controller", \	216	"Heatsink 2", "Memory Controller", \
217	"PCI Express Slot Pin", "PCI Express Slot (unk)" }	217	"PCI Express Slot Pin", "PCI Express Slot (unk)" }
218
219	#define ASMC_MBP81_TEMPS { "TB0T", "TB1T", "TB2T", "TC0C", "TC0D", \
220	"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
221	"TCFC", "TCGC", "TCSA", "TM0S", "TMBS", \
222	"TP0P", "TPCD", "TW0P", "Th1H", "Ts0P", \
223	"Ts0S", NULL }
224
225	#define ASMC_MBP81_TEMPNAMES { "enclosure", "TB1T", "TB2T", "TC0C", "TC0D", \
226	"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
227	"TCFC", "TCGC", "TCSA", "TM0S", "TMBS", \
228	"TP0P", "TPCD", "wireless", "Th1H", "Ts0P", \
229	"Ts0S" }
230
231	#define ASMC_MBP81_TEMPDESCS { "Enclosure Bottomside", "TB1T", "TB2T", "TC0C", "TC0D", \
232	"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
233	"TCFC", "TCGC", "TCSA", "TM0S", "TMBS", \
234	"TP0P", "TPCD", "TW0P", "Th1H", "Ts0P", \
235	"Ts0S" }
236		218
237	#define ASMC_MBP82_TEMPS { "TB0T", "TB1T", "TB2T", "TC0C", "TC0D", \	219	#define ASMC_MBP8_TEMPS { "TB0T", "TB1T", "TB2T", "TC0C", "TC0D", \
238	"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \	220	"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
239	"TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \	221	"TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \
240	"TCTD", "TG0D", "TG0P", "THSP", "TM0S", \	222	"TCTD", "TG0D", "TG0P", "THSP", "TM0S", \
241	"TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \	223	"TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \
242	"Th2H", "Tm0P", "Ts0P", "Ts0S", NULL }	224	"Th2H", "Tm0P", "Ts0P", "Ts0S", NULL }
243		225
244	#define ASMC_MBP82_TEMPNAMES { "enclosure", "TB1T", "TB2T", "TC0C", "TC0D", \	226	#define ASMC_MBP8_TEMPNAMES { "enclosure", "TB1T", "TB2T", "TC0C", "TC0D", \
245	"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \	227	"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
246	"TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \	228	"TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \
247	"TCTD", "graphics", "TG0P", "THSP", "TM0S", \	229	"TCTD", "graphics", "TG0P", "THSP", "TM0S", \
248	"TMBS", "TP0P", "TPCD", "wireless", "Th1H", \	230	"TMBS", "TP0P", "TPCD", "wireless", "Th1H", \
249	"Th2H", "memory", "Ts0P", "Ts0S" }	231	"Th2H", "memory", "Ts0P", "Ts0S" }
250		232
251	#define ASMC_MBP82_TEMPDESCS { "Enclosure Bottomside", "TB1T", "TB2T", "TC0C", "TC0D", \	233	#define ASMC_MBP8_TEMPDESCS { "Enclosure Bottomside", "TB1T", "TB2T", "TC0C", "TC0D", \
252	"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \	234	"TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \
253	"TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \	235	"TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \
254	"TCTD", "TG0D", "TG0P", "THSP", "TM0S", \	236	"TCTD", "TG0D", "TG0P", "THSP", "TM0S", \
255	"TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \	237	"TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \
256	"Th2H", "Tm0P", "Ts0P", "Ts0S" }	238	"Th2H", "Tm0P", "Ts0P", "Ts0S" }
257		239
258	#define ASMC_MBP11_TEMPS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \	240	#define ASMC_MBP11_TEMPS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
259	"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \	241	"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
Lines 263-269 Link Here
263	"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \	245	"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
264	"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \	246	"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
265	"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \	247	"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
266	"Ts1S", NULL }	248	"Ts1S", NULL }
267		249
268	#define ASMC_MBP11_TEMPNAMES { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \	250	#define ASMC_MBP11_TEMPNAMES { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
269	"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \	251	"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
Lines 273-279 Link Here
273	"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \	255	"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
274	"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \	256	"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
275	"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \	257	"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
276	"Ts1S" }	258	"Ts1S" }
277		259
278	#define ASMC_MBP11_TEMPDESCS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \	260	#define ASMC_MBP11_TEMPDESCS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \
279	"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \	261	"TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \
Lines 283-289 Link Here
283	"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \	265	"TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \
284	"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \	266	"TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \
285	"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \	267	"TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \
286	"Ts1S" }	268	"Ts1S" }
287		269
288	#define ASMC_MM_TEMPS { "TN0P", "TN1P", NULL }	270	#define ASMC_MM_TEMPS { "TN0P", "TN1P", NULL }
289	#define ASMC_MM_TEMPNAMES { "northbridge1", "northbridge2" }	271	#define ASMC_MM_TEMPNAMES { "northbridge1", "northbridge2" }