Index: dev/asmc/asmc.c =================================================================== --- dev/asmc/asmc.c (revision 312307) +++ dev/asmc/asmc.c (working copy) @@ -230,6 +230,15 @@ ASMC_MM31_TEMPS, ASMC_MM31_TEMPNAMES, ASMC_MM31_TEMPDESCS }, + /* Idem for the Mac Pro "Quad Core" (original) */ + { + "MacPro1,1", "Apple SMC Mac Pro (Quad Core - original)", + NULL, NULL, NULL, + ASMC_FAN_FUNCS, + NULL, NULL, NULL, + ASMC_MP_TEMPS, ASMC_MP_TEMPNAMES, ASMC_MP_TEMPDESCS + }, + /* Idem for the MacPro */ { "MacPro2", "Apple SMC Mac Pro (8-core)", Index: dev/asmc/asmcvar.h =================================================================== --- dev/asmc/asmcvar.h (revision 312307) +++ dev/asmc/asmcvar.h (working copy) @@ -251,30 +251,68 @@ "Northbridge Proximity Temperature", \ "Wireless Module Temperature", } -#define ASMC_MP_TEMPS { "TA0P", "TCAG", "TCAH", "TCBG", "TCBH", \ - "TC0C", "TC0D", "TC0P", "TC1C", "TC1D", \ - "TC2C", "TC2D", "TC3C", "TC3D", "THTG", \ - "TH0P", "TH1P", "TH2P", "TH3P", "TMAP", \ - "TMAS", "TMBS", "TM0P", "TM0S", "TM1P", \ - "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", \ - "TM8S", "TM9P", "TM9S", "TN0H", "TS0C", \ - NULL } +#define ASMC_MP_TEMPS { "TA0P", \ + "TCAH", "TCBH", \ + "TC0P", "TC0C", "TC1C", \ + "TC2C", "TC3C", "THTG", \ + "TH0P", "TH1P", \ + "TH2P", "TH3P", \ + "TM0P", "TM1P", "TM2P", \ + "TM8P", "TM9P", "TMAP", \ + "TM0S", "TM1S", "TM2P", "TM3S", \ + "TM8S", "TM9S", "TMAS", "TMBS", \ + "TN0H", "TS0C", \ + "Tp0C", "Tp1C", "Tv0S", "Tv1S", NULL } -#define ASMC_MP_TEMPNAMES { "TA0P", "TCAG", "TCAH", "TCBG", "TCBH", \ - "TC0C", "TC0D", "TC0P", "TC1C", "TC1D", \ - "TC2C", "TC2D", "TC3C", "TC3D", "THTG", \ - "TH0P", "TH1P", "TH2P", "TH3P", "TMAP", \ - "TMAS", "TMBS", "TM0P", "TM0S", "TM1P", \ - "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", \ - "TM8S", "TM9P", "TM9S", "TN0H", "TS0C", } +#define ASMC_MP_TEMPNAMES { "ambient", \ + "cpu_a_heatsink", "cpu_b_heatsink", \ + "cpu_a_proximity", "cpu_core0", "cpu_core1", \ + "cpu_core2", "cpu_core3", "THTG", \ + "hdd_bay0", "hdd_bay1", \ + "hdd_bay2", "hdd_bay3", \ + "memory_card_a_proximity0", \ + "memory_card_a_proximity1", \ + "memory_card_a_proximity2", \ + "memory_card_b_proximity0", \ + "memory_card_b_proximity1", \ + "memory_card_b_proximity2", \ + "memory_card_a_slot0", \ + "memory_card_a_slot1", \ + "memory_card_a_slot2", \ + "memory_card_a_slot3", \ + "memory_card_b_slot0", \ + "memory_card_b_slot1", \ + "memory_card_b_slot2", \ + "memory_card_b_slot3", \ + "mch_heatsink", "expansion_slots", \ + "power_supply_loc0", "power_supply_loc1", \ + "Tv0S", "Tv1S", } -#define ASMC_MP_TEMPDESCS { "TA0P", "TCAG", "TCAH", "TCBG", "TCBH", \ - "TC0C", "TC0D", "TC0P", "TC1C", "TC1D", \ - "TC2C", "TC2D", "TC3C", "TC3D", "THTG", \ - "TH0P", "TH1P", "TH2P", "TH3P", "TMAP", \ - "TMAS", "TMBS", "TM0P", "TM0S", "TM1P", \ - "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", \ - "TM8S", "TM9P", "TM9S", "TN0H", "TS0C", } +#define ASMC_MP_TEMPDESCS { "Ambient Air", \ + "CPU A Heatsink", "CPU B Heatsink", \ + "CPU A Proximity", \ + "CPU Core 1", "CPU Core 2", \ + "CPU Core 3", "CPU Core 4", "THTG", \ + "Hard Drive Bay 1", "Hard Drive Bay 2", \ + "Hard Drive Bay 3", "Hard Drive Bay 4", \ + "Memory Riser A, Proximity 1", \ + "Memory Riser A, Proximity 2", \ + "Memory Riser A, Proximity 3", \ + "Memory Riser B, Proximity 1", \ + "Memory Riser B, Proximity 2", \ + "Memory Riser B, Proximity 3", \ + "Memory Riser A, Slot 1", \ + "Memory Riser A, Slot 2", \ + "Memory Riser A, Slot 3", \ + "Memory Riser A, Slot 4", \ + "Memory Riser B, Slot 1", \ + "Memory Riser B, Slot 2", \ + "Memory Riser B, Slot 3", \ + "Memory Riser B, Slot 4", \ + "MCH Heatsink", "Expansion Slots", \ + "Power Supply, Location 1", \ + "Power Supply, Location 2", \ + "Tv0S", "Tv1S", } #define ASMC_MP5_TEMPS { "TA0P", "TCAC", "TCAD", "TCAG", "TCAH", \ "TCAS", "TCBC", "TCBD", "TCBG", "TCBH", \