Attachment #181456 for bug #217684

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	/* Advertise that polling is supported */
	ifp->if_capabilities |= IFCAP_POLLING;
#endif

	/* Attach PHY(s) */
	if (sc->phy_bsh != 0) {
		error = mii_attach(sc->dev, &sc->tsec_miibus, ifp,
		    tsec_ifmedia_upd, tsec_ifmedia_sts, BMSR_DEFCAPMASK,
		    sc->phyaddr, MII_OFFSET_ANY, 0);
		if (error) {
			device_printf(sc->dev, "attaching PHYs failed\n");
			if_free(ifp);
			sc->tsec_ifp = NULL;
			tsec_detach(sc);
			return (error);
		}
		sc->tsec_mii = device_get_softc(sc->tsec_miibus);
	} else {
		sc->tsec_link = 1;
	}
	sc->tsec_mii = device_get_softc(sc->tsec_miibus);

	/* Set MAC address */
	tsec_get_hwaddr(sc, hwaddr);

	/* Step 4: Initialize MAC station address */
	tsec_set_mac_address(sc);

	if (sc->tsec_mii != NULL) {
		/*
		 * Step 5: Assign a Physical address to the TBI so as to not
		 * conflict with the external PHY physical address
		 */
		TSEC_WRITE(sc, TSEC_REG_TBIPA, 5);

		TSEC_PHY_LOCK(sc);

		/* Step 6: Reset the management interface */
		TSEC_PHY_WRITE(sc, TSEC_REG_MIIMCFG, TSEC_MIIMCFG_RESETMGMT);

		/* Step 7: Setup the MII Mgmt clock speed */
		TSEC_PHY_WRITE(sc, TSEC_REG_MIIMCFG, TSEC_MIIMCFG_CLKDIV28);

		/*
		 * Step 8: Read MII Mgmt indicator register and check for
		 * Busy = 0
		 */
		timeout = tsec_mii_wait(sc, TSEC_MIIMIND_BUSY);

		TSEC_PHY_UNLOCK(sc);
		if (timeout) {
			if_printf(ifp,
			    "tsec_init_locked(): Mgmt busy timeout\n");
			return;
		}

		/* Step 9: Setup the MII Mgmt */
		mii_mediachg(sc->tsec_mii);
	}

	/* Step 10: Clear IEVENT register */
	TSEC_WRITE(sc, TSEC_REG_IEVENT, 0xffffffff);

		}
	case SIOCGIFMEDIA:
	case SIOCSIFMEDIA:
		if (sc->tsec_mii != NULL)
			error = ifmedia_ioctl(ifp, ifr,
			    &sc->tsec_mii->mii_media, command);
		else
			error = ENXIO;
		break;
	case SIOCSIFCAP:
		mask = ifp->if_capenable ^ ifr->ifr_reqcap;

	ifp = sc->tsec_ifp;
	link = sc->tsec_link;

	if (sc->tsec_mii != NULL)
		mii_tick(sc->tsec_mii);

	if (link == 0 && sc->tsec_link == 1 &&
	    (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)))




	}

	/* Get phy address from fdt */
	if (OF_getencprop(sc->node, "phy-handle", &phy, sizeof(phy)) > 0) {
		phy = OF_node_from_xref(phy);
		mdio = OF_parent(phy);
		OF_decode_addr(mdio, 0, &sc->phy_bst, &sc->phy_bsh, NULL);
		OF_getencprop(phy, "reg", &sc->phyaddr, sizeof(sc->phyaddr));

		/*
		 * etsec2 MDIO nodes are given the MDIO module base address, so
		 * we need to add the MII offset to get the PHY registers.
		 */
		if (ofw_bus_node_is_compatible(mdio, "fsl,etsec2-mdio"))
			sc->phy_regoff = TSEC_REG_MIIBASE;
	}

	/*
	 * etsec2 MDIO nodes are given the MDIO module base address, so we need
	 * to add the MII offset to get the PHY registers.
	 */
	if (ofw_bus_node_is_compatible(mdio, "fsl,etsec2-mdio"))
		sc->phy_regoff = TSEC_REG_MIIBASE;

	/* Init timer */
	callout_init(&sc->tsec_callout, 1);
- 

Return to bug 217684

Lines 268-286 tsec_attach(struct tsec_softc *sc) Link Here

(-)b/sys/dev/tsec/if_tsec.c (-33 / +47 lines)
268	/* Advertise that polling is supported */	268	/* Advertise that polling is supported */
269	ifp->if_capabilities \|= IFCAP_POLLING;	269	ifp->if_capabilities \|= IFCAP_POLLING;
270	#endif	270	#endif
271		271
272	/* Attach PHY(s) */	272	/* Attach PHY(s) */
273	error = mii_attach(sc->dev, &sc->tsec_miibus, ifp, tsec_ifmedia_upd,	273	if (sc->phy_bsh != 0) {
274	tsec_ifmedia_sts, BMSR_DEFCAPMASK, sc->phyaddr, MII_OFFSET_ANY,	274	error = mii_attach(sc->dev, &sc->tsec_miibus, ifp,
275	0);	275	tsec_ifmedia_upd, tsec_ifmedia_sts, BMSR_DEFCAPMASK,
276	if (error) {	276	sc->phyaddr, MII_OFFSET_ANY, 0);
277	device_printf(sc->dev, "attaching PHYs failed\n");	277	if (error) {
278	if_free(ifp);	278	device_printf(sc->dev, "attaching PHYs failed\n");
279	sc->tsec_ifp = NULL;	279	if_free(ifp);
280	tsec_detach(sc);	280	sc->tsec_ifp = NULL;
281	return (error);	281	tsec_detach(sc);
		282	return (error);
		283	}
		284	sc->tsec_mii = device_get_softc(sc->tsec_miibus);
		285	} else {
		286	sc->tsec_link = 1;
282	}	287	}
283	sc->tsec_mii = device_get_softc(sc->tsec_miibus);
284		288
285	/* Set MAC address */	289	/* Set MAC address */
286	tsec_get_hwaddr(sc, hwaddr);	290	tsec_get_hwaddr(sc, hwaddr);
Lines 424-454 tsec_init_locked(struct tsec_softc *sc) Link Here
424	/* Step 4: Initialize MAC station address */	428	/* Step 4: Initialize MAC station address */
425	tsec_set_mac_address(sc);	429	tsec_set_mac_address(sc);
426		430
427	/*	431	if (sc->tsec_mii != NULL) {
428	* Step 5: Assign a Physical address to the TBI so as to not conflict	432	/*
429	* with the external PHY physical address	433	* Step 5: Assign a Physical address to the TBI so as to not
430	*/	434	* conflict with the external PHY physical address
431	TSEC_WRITE(sc, TSEC_REG_TBIPA, 5);	435	*/
		436	TSEC_WRITE(sc, TSEC_REG_TBIPA, 5);
432		437
433	TSEC_PHY_LOCK(sc);	438	TSEC_PHY_LOCK(sc);
434		439
435	/* Step 6: Reset the management interface */	440	/* Step 6: Reset the management interface */
436	TSEC_PHY_WRITE(sc, TSEC_REG_MIIMCFG, TSEC_MIIMCFG_RESETMGMT);	441	TSEC_PHY_WRITE(sc, TSEC_REG_MIIMCFG, TSEC_MIIMCFG_RESETMGMT);
437		442
438	/* Step 7: Setup the MII Mgmt clock speed */	443	/* Step 7: Setup the MII Mgmt clock speed */
439	TSEC_PHY_WRITE(sc, TSEC_REG_MIIMCFG, TSEC_MIIMCFG_CLKDIV28);	444	TSEC_PHY_WRITE(sc, TSEC_REG_MIIMCFG, TSEC_MIIMCFG_CLKDIV28);
440		445
441	/* Step 8: Read MII Mgmt indicator register and check for Busy = 0 */	446	/*
442	timeout = tsec_mii_wait(sc, TSEC_MIIMIND_BUSY);	447	* Step 8: Read MII Mgmt indicator register and check for
		448	* Busy = 0
		449	*/
		450	timeout = tsec_mii_wait(sc, TSEC_MIIMIND_BUSY);
443		451
444	TSEC_PHY_UNLOCK(sc);	452	TSEC_PHY_UNLOCK(sc);
445	if (timeout) {	453	if (timeout) {
446	if_printf(ifp, "tsec_init_locked(): Mgmt busy timeout\n");	454	if_printf(ifp,
447	return;	455	"tsec_init_locked(): Mgmt busy timeout\n");
448	}	456	return;
		457	}
449		458
450	/* Step 9: Setup the MII Mgmt */	459	/* Step 9: Setup the MII Mgmt */
451	mii_mediachg(sc->tsec_mii);	460	mii_mediachg(sc->tsec_mii);
		461	}
452		462
453	/* Step 10: Clear IEVENT register */	463	/* Step 10: Clear IEVENT register */
454	TSEC_WRITE(sc, TSEC_REG_IEVENT, 0xffffffff);	464	TSEC_WRITE(sc, TSEC_REG_IEVENT, 0xffffffff);
Lines 971-978 tsec_ioctl(struct ifnet *ifp, u_long command, caddr_t data) Link Here
971	}	981	}
972	case SIOCGIFMEDIA:	982	case SIOCGIFMEDIA:
973	case SIOCSIFMEDIA:	983	case SIOCSIFMEDIA:
974	error = ifmedia_ioctl(ifp, ifr, &sc->tsec_mii->mii_media,	984	if (sc->tsec_mii != NULL)
975	command);	985	error = ifmedia_ioctl(ifp, ifr,
		986	&sc->tsec_mii->mii_media, command);
		987	else
		988	error = ENXIO;
976	break;	989	break;
977	case SIOCSIFCAP:	990	case SIOCSIFCAP:
978	mask = ifp->if_capenable ^ ifr->ifr_reqcap;	991	mask = ifp->if_capenable ^ ifr->ifr_reqcap;
Lines 1264-1270 tsec_tick(void *arg) Link Here
1264	ifp = sc->tsec_ifp;	1277	ifp = sc->tsec_ifp;
1265	link = sc->tsec_link;	1278	link = sc->tsec_link;
1266		1279
1267	mii_tick(sc->tsec_mii);	1280	if (sc->tsec_mii != NULL)
		1281	mii_tick(sc->tsec_mii);
1268		1282
1269	if (link == 0 && sc->tsec_link == 1 &&	1283	if (link == 0 && sc->tsec_link == 1 &&
1270	(!IFQ_DRV_IS_EMPTY(&ifp->if_snd)))	1284	(!IFQ_DRV_IS_EMPTY(&ifp->if_snd)))

Lines 188-209 tsec_fdt_attach(device_t dev) Link Here

(-)b/sys/dev/tsec/if_tsec_fdt.c (-15 / +12 lines)
188	}	188	}
189		189
190	/* Get phy address from fdt */	190	/* Get phy address from fdt */
191	if (OF_getencprop(sc->node, "phy-handle", &phy, sizeof(phy)) <= 0) {	191	if (OF_getencprop(sc->node, "phy-handle", &phy, sizeof(phy)) > 0) {
192	device_printf(dev, "PHY not found in device tree");	192	phy = OF_node_from_xref(phy);
193	return (ENXIO);	193	mdio = OF_parent(phy);
194	}	194	OF_decode_addr(mdio, 0, &sc->phy_bst, &sc->phy_bsh, NULL);
		195	OF_getencprop(phy, "reg", &sc->phyaddr, sizeof(sc->phyaddr));
195		196
196	phy = OF_node_from_xref(phy);	197	/*
197	mdio = OF_parent(phy);	198	* etsec2 MDIO nodes are given the MDIO module base address, so
198	OF_decode_addr(mdio, 0, &sc->phy_bst, &sc->phy_bsh, NULL);	199	* we need to add the MII offset to get the PHY registers.
199	OF_getencprop(phy, "reg", &sc->phyaddr, sizeof(sc->phyaddr));	200	*/
		201	if (ofw_bus_node_is_compatible(mdio, "fsl,etsec2-mdio"))
		202	sc->phy_regoff = TSEC_REG_MIIBASE;
		203	}
200		204
201	/*
202	* etsec2 MDIO nodes are given the MDIO module base address, so we need
203	* to add the MII offset to get the PHY registers.
204	*/
205	if (ofw_bus_node_is_compatible(mdio, "fsl,etsec2-mdio"))
206	sc->phy_regoff = TSEC_REG_MIIBASE;
207		205
208	/* Init timer */	206	/* Init timer */
209	callout_init(&sc->tsec_callout, 1);	207	callout_init(&sc->tsec_callout, 1);
210	-