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Lines 65-79
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| 65 |
fixunsxfti \ |
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fixunsxfti \ |
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fixxfdi \ |
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fixxfdi \ |
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fixxfti \ |
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fixxfti \ |
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floatdidf \ |
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floatdisf \ |
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floatdixf \ |
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floattidf \ |
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floattidf \ |
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floattisf \ |
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floattisf \ |
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floattixf \ |
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floattixf \ |
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floatundidf \ |
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floatundisf \ |
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floatundixf \ |
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floatunsidf \ |
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floatunsidf \ |
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floatunsisf \ |
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floatunsisf \ |
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floatuntidf \ |
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floatuntidf \ |
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Lines 126-131
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| 126 |
umoddi3 \ |
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umoddi3 \ |
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umodti3 |
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umodti3 |
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122 |
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# Use C implementation for routines using unguarded SSE instructions in |
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# their assembler implementation. |
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.if ${MACHINE_CPUARCH} == "i386" |
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SRCS+= floatdidf.c \ |
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floatdisf.c \ |
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floatdixf.c \ |
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floatundidf.c \ |
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floatundisf.c \ |
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floatundixf.c |
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.else |
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SRCF+= floatdidf \ |
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floatdisf \ |
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floatdixf \ |
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floatundidf \ |
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floatundisf \ |
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floatundixf |
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.endif |
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# These are already shipped by libc.a on arm and mips |
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# These are already shipped by libc.a on arm and mips |
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.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" |
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.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" |
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SRCF+= adddf3 \ |
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SRCF+= adddf3 \ |