|
Lines 489-494
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|
| 489 |
static void bge_stop_fw(struct bge_softc *); |
489 |
static void bge_stop_fw(struct bge_softc *); |
| 490 |
static int bge_reset(struct bge_softc *); |
490 |
static int bge_reset(struct bge_softc *); |
| 491 |
static void bge_link_upd(struct bge_softc *); |
491 |
static void bge_link_upd(struct bge_softc *); |
|
|
492 |
static void bge_setwol(struct bge_softc *); |
| 493 |
static void bge_clrwol(struct bge_softc *); |
| 492 |
|
494 |
|
| 493 |
static void bge_ape_lock_init(struct bge_softc *); |
495 |
static void bge_ape_lock_init(struct bge_softc *); |
| 494 |
static void bge_ape_read_fw_ver(struct bge_softc *); |
496 |
static void bge_ape_read_fw_ver(struct bge_softc *); |
|
Lines 933-938
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|
| 933 |
static void |
935 |
static void |
| 934 |
bge_ape_driver_state_change(struct bge_softc *sc, int kind) |
936 |
bge_ape_driver_state_change(struct bge_softc *sc, int kind) |
| 935 |
{ |
937 |
{ |
|
|
938 |
struct ifnet *ifp; |
| 936 |
uint32_t apedata, event; |
939 |
uint32_t apedata, event; |
| 937 |
|
940 |
|
| 938 |
if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0) |
941 |
if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0) |
|
Lines 965-973
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|
| 965 |
event = BGE_APE_EVENT_STATUS_STATE_START; |
968 |
event = BGE_APE_EVENT_STATUS_STATE_START; |
| 966 |
break; |
969 |
break; |
| 967 |
case BGE_RESET_SHUTDOWN: |
970 |
case BGE_RESET_SHUTDOWN: |
| 968 |
APE_WRITE_4(sc, BGE_APE_HOST_DRVR_STATE, |
971 |
/* XXX Needs rewording |
| 969 |
BGE_APE_HOST_DRVR_STATE_UNLOAD); |
972 |
* With the interface we are currently using, |
| 970 |
event = BGE_APE_EVENT_STATUS_STATE_UNLOAD; |
973 |
* APE does not track driver state. Wiping |
|
|
974 |
* out the HOST SEGMENT SIGNATURE forces |
| 975 |
* the APE to assume OS absent status. |
| 976 |
*/ |
| 977 |
APE_WRITE_4(sc, BGE_APE_HOST_SEG_SIG, 0); |
| 978 |
|
| 979 |
ifp = sc->bge_ifp; |
| 980 |
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0) { |
| 981 |
APE_WRITE_4(sc, BGE_APE_HOST_WOL_SPEED, |
| 982 |
BGE_APE_HOST_WOL_SPEED_AUTO); |
| 983 |
APE_WRITE_4(sc, BGE_APE_HOST_DRVR_STATE, |
| 984 |
BGE_FW_DRV_STATE_WOL); |
| 985 |
event = BGE_APE_EVENT_STATUS_STATE_WOL; |
| 986 |
bge_ifmedia_upd_locked(ifp); |
| 987 |
} else { |
| 988 |
APE_WRITE_4(sc, BGE_APE_HOST_DRVR_STATE, |
| 989 |
BGE_APE_HOST_DRVR_STATE_UNLOAD); |
| 990 |
event = BGE_APE_EVENT_STATUS_STATE_UNLOAD; |
| 991 |
} |
| 971 |
break; |
992 |
break; |
| 972 |
case BGE_RESET_SUSPEND: |
993 |
case BGE_RESET_SUSPEND: |
| 973 |
event = BGE_APE_EVENT_STATUS_STATE_SUSPEND; |
994 |
event = BGE_APE_EVENT_STATUS_STATE_SUSPEND; |
|
Lines 3756-3762
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|
| 3756 |
if_setsendqready(ifp); |
3777 |
if_setsendqready(ifp); |
| 3757 |
if_sethwassist(ifp, sc->bge_csum_features); |
3778 |
if_sethwassist(ifp, sc->bge_csum_features); |
| 3758 |
if_setcapabilities(ifp, IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING | |
3779 |
if_setcapabilities(ifp, IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING | |
| 3759 |
IFCAP_VLAN_MTU); |
3780 |
IFCAP_VLAN_MTU | IFCAP_WOL_MAGIC); |
| 3760 |
if ((sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3)) != 0) { |
3781 |
if ((sc->bge_flags & (BGE_FLAG_TSO | BGE_FLAG_TSO3)) != 0) { |
| 3761 |
if_sethwassistbits(ifp, CSUM_TSO, 0); |
3782 |
if_sethwassistbits(ifp, CSUM_TSO, 0); |
| 3762 |
if_setcapabilitiesbit(ifp, IFCAP_TSO4 | IFCAP_VLAN_HWTSO, 0); |
3783 |
if_setcapabilitiesbit(ifp, IFCAP_TSO4 | IFCAP_VLAN_HWTSO, 0); |
|
Lines 3764-3769
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|
| 3764 |
#ifdef IFCAP_VLAN_HWCSUM |
3785 |
#ifdef IFCAP_VLAN_HWCSUM |
| 3765 |
if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWCSUM, 0); |
3786 |
if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWCSUM, 0); |
| 3766 |
#endif |
3787 |
#endif |
|
|
3788 |
if (pci_find_cap(dev, PCIY_PMG, ®) == 0) |
| 3789 |
if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC, 0); |
| 3767 |
if_setcapenable(ifp, if_getcapabilities(ifp)); |
3790 |
if_setcapenable(ifp, if_getcapabilities(ifp)); |
| 3768 |
#ifdef DEVICE_POLLING |
3791 |
#ifdef DEVICE_POLLING |
| 3769 |
if_setcapabilitiesbit(ifp, IFCAP_POLLING, 0); |
3792 |
if_setcapabilitiesbit(ifp, IFCAP_POLLING, 0); |
|
Lines 3948-3953
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|
| 3948 |
ether_ifdetach(ifp); |
3971 |
ether_ifdetach(ifp); |
| 3949 |
device_printf(sc->bge_dev, "couldn't set up irq\n"); |
3972 |
device_printf(sc->bge_dev, "couldn't set up irq\n"); |
| 3950 |
} |
3973 |
} |
|
|
3974 |
BGE_LOCK(sc); |
| 3975 |
bge_clrwol(sc); |
| 3976 |
BGE_UNLOCK(sc); |
| 3951 |
|
3977 |
|
| 3952 |
fail: |
3978 |
fail: |
| 3953 |
if (error) |
3979 |
if (error) |
|
Lines 5861-5866
Link Here
|
| 5861 |
} |
5887 |
} |
| 5862 |
} |
5888 |
} |
| 5863 |
#endif |
5889 |
#endif |
|
|
5890 |
if ((mask & IFCAP_WOL_MAGIC) != 0 && |
| 5891 |
(if_getcapabilities(ifp) & IFCAP_WOL_MAGIC) != 0) |
| 5892 |
if_togglecapenable(ifp, IFCAP_WOL_MAGIC); |
| 5864 |
if ((mask & IFCAP_TXCSUM) != 0 && |
5893 |
if ((mask & IFCAP_TXCSUM) != 0 && |
| 5865 |
(if_getcapabilities(ifp) & IFCAP_TXCSUM) != 0) { |
5894 |
(if_getcapabilities(ifp) & IFCAP_TXCSUM) != 0) { |
| 5866 |
if_togglecapenable(ifp, IFCAP_TXCSUM); |
5895 |
if_togglecapenable(ifp, IFCAP_TXCSUM); |
|
Lines 6088-6093
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|
| 6088 |
|
6117 |
|
| 6089 |
sc = device_get_softc(dev); |
6118 |
sc = device_get_softc(dev); |
| 6090 |
BGE_LOCK(sc); |
6119 |
BGE_LOCK(sc); |
|
|
6120 |
bge_setwol(sc); |
| 6091 |
bge_stop(sc); |
6121 |
bge_stop(sc); |
| 6092 |
BGE_UNLOCK(sc); |
6122 |
BGE_UNLOCK(sc); |
| 6093 |
|
6123 |
|
|
Lines 6101-6106
Link Here
|
| 6101 |
|
6131 |
|
| 6102 |
sc = device_get_softc(dev); |
6132 |
sc = device_get_softc(dev); |
| 6103 |
BGE_LOCK(sc); |
6133 |
BGE_LOCK(sc); |
|
|
6134 |
bge_setwol(sc); |
| 6104 |
bge_stop(sc); |
6135 |
bge_stop(sc); |
| 6105 |
BGE_UNLOCK(sc); |
6136 |
BGE_UNLOCK(sc); |
| 6106 |
|
6137 |
|
|
Lines 6116-6126
Link Here
|
| 6116 |
sc = device_get_softc(dev); |
6147 |
sc = device_get_softc(dev); |
| 6117 |
BGE_LOCK(sc); |
6148 |
BGE_LOCK(sc); |
| 6118 |
ifp = sc->bge_ifp; |
6149 |
ifp = sc->bge_ifp; |
|
|
6150 |
bge_reset(sc); |
| 6119 |
if (if_getflags(ifp) & IFF_UP) { |
6151 |
if (if_getflags(ifp) & IFF_UP) { |
| 6120 |
bge_init_locked(sc); |
6152 |
bge_init_locked(sc); |
| 6121 |
if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) |
6153 |
if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) |
| 6122 |
bge_start_locked(ifp); |
6154 |
bge_start_locked(ifp); |
| 6123 |
} |
6155 |
} |
|
|
6156 |
bge_clrwol(sc); |
| 6124 |
BGE_UNLOCK(sc); |
6157 |
BGE_UNLOCK(sc); |
| 6125 |
|
6158 |
|
| 6126 |
return (0); |
6159 |
return (0); |
|
Lines 6802-6804
Link Here
|
| 6802 |
return (if_get_counter_default(ifp, cnt)); |
6835 |
return (if_get_counter_default(ifp, cnt)); |
| 6803 |
} |
6836 |
} |
| 6804 |
} |
6837 |
} |
|
|
6838 |
|
| 6839 |
static void |
| 6840 |
bge_setwol(struct bge_softc *sc) |
| 6841 |
{ |
| 6842 |
struct ifnet *ifp; |
| 6843 |
uint16_t pmstat; |
| 6844 |
int pmc; |
| 6845 |
|
| 6846 |
ifp = sc->bge_ifp; |
| 6847 |
if ((if_getcapabilities(ifp) & IFCAP_WOL_MAGIC) == 0) |
| 6848 |
return; |
| 6849 |
if (pci_find_cap(sc->bge_dev, PCIY_PMG, &pmc) != 0) |
| 6850 |
return; |
| 6851 |
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0) { |
| 6852 |
BGE_SETBIT(sc, BGE_MAC_MODE, BGE_MACMODE_MAGIC_PKT_ENB); |
| 6853 |
BGE_SETBIT(sc, BGE_MAC_MODE, BGE_MACMODE_ACPI_PWRON_ENB); |
| 6854 |
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_PORTMODE); |
| 6855 |
BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_GMII); |
| 6856 |
BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE); |
| 6857 |
} |
| 6858 |
else { |
| 6859 |
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_MAGIC_PKT_ENB); |
| 6860 |
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_ACPI_PWRON_ENB); |
| 6861 |
} |
| 6862 |
|
| 6863 |
/* Request PME if WOL is requested. */ |
| 6864 |
pmstat = pci_read_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, 2); |
| 6865 |
pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE); |
| 6866 |
if ((if_getcapenable(ifp) & IFCAP_WOL) != 0) |
| 6867 |
pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE; |
| 6868 |
pci_write_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, pmstat, 2); |
| 6869 |
} |
| 6870 |
|
| 6871 |
static void |
| 6872 |
bge_clrwol(struct bge_softc *sc) |
| 6873 |
{ |
| 6874 |
struct ifnet *ifp; |
| 6875 |
uint16_t pmstat; |
| 6876 |
int pmc; |
| 6877 |
|
| 6878 |
ifp = sc->bge_ifp; |
| 6879 |
if ((if_getcapabilities(ifp) & IFCAP_WOL) == 0) |
| 6880 |
return; |
| 6881 |
if (pci_find_cap(sc->bge_dev, PCIY_PMG, &pmc) != 0) |
| 6882 |
return; |
| 6883 |
if ((if_getcapenable(ifp) & IFCAP_WOL) == 0) |
| 6884 |
return; |
| 6885 |
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_MAGIC_PKT_ENB); |
| 6886 |
BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_ACPI_PWRON_ENB); |
| 6887 |
|
| 6888 |
pmstat = pci_read_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, 2); |
| 6889 |
pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE); |
| 6890 |
pci_write_config(sc->bge_dev, pmc + PCIR_POWER_STATUS, pmstat, 2); |
| 6891 |
} |