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(-)ichwd.c (-3 / +51 lines)
Lines 74-79 __FBSDID("$FreeBSD: stable/11/sys/dev/ic Link Here
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#include <dev/ichwd/ichwd.h>
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#include <dev/ichwd/ichwd.h>
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#include <x86/pci_cfgreg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pci_private.h>
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static struct ichwd_device ichwd_devices[] = {
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static struct ichwd_device ichwd_devices[] = {
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	{ DEVICEID_82801AA,  "Intel 82801AA watchdog timer",	1, 1 },
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	{ DEVICEID_82801AA,  "Intel 82801AA watchdog timer",	1, 1 },
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	{ DEVICEID_82801AB,  "Intel 82801AB watchdog timer",	1, 1 },
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	{ DEVICEID_82801AB,  "Intel 82801AB watchdog timer",	1, 1 },
Lines 308-313 static devclass_t ichwd_devclass; Link Here
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/* NB: TCO version 3 devices use the gcs_res resource for the PMC register. */
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/* NB: TCO version 3 devices use the gcs_res resource for the PMC register. */
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#define ichwd_read_pmc_4(sc, off) \
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#define ichwd_read_pmc_4(sc, off) \
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	bus_read_4((sc)->gcs_res, (off))
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	bus_read_4((sc)->gcs_res, (off))
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#define ichwd_read_p2sb_4(sc, off) \
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	bus_read_4((sc)->p2sb_res, (off))
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#define ichwd_write_tco_1(sc, off, val) \
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#define ichwd_write_tco_1(sc, off, val) \
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	bus_write_1((sc)->tco_res, (off), (val))
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	bus_write_1((sc)->tco_res, (off), (val))
Lines 322-327 static devclass_t ichwd_devclass; Link Here
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/* NB: TCO version 3 devices use the gcs_res resource for the PMC register. */
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/* NB: TCO version 3 devices use the gcs_res resource for the PMC register. */
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#define ichwd_write_pmc_4(sc, off, val) \
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#define ichwd_write_pmc_4(sc, off, val) \
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	bus_write_4((sc)->gcs_res, (off), (val))
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	bus_write_4((sc)->gcs_res, (off), (val))
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#define ichwd_write_p2sb_4(sc, off, val) \
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	bus_write_4((sc)->p2sb_res, (off), (val))
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#define ichwd_verbose_printf(dev, ...) \
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#define ichwd_verbose_printf(dev, ...) \
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	do {						\
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	do {						\
Lines 494-502 ichwd_clear_noreboot(struct ichwd_softc Link Here
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			rc = EIO;
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			rc = EIO;
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		break;
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		break;
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	case 4:
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	case 4:
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		/*
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		status = ichwd_read_p2sb_4(sc, 0);
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		 * TODO.  This needs access to a hidden PCI device at 31:1.
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		status &= ~ICH_GEN_STA_NO_REBOOT;
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		 */
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		ichwd_write_p2sb_4(sc, 0, status);
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		status = ichwd_read_p2sb_4(sc, 0);
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		if (status & ICH_GEN_STA_NO_REBOOT)
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			rc = EIO;
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		break;
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		break;
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	default:
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	default:
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		ichwd_verbose_printf(sc->device,
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		ichwd_verbose_printf(sc->device,
Lines 705-710 ichwd_smb_attach(device_t dev) Link Here
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	device_t smb;
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	device_t smb;
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	uint32_t acpi_base;
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	uint32_t acpi_base;
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	u_int32_t cfg[2];
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	u_int64_t p2sb;
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	sc = device_get_softc(dev);
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	sc = device_get_softc(dev);
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	smb = ichwd_find_smb_dev(device_get_parent(dev), &id_p);
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	smb = ichwd_find_smb_dev(device_get_parent(dev), &id_p);
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	if (smb == NULL)
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	if (smb == NULL)
Lines 745-750 ichwd_smb_attach(device_t dev) Link Here
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		return (ENXIO);
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		return (ENXIO);
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	}
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	}
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	/* Unhide and enumerate p2sb device. */
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	pci_cfgregwrite(0, 31, 1, 0xe1, 0, 1);
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	if ((sc->p2sb = pci_find_dbsf(0, 0, 31, 1)) == NULL) {
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		device_t bus = device_get_parent(smb);
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		struct pci_devinfo *dinfo = pci_read_device(
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		    device_get_parent(bus), bus, 0, 0, 31, 1);
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		pci_add_child(bus, dinfo);
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		if ((sc->p2sb = pci_find_dbsf(0, 0, 31, 1)) == NULL)
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			return (ENXIO);
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	}
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	/* Get the 64 bit base address and hide the device again. */
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	cfg[0] = pci_cfgregread(0, 31, 1, 0x10, 4);
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	cfg[1] = pci_cfgregread(0, 31, 1, 0x10 + 4, 4);
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	pci_cfgregwrite(0, 31, 1, 0xe1, 1, 1);
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	p2sb = cfg[0] & 0xfffffff0;
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	p2sb |= (u_int64_t) cfg[1] << 32;
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	/* Map the address. */
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	sc->p2sb_rid = 0x10;
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	sc->p2sb_res = bus_alloc_resource(
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	    sc->p2sb, SYS_RES_MEMORY, &sc->p2sb_rid,
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	    p2sb + 0xc6000c, p2sb + 0xc6000c + 3, 4,
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	    RF_ACTIVE|RF_SHAREABLE);
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	if (sc->p2sb_res == NULL) {
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		device_printf(dev, "unable to reserve hidden P2SB registers\n");
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		return (ENXIO);
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	}
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	return (0);
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	return (0);
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}
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}
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Lines 853-858 ichwd_attach(device_t dev) Link Here
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	if (sc->gcs_res != NULL)
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	if (sc->gcs_res != NULL)
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		bus_release_resource(sc->ich, SYS_RES_MEMORY,
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		bus_release_resource(sc->ich, SYS_RES_MEMORY,
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		    sc->gcs_rid, sc->gcs_res);
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		    sc->gcs_rid, sc->gcs_res);
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	if (sc->p2sb_res != NULL)
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		bus_release_resource(sc->p2sb, SYS_RES_MEMORY,
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		    sc->p2sb_rid, sc->p2sb_res);
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	return (ENXIO);
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	return (ENXIO);
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}
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}
Lines 888-893 ichwd_detach(device_t dev) Link Here
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	if (sc->gcs_res)
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	if (sc->gcs_res)
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		bus_release_resource(sc->ich, SYS_RES_MEMORY, sc->gcs_rid,
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		bus_release_resource(sc->ich, SYS_RES_MEMORY, sc->gcs_rid,
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		    sc->gcs_res);
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		    sc->gcs_res);
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	if (sc->p2sb_res) 
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		bus_release_resource(sc->p2sb, SYS_RES_MEMORY, sc->p2sb_rid,
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		    sc->p2sb_res);
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	return (0);
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	return (0);
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}
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}
(-)ichwd.h (+4 lines)
Lines 57-62 struct ichwd_softc { Link Here
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	int			 gcs_rid;
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	int			 gcs_rid;
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	struct resource		*gcs_res;
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	struct resource		*gcs_res;
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	device_t		 p2sb;
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	int			 p2sb_rid;
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	struct resource		*p2sb_res;
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	eventhandler_tag	 ev_tag;
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	eventhandler_tag	 ev_tag;
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};
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};
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