Attachment 199074 Details for Bug 222079 – (Maybe) fixed resource allocation.

[patch] (Maybe) fixed resource allocation.

patch-ichwd2 (text/plain), 4.28 KB, created by t_uemura on 2018-11-08 06:18:46 UTC

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Creator: t_uemura

Created: 2018-11-08 06:18:46 UTC

Size: 4.28 KB

patch

obsolete

>--- ichwd.c.orig	2018-11-08 14:59:46.419042000 +0900
>+++ ichwd.c	2018-11-08 14:58:39.770930000 +0900
>@@ -74,6 +74,10 @@ __FBSDID("$FreeBSD: stable/11/sys/dev/ic
> 
> #include <dev/ichwd/ichwd.h>
> 
>+#include <x86/pci_cfgreg.h>
>+#include <dev/pci/pcivar.h>
>+#include <dev/pci/pci_private.h>
>+
> static struct ichwd_device ichwd_devices[] = {
> 	{ DEVICEID_82801AA,  "Intel 82801AA watchdog timer",	1, 1 },
> 	{ DEVICEID_82801AB,  "Intel 82801AB watchdog timer",	1, 1 },
>@@ -289,6 +293,7 @@ static struct ichwd_device ichwd_devices
> 
> static struct ichwd_device ichwd_smb_devices[] = {
> 	{ DEVICEID_LEWISBURG_SMB, "Lewisburg watchdog timer",		10, 4 },
>+	{ DEVICEID_SRPT_LP_SMB,   "Sunrise Point-LP watchdog timer",	10, 4 },
> 	{ 0, NULL, 0, 0 },
> };
> 
>@@ -307,6 +312,8 @@ static devclass_t ichwd_devclass;
> /* NB: TCO version 3 devices use the gcs_res resource for the PMC register. */
> #define ichwd_read_pmc_4(sc, off) \
> 	bus_read_4((sc)->gcs_res, (off))
>+#define ichwd_read_p2sb_4(sc, off) \
>+	bus_read_4((sc)->p2sb_res, (off))
> 
> #define ichwd_write_tco_1(sc, off, val) \
> 	bus_write_1((sc)->tco_res, (off), (val))
>@@ -321,6 +328,8 @@ static devclass_t ichwd_devclass;
> /* NB: TCO version 3 devices use the gcs_res resource for the PMC register. */
> #define ichwd_write_pmc_4(sc, off, val) \
> 	bus_write_4((sc)->gcs_res, (off), (val))
>+#define ichwd_write_p2sb_4(sc, off, val) \
>+	bus_write_4((sc)->p2sb_res, (off), (val))
> 
> #define ichwd_verbose_printf(dev, ...) \
> 	do {						\
>@@ -493,9 +502,12 @@ ichwd_clear_noreboot(struct ichwd_softc 
> 			rc = EIO;
> 		break;
> 	case 4:
>-		/*
>-		 * TODO.  This needs access to a hidden PCI device at 31:1.
>-		 */
>+		status = ichwd_read_p2sb_4(sc, 0xc6000c);
>+		status &= ~ICH_GEN_STA_NO_REBOOT;
>+		ichwd_write_p2sb_4(sc, 0xc6000c, status);
>+		status = ichwd_read_p2sb_4(sc, 0xc6000c);
>+		if (status & ICH_GEN_STA_NO_REBOOT)
>+			rc = EIO;
> 		break;
> 	default:
> 		ichwd_verbose_printf(sc->device,
>@@ -704,6 +716,9 @@ ichwd_smb_attach(device_t dev)
> 	device_t smb;
> 	uint32_t acpi_base;
> 
>+	uint32_t cfg[2];
>+	uint64_t p2sb;
>+
> 	sc = device_get_softc(dev);
> 	smb = ichwd_find_smb_dev(device_get_parent(dev), &id_p);
> 	if (smb == NULL)
>@@ -744,6 +759,34 @@ ichwd_smb_attach(device_t dev)
> 		return (ENXIO);
> 	}
> 
>+	/* Unhide and enumerate p2sb device. */
>+	pci_cfgregwrite(0, 31, 1, 0xe1, 0, 1);
>+	if ((sc->p2sb = pci_find_dbsf(0, 0, 31, 1)) == NULL) {
>+		device_t bus = device_get_parent(smb);
>+		struct pci_devinfo *dinfo = pci_read_device(
>+		    device_get_parent(bus), bus, 0, 0, 31, 1);
>+		pci_add_child(bus, dinfo);
>+		if ((sc->p2sb = pci_find_dbsf(0, 0, 31, 1)) == NULL)
>+			return (ENXIO);
>+	}
>+	/* Get the 64 bit base address and hide the device again. */
>+	cfg[0] = pci_cfgregread(0, 31, 1, 0x10, 4);
>+	cfg[1] = pci_cfgregread(0, 31, 1, 0x10 + 4, 4);
>+	pci_cfgregwrite(0, 31, 1, 0xe1, 1, 1);
>+	p2sb = cfg[0] & 0xfffffff0;
>+	p2sb |= ((uint64_t) cfg[1] << 32);
>+
>+	/* Map the address. */
>+	sc->p2sb_rid = 0x10;
>+	sc->p2sb_res = bus_alloc_resource(
>+	    sc->p2sb, SYS_RES_MEMORY, &sc->p2sb_rid,
>+	    p2sb, p2sb + 0xfffffe, 0xffffff,
>+	    RF_ACTIVE|RF_SHAREABLE);
>+	if (sc->p2sb_res == NULL) {
>+		device_printf(dev, "unable to reserve hidden P2SB registers\n");
>+		return (ENXIO);
>+	}
>+
> 	return (0);
> }
> 
>@@ -852,6 +895,9 @@ ichwd_attach(device_t dev)
> 	if (sc->gcs_res != NULL)
> 		bus_release_resource(sc->ich, SYS_RES_MEMORY,
> 		    sc->gcs_rid, sc->gcs_res);
>+	if (sc->p2sb_res != NULL)
>+		bus_release_resource(sc->p2sb, SYS_RES_MEMORY,
>+		    sc->p2sb_rid, sc->p2sb_res);
> 
> 	return (ENXIO);
> }
>@@ -887,6 +933,9 @@ ichwd_detach(device_t dev)
> 	if (sc->gcs_res)
> 		bus_release_resource(sc->ich, SYS_RES_MEMORY, sc->gcs_rid,
> 		    sc->gcs_res);
>+	if (sc->p2sb_res) 
>+		bus_release_resource(sc->p2sb, SYS_RES_MEMORY, sc->p2sb_rid,
>+		    sc->p2sb_res);
> 
> 	return (0);
> }
>--- ichwd.h.orig	2018-11-08 14:59:55.377834000 +0900
>+++ ichwd.h	2018-11-05 18:34:46.192291000 +0900
>@@ -57,6 +57,10 @@ struct ichwd_softc {
> 	int			 gcs_rid;
> 	struct resource		*gcs_res;
> 
>+	device_t		 p2sb;
>+	int			 p2sb_rid;
>+	struct resource		*p2sb_res;
>+
> 	eventhandler_tag	 ev_tag;
> };
> 
>@@ -271,6 +275,7 @@ struct ichwd_softc {
> #define	DEVICEID_WCPT_LP7	0x9cc7
> #define	DEVICEID_WCPT_LP9	0x9cc9
> #define	DEVICEID_LEWISBURG_SMB	0xa1a3
>+#define	DEVICEID_SRPT_LP_SMB	0x9d23
> 
> /* ICH LPC Interface Bridge Registers (ICH5 and older) */
> #define	ICH_GEN_STA		0xd4

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Attachments on bug 222079: 198998 | 199074 | 199847 | 199848