Attachment #203356 for bug #236855

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     cflags += [
       # TODO(hans): Remove this once Clang generates better optimized debug info
       # by default. https://crbug.com/765793
@@ -747,11 +747,11 @@ config("compiler_cpu_abi") {
         ]
       }
     } else if (current_cpu == "arm") {
-      if (is_clang && !is_android && !is_nacl) {
+      if (is_clang && !is_android && !is_nacl && !is_bsd) {
         cflags += [ "--target=arm-linux-gnueabihf" ]
         ldflags += [ "--target=arm-linux-gnueabihf" ]
       }
-      if (!is_nacl) {
+      if (!is_nacl && !is_bsd) {
         cflags += [
           "-march=$arm_arch",
           "-mfloat-abi=$arm_float_abi",
@@ -761,7 +761,7 @@ config("compiler_cpu_abi") {
         cflags += [ "-mtune=$arm_tune" ]
       }




--- src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h.orig	2019-01-16 11:59:47 UTC
+++ src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h
@@ -16,6 +16,24 @@
 namespace crc32c {
 
 #if HAVE_ARM64_CRC32C
 
+#if defined(__FreeBSD__)
+#include <machine/armreg.h>
+#include <sys/types.h>
+namespace crc32c {
+
+inline bool CanUseArm64Linux() {
+  uint64_t id_aa64isar0;
+
+  id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
+  if ((ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) && \
+     (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE))
+    return true;
+  return false;
+}
+
+}  // namespace crc32c
+
+#elif defined(__linux__)
 #if HAVE_STRONG_GETAUXVAL
 #include <sys/auxv.h>
 #elif HAVE_WEAK_GETAUXVAL
@@ -43,6 +61,7 @@ inline bool CanUseArm64Linux() {
 
 }  // namespace crc32c
 
+#endif
 #endif  // HAVE_ARM64_CRC32C
 
 #endif  // CRC32C_CRC32C_ARM_LINUX_CHECK_H_




--- src/3rdparty/chromium/third_party/skia/src/core/SkCpu.cpp.orig	2019-01-16 10:59:47 UTC
+++ src/3rdparty/chromium/third_party/skia/src/core/SkCpu.cpp
@@ -70,6 +70,20 @@
         return features;
     }
 
+#elif defined(SK_CPU_ARM64) && defined(__FreeBSD__)
+    #include <machine/armreg.h>
+
+    static uint32_t read_cpu_features() {
+        uint32_t features = 0;
+        uint64_t id_aa64isar0;
+
+        id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
+        if (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE) {
+            features |= SkCpu::CRC32;
+        }
+        return features;
+    }
+
 #elif defined(SK_CPU_ARM64) && __has_include(<sys/auxv.h>)
     #include <sys/auxv.h>
 
@@ -95,7 +109,12 @@
         const uint32_t kHWCAP_VFPv4 = (1<<16);
+#if 0
         const uint32_t kHWCAP_CRC32   = (1<< 7),
                        kHWCAP_ASIMDHP = (1<<10);
 
         uint32_t features = 0;
+#if defined(__FreeBSD__)
+        uint32_t hwcaps = 0;
+        elf_aux_info(AT_HWCAP, &hwcaps, sizeof(hwcaps));
+#else
         uint32_t hwcaps = getauxval(AT_HWCAP);
+#endif
         if (hwcaps & kHWCAP_NEON ) {
             features |= SkCpu::NEON;
             if (hwcaps & kHWCAP_VFPv4) { features |= SkCpu::NEON_FMA|SkCpu::VFP_FP16; }




--- src/3rdparty/chromium/third_party/skia/src/opts/SkRasterPipeline_opts.h.orig	2019-01-16 10:59:47 UTC
+++ src/3rdparty/chromium/third_party/skia/src/opts/SkRasterPipeline_opts.h
@@ -657,7 +657,10 @@ SI F approx_powf(F x, F y) {
 }
 
 SI F from_half(U16 h) {
-#if defined(__ARM_FP16_FORMAT_IEEE)
+#if defined(__ARM_FP16_FORMAT_IEEE) && defined(__aarch64__)
+    return vcvt_f32_f16(h);
+
+#elif defined(__ARM_FP16_FORMAT_IEEE)
     __fp16 fp16;
     memcpy(&fp16, &h, sizeof(U16));
     return float(fp16);
@@ -679,7 +682,10 @@ SI F from_half(U16 h) {
 }
 
 SI U16 to_half(F f) {
-#if defined(__ARM_FP16_FORMAT_IEEE)
+#if defined(__ARM_FP16_FORMAT_IEEE) && defined(__aarch64__)
+    return vcvt_f16_f32(f);
+
+#elif defined(__ARM_FP16_FORMAT_IEEE)
     __fp16 fp16 = __fp16(f);
     U16 u16;
     memcpy(&u16, &fp16, sizeof(U16));




--- src/3rdparty/chromium/third_party/zlib/arm_features.c.orig	2019-01-16 11:59:47 UTC
+++ src/3rdparty/chromium/third_party/zlib/arm_features.c
@@ -10,20 +10,33 @@
 #include <pthread.h>
 #include <stdint.h>
 
-#if defined(ARMV8_OS_ANDROID)
+int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
+int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
+
+static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
+
+#if defined (__FreeBSD__)
+#include <machine/armreg.h>
+#include <sys/types.h>
+static void init_arm_features(void)
+{
+#if defined (__aarch64__)
+    uint64_t id_aa64isar0;
+
+    id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
+    if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL)
+        arm_cpu_enable_pmull = 1;
+    if (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE)
+        arm_cpu_enable_crc32 = 1;
+#endif
+}
+#elif defined(ARMV8_OS_ANDROID)
 #include <cpu-features.h>
 #elif defined(ARMV8_OS_LINUX)
 #include <asm/hwcap.h>
 #include <sys/auxv.h>
-#else
-#error ### No ARM CPU features detection in your platform/OS
-#endif
 #endif
 
 int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
 int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
 
-int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
-int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
 
-static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
-
 static void init_arm_features(void)
 {
     uint64_t flag_crc32 = 0, flag_pmull = 0, capabilities = 0;
@@ -53,6 +66,9 @@ static void init_arm_features(void)
     if (capabilities & flag_pmull)
         arm_cpu_enable_pmull = 1;
 }
+#else
+#error ### No ARM CPU features detection in your platform/OS
+#endif
 
 void ZLIB_INTERNAL arm_check_features(void)
 {
+#ifdef ARMV8_OS_LINUX
     pthread_once(&cpu_check_inited_once, init_arm_features);
+#endif
 }




--- src/3rdparty/chromium/v8/src/arm/cpu-arm.cc.orig	2019-01-16 10:59:47 UTC
+++ src/3rdparty/chromium/v8/src/arm/cpu-arm.cc
@@ -7,6 +7,9 @@
 #ifdef __QNXNTO__
 #include <sys/mman.h>  // for cache flushing.
 #undef MAP_TYPE
+#elif defined(__FreeBSD__)
+#include <sys/types.h>
+#include <machine/sysarch.h> // for cache flushing.
 #else
 #include <sys/syscall.h>  // for cache flushing.
 #endif
@@ -24,6 +27,9 @@ void CpuFeatures::FlushICache(void* start, size_t size
 #if !defined(USE_SIMULATOR)
 #if V8_OS_QNX
   msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
+#elif defined(__FreeBSD__)
+  struct arm_sync_icache_args args = { .addr = (uintptr_t)start, .len = size };
+  sysarch(ARM_SYNC_ICACHE, (void *)&args);
 #else
   register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start);
   register uint32_t end asm("r1") = beg + size;




--- src/3rdparty/chromium/v8/src/base/platform/platform-freebsd.cc.orig	2019-01-16 10:59:47 UTC
+++ src/3rdparty/chromium/v8/src/base/platform/platform-freebsd.cc
@@ -86,5 +86,47 @@ std::vector<OS::SharedLibraryAddress> OS::GetSharedLib
 
 void OS::SignalCodeMovingGC() {}
 
+#ifdef __arm__
+
+bool OS::ArmUsingHardFloat() {
+// GCC versions 4.6 and above define __ARM_PCS or __ARM_PCS_VFP to specify
+// the Floating Point ABI used (PCS stands for Procedure Call Standard).
+// We use these as well as a couple of other defines to statically determine
+// what FP ABI used.
+// GCC versions 4.4 and below don't support hard-fp.
+// GCC versions 4.5 may support hard-fp without defining __ARM_PCS or
+// __ARM_PCS_VFP.
+
+#define GCC_VERSION \
+  (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
+#if GCC_VERSION >= 40600 && !defined(__clang__)
+#if defined(__ARM_PCS_VFP)
+  return true;
+#else
+  return false;
+#endif
+
+#elif GCC_VERSION < 40500 && !defined(__clang__)
+  return false;
+
+#else
+#if defined(__ARM_PCS_VFP)
+  return true;
+#elif defined(__ARM_PCS) || defined(__SOFTFP__) || defined(__SOFTFP) || \
+    !defined(__VFP_FP__)
+  return false;
+#else
+#error \
+    "Your version of compiler does not report the FP ABI compiled for."     \
+       "Please report it on this issue"                                        \
+       "http://code.google.com/p/v8/issues/detail?id=2140"
+
+#endif
+#endif
+#undef GCC_VERSION
+}
+
+#endif // def __arm__
+
 }  // namespace base
 }  // namespace v8




--- src/3rdparty/chromium/v8/src/libsampler/sampler.cc.orig	2019-01-16 10:59:47 UTC
+++ src/3rdparty/chromium/v8/src/libsampler/sampler.cc
@@ -550,9 +550,9 @@ void SignalHandler::FillRegisterState(void* context, R
   state->sp = reinterpret_cast<void*>(mcontext.mc_rsp);
   state->fp = reinterpret_cast<void*>(mcontext.mc_rbp);
 #elif V8_HOST_ARCH_ARM
-  state->pc = reinterpret_cast<void*>(mcontext.mc_r15);
-  state->sp = reinterpret_cast<void*>(mcontext.mc_r13);
-  state->fp = reinterpret_cast<void*>(mcontext.mc_r11);
+  state->pc = reinterpret_cast<void*>(mcontext.__gregs[_REG_PC]);
+  state->sp = reinterpret_cast<void*>(mcontext.__gregs[_REG_SP]);
+  state->fp = reinterpret_cast<void*>(mcontext.__gregs[_REG_FP]);
 #endif  // V8_HOST_ARCH_*
 #elif V8_OS_NETBSD
 #if V8_HOST_ARCH_IA32

Return to bug 236855

Lines 27-32 Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_build_config_compiler_BUILD.gn (+14 lines)
27	cflags += [	27	cflags += [
28	# TODO(hans): Remove this once Clang generates better optimized debug info	28	# TODO(hans): Remove this once Clang generates better optimized debug info
29	# by default. https://crbug.com/765793	29	# by default. https://crbug.com/765793
		30	@@ -747,11 +747,11 @@ config("compiler_cpu_abi") {
		31	]
		32	}
		33	} else if (current_cpu == "arm") {
		34	- if (is_clang && !is_android && !is_nacl) {
		35	+ if (is_clang && !is_android && !is_nacl && !is_bsd) {
		36	cflags += [ "--target=arm-linux-gnueabihf" ]
		37	ldflags += [ "--target=arm-linux-gnueabihf" ]
		38	}
		39	- if (!is_nacl) {
		40	+ if (!is_nacl && !is_bsd) {
		41	cflags += [
		42	"-march=$arm_arch",
		43	"-mfloat-abi=$arm_float_abi",
30	@@ -761,7 +761,7 @@ config("compiler_cpu_abi") {	44	@@ -761,7 +761,7 @@ config("compiler_cpu_abi") {
31	cflags += [ "-mtune=$arm_tune" ]	45	cflags += [ "-mtune=$arm_tune" ]
32	}	46	}

Lines 1-19 Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_third__party_crc32c_src_src_crc32c__arm64__linux__check.h (-15 / +31 lines)
1	--- src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h.orig 2018-11-13 18:25:11 UTC	1	--- src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h.orig 2019-01-16 11:59:47 UTC
2	+++ src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h	2	+++ src/3rdparty/chromium/third_party/crc32c/src/src/crc32c_arm64_linux_check.h
3	@@ -29,6 +29,8 @@ extern "C" unsigned long getauxval(unsigned long type)	3	@@ -16,6 +16,24 @@
4	namespace crc32c {
5		4
6	inline bool CanUseArm64Linux() {	5	#if HAVE_ARM64_CRC32C
7	+return false;	6
8	+#if 0	7	+#if defined(__FreeBSD__)
9	#if HAVE_STRONG_GETAUXVAL \|\| HAVE_WEAK_GETAUXVAL	8	+#include <machine/armreg.h>
10	// From 'arch/arm64/include/uapi/asm/hwcap.h' in Linux kernel source code.	9	+#include <sys/types.h>
11	constexpr unsigned long kHWCAP_PMULL = 1 << 4;	10	+namespace crc32c {
12	@@ -39,6 +41,7 @@ inline bool CanUseArm64Linux() {	11	+
13	#else	12	+inline bool CanUseArm64Linux() {
14	return false;	13	+ uint64_t id_aa64isar0;
15	#endif // HAVE_STRONG_GETAUXVAL \|\| HAVE_WEAK_GETAUXVAL	14	+
16	+#endif	15	+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
17	}	16	+ if ((ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) && \
		17	+ (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE))
		18	+ return true;
		19	+ return false;
		20	+}
		21	+
		22	+} // namespace crc32c
		23	+
		24	+#elif defined(__linux__)
		25	#if HAVE_STRONG_GETAUXVAL
		26	#include <sys/auxv.h>
		27	#elif HAVE_WEAK_GETAUXVAL
		28	@@ -43,6 +61,7 @@ inline bool CanUseArm64Linux() {
18		29
19	} // namespace crc32c	30	} // namespace crc32c
		31
		32	+#endif
		33	#endif // HAVE_ARM64_CRC32C
		34
		35	#endif // CRC32C_CRC32C_ARM_LINUX_CHECK_H_

Lines 1-19 Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_third__party_skia_src_core_SkCpu.cpp (-14 / +31 lines)
1	--- src/3rdparty/chromium/third_party/skia/src/core/SkCpu.cpp.orig 2018-11-13 18:25:11 UTC	1	--- src/3rdparty/chromium/third_party/skia/src/core/SkCpu.cpp.orig 2019-01-16 10:59:47 UTC
2	+++ src/3rdparty/chromium/third_party/skia/src/core/SkCpu.cpp	2	+++ src/3rdparty/chromium/third_party/skia/src/core/SkCpu.cpp
3	@@ -74,6 +74,8 @@	3	@@ -70,6 +70,20 @@
		4	return features;
		5	}
		6
		7	+#elif defined(SK_CPU_ARM64) && defined(__FreeBSD__)
		8	+ #include <machine/armreg.h>
		9	+
		10	+ static uint32_t read_cpu_features() {
		11	+ uint32_t features = 0;
		12	+ uint64_t id_aa64isar0;
		13	+
		14	+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
		15	+ if (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE) {
		16	+ features \|= SkCpu::CRC32;
		17	+ }
		18	+ return features;
		19	+ }
		20	+
		21	#elif defined(SK_CPU_ARM64) && __has_include(<sys/auxv.h>)
4	#include <sys/auxv.h>	22	#include <sys/auxv.h>
5		23
6	static uint32_t read_cpu_features() {	24	@@ -95,7 +109,12 @@
7	+return 0;	25	const uint32_t kHWCAP_VFPv4 = (1<<16);
8	+#if 0
9	const uint32_t kHWCAP_CRC32 = (1<< 7),
10	kHWCAP_ASIMDHP = (1<<10);
11		26
12	@@ -82,6 +84,7 @@	27	uint32_t features = 0;
13	if (hwcaps & kHWCAP_CRC32 ) { features \|= SkCpu::CRC32; }	28	+#if defined(__FreeBSD__)
14	if (hwcaps & kHWCAP_ASIMDHP) { features \|= SkCpu::ASIMDHP; }	29	+ uint32_t hwcaps = 0;
15	return features;	30	+ elf_aux_info(AT_HWCAP, &hwcaps, sizeof(hwcaps));
		31	+#else
		32	uint32_t hwcaps = getauxval(AT_HWCAP);
16	+#endif	33	+#endif
17	}	34	if (hwcaps & kHWCAP_NEON ) {
18		35	features \|= SkCpu::NEON;
19	#elif defined(SK_CPU_ARM32) && __has_include(<sys/auxv.h>) && \	36	if (hwcaps & kHWCAP_VFPv4) { features \|= SkCpu::NEON_FMA\|SkCpu::VFP_FP16; }

Lines 1-29 Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_third__party_zlib_arm__features.c (-15 / +40 lines)
1	--- src/3rdparty/chromium/third_party/zlib/arm_features.c.orig 2018-11-13 18:25:11 UTC	1	--- src/3rdparty/chromium/third_party/zlib/arm_features.c.orig 2019-01-16 11:59:47 UTC
2	+++ src/3rdparty/chromium/third_party/zlib/arm_features.c	2	+++ src/3rdparty/chromium/third_party/zlib/arm_features.c
3	@@ -16,12 +16,13 @@	3	@@ -10,20 +10,33 @@
		4	#include <pthread.h>
		5	#include <stdint.h>
		6
		7	-#if defined(ARMV8_OS_ANDROID)
		8	+int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
		9	+int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
		10	+
		11	+static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
		12	+
		13	+#if defined (__FreeBSD__)
		14	+#include <machine/armreg.h>
		15	+#include <sys/types.h>
		16	+static void init_arm_features(void)
		17	+{
		18	+#if defined (__aarch64__)
		19	+ uint64_t id_aa64isar0;
		20	+
		21	+ id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
		22	+ if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL)
		23	+ arm_cpu_enable_pmull = 1;
		24	+ if (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE)
		25	+ arm_cpu_enable_crc32 = 1;
		26	+#endif
		27	+}
		28	+#elif defined(ARMV8_OS_ANDROID)
		29	#include <cpu-features.h>
		30	#elif defined(ARMV8_OS_LINUX)
4	#include <asm/hwcap.h>	31	#include <asm/hwcap.h>
5	#include <sys/auxv.h>	32	#include <sys/auxv.h>
6	#else	33	-#else
7	-#error ### No ARM CPU features detection in your platform/OS	34	-#error ### No ARM CPU features detection in your platform/OS
8	+/* #error ### No ARM CPU features detection in your platform/OS */	35	-#endif
9	#endif
10
11	int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
12	int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
13		36
14	+#ifdef ARMV8_OS_LINUX	37	-int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0;
15	static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;	38	-int ZLIB_INTERNAL arm_cpu_enable_pmull = 0;
16		39
		40	-static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT;
		41	-
17	static void init_arm_features(void)	42	static void init_arm_features(void)
18	@@ -53,8 +54,11 @@ static void init_arm_features(void)	43	{
		44	uint64_t flag_crc32 = 0, flag_pmull = 0, capabilities = 0;
		45	@@ -53,6 +66,9 @@ static void init_arm_features(void)
19	if (capabilities & flag_pmull)	46	if (capabilities & flag_pmull)
20	arm_cpu_enable_pmull = 1;	47	arm_cpu_enable_pmull = 1;
21	}	48	}
		49	+#else
		50	+#error ### No ARM CPU features detection in your platform/OS
22	+#endif	51	+#endif
23		52
24	void ZLIB_INTERNAL arm_check_features(void)	53	void ZLIB_INTERNAL arm_check_features(void)
25	{	54	{
26	+#ifdef ARMV8_OS_LINUX
27	pthread_once(&cpu_check_inited_once, init_arm_features);
28	+#endif
29	}

Added Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_v8_src_arm_cpu-arm.cc (+22 lines)
1	--- src/3rdparty/chromium/v8/src/arm/cpu-arm.cc.orig 2019-01-16 10:59:47 UTC
2	+++ src/3rdparty/chromium/v8/src/arm/cpu-arm.cc
3	@@ -7,6 +7,9 @@
4	#ifdef __QNXNTO__
5	#include <sys/mman.h> // for cache flushing.
6	#undef MAP_TYPE
7	+#elif defined(__FreeBSD__)
8	+#include <sys/types.h>
9	+#include <machine/sysarch.h> // for cache flushing.
10	#else
11	#include <sys/syscall.h> // for cache flushing.
12	#endif
13	@@ -24,6 +27,9 @@ void CpuFeatures::FlushICache(void* start, size_t size
14	#if !defined(USE_SIMULATOR)
15	#if V8_OS_QNX
16	msync(start, size, MS_SYNC \| MS_INVALIDATE_ICACHE);
17	+#elif defined(__FreeBSD__)
18	+ struct arm_sync_icache_args args = { .addr = (uintptr_t)start, .len = size };
19	+ sysarch(ARM_SYNC_ICACHE, (void *)&args);
20	#else
21	register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start);
22	register uint32_t end asm("r1") = beg + size;

Added Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_v8_src_base_platform_platform-freebsd.cc (+50 lines)
1	--- src/3rdparty/chromium/v8/src/base/platform/platform-freebsd.cc.orig 2019-01-16 10:59:47 UTC
2	+++ src/3rdparty/chromium/v8/src/base/platform/platform-freebsd.cc
3	@@ -86,5 +86,47 @@ std::vector<OS::SharedLibraryAddress> OS::GetSharedLib
4
5	void OS::SignalCodeMovingGC() {}
6
7	+#ifdef __arm__
8	+
9	+bool OS::ArmUsingHardFloat() {
10	+// GCC versions 4.6 and above define __ARM_PCS or __ARM_PCS_VFP to specify
11	+// the Floating Point ABI used (PCS stands for Procedure Call Standard).
12	+// We use these as well as a couple of other defines to statically determine
13	+// what FP ABI used.
14	+// GCC versions 4.4 and below don't support hard-fp.
15	+// GCC versions 4.5 may support hard-fp without defining __ARM_PCS or
16	+// __ARM_PCS_VFP.
17	+
18	+#define GCC_VERSION \
19	+ (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
20	+#if GCC_VERSION >= 40600 && !defined(__clang__)
21	+#if defined(__ARM_PCS_VFP)
22	+ return true;
23	+#else
24	+ return false;
25	+#endif
26	+
27	+#elif GCC_VERSION < 40500 && !defined(__clang__)
28	+ return false;
29	+
30	+#else
31	+#if defined(__ARM_PCS_VFP)
32	+ return true;
33	+#elif defined(__ARM_PCS) \|\| defined(__SOFTFP__) \|\| defined(__SOFTFP) \|\| \
34	+ !defined(__VFP_FP__)
35	+ return false;
36	+#else
37	+#error \
38	+ "Your version of compiler does not report the FP ABI compiled for." \
39	+ "Please report it on this issue" \
40	+ "http://code.google.com/p/v8/issues/detail?id=2140"
41	+
42	+#endif
43	+#endif
44	+#undef GCC_VERSION
45	+}
46	+
47	+#endif // def __arm__
48	+
49	} // namespace base
50	} // namespace v8

Added Link Here

(-)b/www/qt5-webengine/files/patch-src_3rdparty_chromium_v8_src_libsampler_sampler.cc (+15 lines)
1	--- src/3rdparty/chromium/v8/src/libsampler/sampler.cc.orig 2019-01-16 10:59:47 UTC
2	+++ src/3rdparty/chromium/v8/src/libsampler/sampler.cc
3	@@ -550,9 +550,9 @@ void SignalHandler::FillRegisterState(void* context, R
4	state->sp = reinterpret_cast<void*>(mcontext.mc_rsp);
5	state->fp = reinterpret_cast<void*>(mcontext.mc_rbp);
6	#elif V8_HOST_ARCH_ARM
7	- state->pc = reinterpret_cast<void*>(mcontext.mc_r15);
8	- state->sp = reinterpret_cast<void*>(mcontext.mc_r13);
9	- state->fp = reinterpret_cast<void*>(mcontext.mc_r11);
10	+ state->pc = reinterpret_cast<void*>(mcontext.__gregs[_REG_PC]);
11	+ state->sp = reinterpret_cast<void*>(mcontext.__gregs[_REG_SP]);
12	+ state->fp = reinterpret_cast<void*>(mcontext.__gregs[_REG_FP]);
13	#endif // V8_HOST_ARCH_*
14	#elif V8_OS_NETBSD
15	#if V8_HOST_ARCH_IA32