From 89ee6429ab0fcc7d937882a0439a92b07d708e1c Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Mon, 3 Jun 2019 12:19:29 +0200 Subject: [PATCH 2/4] yosys: Update to latest git master Use the last git master so we can use nextpnr and project trellis for ECP5 FPGAs. Signed-off-by: Emmanuel Vadot --- devel/yosys/Makefile | 6 +++--- devel/yosys/distinfo | 6 +++--- devel/yosys/pkg-plist | 32 +++++++++++++++++++++++++++++++- 3 files changed, 37 insertions(+), 7 deletions(-) diff --git a/devel/yosys/Makefile b/devel/yosys/Makefile index 8c5bdc3e3b1a..b880ffd7f0c7 100644 --- a/devel/yosys/Makefile +++ b/devel/yosys/Makefile @@ -2,9 +2,7 @@ # $FreeBSD$ PORTNAME= yosys -DISTVERSIONPREFIX= yosys- -DISTVERSION= 0.8 -PORTREVISION= 2 +PORTVERSION= g20190531 CATEGORIES= devel MAINTAINER= jsorocil@gmail.com @@ -20,11 +18,13 @@ LIB_DEPENDS= libffi.so:devel/libffi USES= bison compiler:c++11-lang gmake pkgconfig python:3.6+ readline \ shebangfix tcl + SHEBANG_FILES= backends/smt2/smtbmc.py \ misc/yosys-config.in USE_GITHUB= yes GH_ACCOUNT= YosysHQ +GH_TAGNAME= 90ec2cda BINARY_ALIAS= python3=${PYTHON_CMD} tclsh=${TCLSH} MAKE_ARGS= ABCEXTERNAL=abc diff --git a/devel/yosys/distinfo b/devel/yosys/distinfo index 3cec426be31c..77b7b3a84121 100644 --- a/devel/yosys/distinfo +++ b/devel/yosys/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1540309364 -SHA256 (YosysHQ-yosys-yosys-0.8_GH0.tar.gz) = 07760fe732003585b26d97f9e02bcddf242ff7fc33dbd415446ac7c70e85c66f -SIZE (YosysHQ-yosys-yosys-0.8_GH0.tar.gz) = 1118433 +TIMESTAMP = 1559409264 +SHA256 (YosysHQ-yosys-g20190531-90ec2cda_GH0.tar.gz) = 5918b3e44414d59b51977dd06fe783eba532297355366ae1a00e481384a7edb9 +SIZE (YosysHQ-yosys-g20190531-90ec2cda_GH0.tar.gz) = 1284045 diff --git a/devel/yosys/pkg-plist b/devel/yosys/pkg-plist index 1f35c6683b28..14438be30a62 100644 --- a/devel/yosys/pkg-plist +++ b/devel/yosys/pkg-plist @@ -5,19 +5,45 @@ bin/yosys-smtbmc %%DATADIR%%/achronix/speedster22i/cells_map.v %%DATADIR%%/achronix/speedster22i/cells_sim.v %%DATADIR%%/adff2dff.v +%%DATADIR%%/anlogic/arith_map.v +%%DATADIR%%/anlogic/cells_map.v +%%DATADIR%%/anlogic/cells_sim.v +%%DATADIR%%/anlogic/dram_init_16x4.vh +%%DATADIR%%/anlogic/drams.txt +%%DATADIR%%/anlogic/drams_map.v +%%DATADIR%%/anlogic/eagle_bb.v %%DATADIR%%/cells.lib +%%DATADIR%%/cmp2lut.v %%DATADIR%%/coolrunner2/cells_latch.v %%DATADIR%%/coolrunner2/cells_sim.v %%DATADIR%%/coolrunner2/tff_extract.v %%DATADIR%%/coolrunner2/xc2_dff.lib %%DATADIR%%/dff2ff.v %%DATADIR%%/ecp5/arith_map.v +%%DATADIR%%/ecp5/bram.txt +%%DATADIR%%/ecp5/bram_conn_1.vh +%%DATADIR%%/ecp5/bram_conn_18.vh +%%DATADIR%%/ecp5/bram_conn_2.vh +%%DATADIR%%/ecp5/bram_conn_4.vh +%%DATADIR%%/ecp5/bram_conn_9.vh +%%DATADIR%%/ecp5/bram_init_1_2_4.vh +%%DATADIR%%/ecp5/bram_init_9_18_36.vh +%%DATADIR%%/ecp5/brams_map.v +%%DATADIR%%/ecp5/cells_bb.v %%DATADIR%%/ecp5/cells_map.v %%DATADIR%%/ecp5/cells_sim.v %%DATADIR%%/ecp5/dram.txt %%DATADIR%%/ecp5/drams_map.v +%%DATADIR%%/ecp5/latches_map.v +%%DATADIR%%/gate2lut.v +%%DATADIR%%/gowin/arith_map.v +%%DATADIR%%/gowin/bram.txt +%%DATADIR%%/gowin/brams_init3.vh +%%DATADIR%%/gowin/brams_map.v %%DATADIR%%/gowin/cells_map.v %%DATADIR%%/gowin/cells_sim.v +%%DATADIR%%/gowin/dram.txt +%%DATADIR%%/gowin/drams_map.v %%DATADIR%%/greenpak4/cells_blackbox.v %%DATADIR%%/greenpak4/cells_latch.v %%DATADIR%%/greenpak4/cells_map.v @@ -72,6 +98,9 @@ bin/yosys-smtbmc %%DATADIR%%/intel/max10/cells_sim.v %%DATADIR%%/pmux2mux.v %%DATADIR%%/python3/smtio.py +%%DATADIR%%/sf2/arith_map.v +%%DATADIR%%/sf2/cells_map.v +%%DATADIR%%/sf2/cells_sim.v %%DATADIR%%/simcells.v %%DATADIR%%/simlib.v %%DATADIR%%/techmap.v @@ -88,4 +117,5 @@ bin/yosys-smtbmc %%DATADIR%%/xilinx/cells_xtra.v %%DATADIR%%/xilinx/drams.txt %%DATADIR%%/xilinx/drams_map.v -%%DATADIR%%/xilinx/lut2lut.v +%%DATADIR%%/xilinx/ff_map.v +%%DATADIR%%/xilinx/lut_map.v -- 2.21.0